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MIPS: Add architectural FDC IRQ fields

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Add architectural field definitions relating to the Fast Debug Channel
(FDC) interrupt, namely the pending bit in Cause and the field in
IntCtl to specify which CPU IRQ line the FDC interrupt is routed to.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/9139/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
James Hogan
2015-01-29 11:14:06 +00:00
committed by Ralf Baechle
parent 296b7c68c0
commit 9323f84f22
1 changed files with 4 additions and 0 deletions
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4
arch/mips/include/asm/mipsregs.h
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@@ -428,6 +428,8 @@
*
* Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
*/
#define INTCTLB_IPFDC 23
#define INTCTLF_IPFDC (_ULCAST_(7) << INTCTLB_IPFDC)
#define INTCTLB_IPPCI 26
#define INTCTLF_IPPCI (_ULCAST_(7) << INTCTLB_IPPCI)
#define INTCTLB_IPTI 29
@@ -458,6 +460,8 @@
#define CAUSEF_IP6 (_ULCAST_(1) << 14)
#define CAUSEB_IP7 15
#define CAUSEF_IP7 (_ULCAST_(1) << 15)
#define CAUSEB_FDCI 21
#define CAUSEF_FDCI (_ULCAST_(1) << 21)
#define CAUSEB_IV 23
#define CAUSEF_IV (_ULCAST_(1) << 23)
#define CAUSEB_PCI 26