[MIPS] MIPS32/MIPS64 secondary cache management

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Chris Dearman
2006-06-20 17:15:20 +01:00
committed by Ralf Baechle
parent f7a849153b
commit 9318c51acd
5 changed files with 168 additions and 7 deletions

View File

@@ -597,8 +597,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
break;
case PRID_IMP_25KF:
c->cputype = CPU_25KF;
/* Probe for L2 cache */
c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
break;
case PRID_IMP_34K:
c->cputype = CPU_34K;