Merge tag 'pci-v4.21-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas: - Remove unused lists from ASPM pcie_link_state (Frederick Lawler) - Fix Broadcom CNB20LE host bridge unintended sign extension (Colin Ian King) - Expand Kconfig "PF" acronyms (Randy Dunlap) - Update MAINTAINERS for arch/x86/kernel/early-quirks.c (Bjorn Helgaas) - Add missing include to drivers/pci.h (Alexandru Gagniuc) - Override Synopsys USB 3.x HAPS device class so dwc3-haps can claim it instead of xhci (Thinh Nguyen) - Clean up P2PDMA documentation (Randy Dunlap) - Allow runtime PM even if driver doesn't supply callbacks (Jarkko Nikula) - Remove status check after submitting Switchtec MRPC Firmware Download commands to avoid Completion Timeouts (Kelvin Cao) - Set Switchtec coherent DMA mask to allow 64-bit DMA (Boris Glimcher) - Fix Switchtec SWITCHTEC_IOCTL_EVENT_IDX_ALL flag overwrite issue (Joey Zhang) - Enable write combining for Switchtec MRPC Input buffers (Kelvin Cao) - Add Switchtec MRPC DMA mode support (Wesley Sheng) - Skip VF scanning on powerpc, which does this in firmware (Sebastian Ott) - Add Amlogic Meson PCIe controller driver and DT bindings (Yue Wang) - Constify histb dw_pcie_host_ops structure (Julia Lawall) - Support multiple power domains for imx6 (Leonard Crestez) - Constify layerscape driver data (Stefan Agner) - Update imx6 Kconfig to allow imx6 PCIe in imx7 kernel (Trent Piepho) - Support armada8k GPIO reset (Baruch Siach) - Support suspend/resume support on imx6 (Leonard Crestez) - Don't hard-code DesignWare DBI/ATU offst (Stephen Warren) - Skip i.MX6 PHY setup on i.MX7D (Andrey Smirnov) - Remove Jianguo Sun from HiSilicon STB maintainers (Lorenzo Pieralisi) - Mask DesignWare interrupts instead of disabling them to avoid lost interrupts (Marc Zyngier) - Add locking when acking DesignWare interrupts (Marc Zyngier) - Ack DesignWare interrupts in the proper callbacks (Marc Zyngier) - Use devm resource parser in mediatek (Honghui Zhang) - Remove unused mediatek "num-lanes" DT property (Honghui Zhang) - Add UniPhier PCIe controller driver and DT bindings (Kunihiko Hayashi) - Enable MSI for imx6 downstream components (Richard Zhu) * tag 'pci-v4.21-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (40 commits) PCI: imx: Enable MSI from downstream components s390/pci: skip VF scanning PCI/IOV: Add flag so platforms can skip VF scanning PCI/IOV: Factor out sriov_add_vfs() PCI: uniphier: Add UniPhier PCIe host controller support dt-bindings: PCI: Add UniPhier PCIe host controller description PCI: amlogic: Add the Amlogic Meson PCIe controller driver dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe controller arm64: dts: mt7622: Remove un-used property for PCIe arm: dts: mt7623: Remove un-used property for PCIe dt-bindings: PCI: MediaTek: Remove un-used property PCI: mediatek: Remove un-used variant in struct mtk_pcie_port MAINTAINERS: Remove Jianguo Sun from HiSilicon STB DWC entry PCI: dwc: Don't hard-code DBI/ATU offset PCI: imx: Add imx6sx suspend/resume support PCI: armada8k: Add support for gpio controlled reset signal PCI: dwc: Adjust Kconfig to allow IMX6 PCIe host on IMX7 PCI: dwc: layerscape: Constify driver data PCI: imx: Add multi-pd support PCI: Override Synopsys USB 3.x HAPS device class ...
This commit is contained in:
Linus Torvalds
@@ -27,6 +27,8 @@
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/reset.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include "pcie-designware.h"
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@@ -59,6 +61,11 @@ struct imx6_pcie {
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u32 tx_swing_low;
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int link_gen;
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struct regulator *vpcie;
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/* power domain for pcie */
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struct device *pd_pcie;
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/* power domain for pcie phy */
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struct device *pd_pcie_phy;
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};
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/* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */
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@@ -67,6 +74,7 @@ struct imx6_pcie {
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#define PHY_PLL_LOCK_WAIT_USLEEP_MAX 200
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/* PCIe Root Complex registers (memory-mapped) */
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#define PCIE_RC_IMX6_MSI_CAP 0x50
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#define PCIE_RC_LCR 0x7c
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#define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1 0x1
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#define PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2 0x2
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@@ -290,6 +298,43 @@ static int imx6q_pcie_abort_handler(unsigned long addr,
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return 1;
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}
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static int imx6_pcie_attach_pd(struct device *dev)
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{
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struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
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struct device_link *link;
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/* Do nothing when in a single power domain */
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if (dev->pm_domain)
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return 0;
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imx6_pcie->pd_pcie = dev_pm_domain_attach_by_name(dev, "pcie");
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if (IS_ERR(imx6_pcie->pd_pcie))
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return PTR_ERR(imx6_pcie->pd_pcie);
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link = device_link_add(dev, imx6_pcie->pd_pcie,
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DL_FLAG_STATELESS |
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DL_FLAG_PM_RUNTIME |
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DL_FLAG_RPM_ACTIVE);
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if (!link) {
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dev_err(dev, "Failed to add device_link to pcie pd.\n");
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return -EINVAL;
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}
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imx6_pcie->pd_pcie_phy = dev_pm_domain_attach_by_name(dev, "pcie_phy");
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if (IS_ERR(imx6_pcie->pd_pcie_phy))
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return PTR_ERR(imx6_pcie->pd_pcie_phy);
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device_link_add(dev, imx6_pcie->pd_pcie_phy,
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DL_FLAG_STATELESS |
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DL_FLAG_PM_RUNTIME |
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DL_FLAG_RPM_ACTIVE);
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if (IS_ERR(link)) {
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dev_err(dev, "Failed to add device_link to pcie_phy pd: %ld\n", PTR_ERR(link));
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return PTR_ERR(link);
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}
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return 0;
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}
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static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
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{
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struct device *dev = imx6_pcie->pci->dev;
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@@ -765,8 +810,28 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
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static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie)
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{
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reset_control_assert(imx6_pcie->turnoff_reset);
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reset_control_deassert(imx6_pcie->turnoff_reset);
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struct device *dev = imx6_pcie->pci->dev;
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/* Some variants have a turnoff reset in DT */
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if (imx6_pcie->turnoff_reset) {
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reset_control_assert(imx6_pcie->turnoff_reset);
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reset_control_deassert(imx6_pcie->turnoff_reset);
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goto pm_turnoff_sleep;
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}
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/* Others poke directly at IOMUXC registers */
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switch (imx6_pcie->variant) {
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case IMX6SX:
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regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
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IMX6SX_GPR12_PCIE_PM_TURN_OFF,
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IMX6SX_GPR12_PCIE_PM_TURN_OFF);
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regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
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IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0);
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break;
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default:
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dev_err(dev, "PME_Turn_Off not implemented\n");
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return;
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}
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/*
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* Components with an upstream port must respond to
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@@ -775,6 +840,7 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie)
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* The standard recommends a 1-10ms timeout after which to
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* proceed anyway as if acks were received.
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*/
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pm_turnoff_sleep:
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usleep_range(1000, 10000);
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}
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@@ -784,18 +850,31 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
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clk_disable_unprepare(imx6_pcie->pcie_phy);
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clk_disable_unprepare(imx6_pcie->pcie_bus);
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if (imx6_pcie->variant == IMX7D) {
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switch (imx6_pcie->variant) {
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case IMX6SX:
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clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
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break;
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case IMX7D:
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regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
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IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
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IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
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break;
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default:
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break;
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}
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}
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static inline bool imx6_pcie_supports_suspend(struct imx6_pcie *imx6_pcie)
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{
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return (imx6_pcie->variant == IMX7D ||
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imx6_pcie->variant == IMX6SX);
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}
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static int imx6_pcie_suspend_noirq(struct device *dev)
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{
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struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
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if (imx6_pcie->variant != IMX7D)
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if (!imx6_pcie_supports_suspend(imx6_pcie))
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return 0;
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imx6_pcie_pm_turnoff(imx6_pcie);
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@@ -811,7 +890,7 @@ static int imx6_pcie_resume_noirq(struct device *dev)
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struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
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struct pcie_port *pp = &imx6_pcie->pci->pp;
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if (imx6_pcie->variant != IMX7D)
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if (!imx6_pcie_supports_suspend(imx6_pcie))
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return 0;
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imx6_pcie_assert_core_reset(imx6_pcie);
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@@ -840,6 +919,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
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struct resource *dbi_base;
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struct device_node *node = dev->of_node;
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int ret;
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u16 val;
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imx6_pcie = devm_kzalloc(dev, sizeof(*imx6_pcie), GFP_KERNEL);
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if (!imx6_pcie)
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@@ -977,10 +1057,22 @@ static int imx6_pcie_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, imx6_pcie);
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ret = imx6_pcie_attach_pd(dev);
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if (ret)
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return ret;
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ret = imx6_add_pcie_port(imx6_pcie, pdev);
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if (ret < 0)
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return ret;
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if (pci_msi_enabled()) {
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val = dw_pcie_readw_dbi(pci, PCIE_RC_IMX6_MSI_CAP +
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PCI_MSI_FLAGS);
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val |= PCI_MSI_FLAGS_ENABLE;
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dw_pcie_writew_dbi(pci, PCIE_RC_IMX6_MSI_CAP + PCI_MSI_FLAGS,
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val);
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}
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return 0;
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}
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