hwspinlock: qcom: correct MMIO max register for newer SoCs
[ Upstream commit 90cb380f9ceb811059340d06ff5fd0c0e93ecbe1 ]
Newer ARMv8 Qualcomm SoCs using 0x1000 register stride have maximum
register 0x20000 (32 mutexes * 0x1000).
Fixes: 7a1e6fb1c6
("hwspinlock: qcom: Allow mmio usage in addition to syscon")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:

committed by
Greg Kroah-Hartman

parent
76eba54f0d
commit
925bf1ba76
@@ -105,7 +105,7 @@ static const struct regmap_config tcsr_mutex_config = {
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.reg_bits = 32,
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.reg_bits = 32,
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.reg_stride = 4,
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.reg_stride = 4,
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.val_bits = 32,
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.val_bits = 32,
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.max_register = 0x40000,
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.max_register = 0x20000,
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.fast_io = true,
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.fast_io = true,
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};
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};
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