amd-xgbe: Add support for per DMA channel interrupts
This patch provides support for interrupts that are generated by the Tx/Rx DMA channel pairs of the device. This allows for Tx and Rx processing to run across multiple processsors. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller

parent
174fd2597b
commit
9227dc5e57
@@ -481,17 +481,21 @@ static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata)
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if (channel->tx_ring) {
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/* Enable the following Tx interrupts
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* TIE - Transmit Interrupt Enable (unless polling)
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* TIE - Transmit Interrupt Enable (unless using
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* per channel interrupts)
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*/
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XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);
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if (!pdata->per_channel_irq)
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XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);
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}
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if (channel->rx_ring) {
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/* Enable following Rx interrupts
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* RBUE - Receive Buffer Unavailable Enable
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* RIE - Receive Interrupt Enable
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* RIE - Receive Interrupt Enable (unless using
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* per channel interrupts)
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*/
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XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1);
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XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);
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if (!pdata->per_channel_irq)
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XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);
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}
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XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier);
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