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ACPICA: Executer: Introduce a set of macros to handle bit width mask generation

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ACPICA commit c23034a3a09d5ed79f1827d51f43cfbccf68ab64

A regression was reported to the shift offset >= width of type.
This patch fixes this issue. BZ 1270.

This is a part of the fix because the order of the patches are modified for
Linux upstream, containing the cleanups for the old code. Lv Zheng.

Link: https://github.com/acpica/acpica/commit/c23034a3
Link: https://bugs.acpica.org/show_bug.cgi?id=1270
Reported-by: Sascha Wildner <swildner@gmail.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Lv Zheng
2016-05-05 12:58:45 +08:00
committed by Rafael J. Wysocki
parent b314a172ee
commit 9222aa8234
2 changed files with 14 additions and 10 deletions
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12
drivers/acpi/acpica/exfldio.c
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@@ -897,17 +897,9 @@ acpi_ex_insert_into_field(union acpi_operand_object *obj_desc,
access_bit_width = ACPI_MUL_8(obj_desc->common_field.access_byte_width);
/*
* Create the bitmasks used for bit insertion.
* Note: This if/else is used to bypass compiler differences with the
* shift operator
*/
if (access_bit_width == ACPI_INTEGER_BIT_SIZE) {
width_mask = ACPI_UINT64_MAX;
} else {
width_mask = ACPI_MASK_BITS_ABOVE(access_bit_width);
}
/* Create the bitmasks used for bit insertion */
width_mask = ACPI_MASK_BITS_ABOVE_64(access_bit_width);
mask = width_mask &
ACPI_MASK_BITS_BELOW(obj_desc->common_field.start_field_bit_offset);