Merge tag 'nand/for-5.1' of git://git.infradead.org/linux-mtd into mtd/next
NAND core changes: - Fourth batch of fixes/cleanup to the raw NAND core impacting various controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2). - Checking the return code of nand_reset() and nand_readid_op(). - Removing ->legacy.erase and single_erase(). - Simplifying the locking. - Several implicit fall through annotations. Raw NAND controllers drivers changes: - Fixing various possible object reference leaks (MTK, JZ4780, Atmel). - ST: * Adding support for STM32 FMC2 NAND flash controller. - Meson: * Adding support for Amlogic NAND flash controller. - Denali: * Several cleanup patches. - Sunxi: * Several cleanup patches. - FSMC: * Disabling NAND on remove(). * Resetting NAND timings on resume(). SPI-NAND drivers changes: - Toshiba: * Adding support for all Toshiba products. - Macronix: * Fixing ECC status read. - Gigadevice: * Adding support for GD5F1GQ4UExxG.
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@@ -16,13 +16,12 @@
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#ifndef __LINUX_MTD_RAWNAND_H
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#define __LINUX_MTD_RAWNAND_H
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#include <linux/wait.h>
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#include <linux/spinlock.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/flashchip.h>
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#include <linux/mtd/bbm.h>
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#include <linux/mtd/jedec.h>
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#include <linux/mtd/onfi.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/types.h>
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@@ -897,25 +896,17 @@ struct nand_controller_ops {
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/**
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* struct nand_controller - Structure used to describe a NAND controller
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*
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* @lock: protection lock
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* @active: the mtd device which holds the controller currently
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* @wq: wait queue to sleep on if a NAND operation is in
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* progress used instead of the per chip wait queue
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* when a hw controller is available.
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* @lock: lock used to serialize accesses to the NAND controller
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* @ops: NAND controller operations.
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*/
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struct nand_controller {
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spinlock_t lock;
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struct nand_chip *active;
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wait_queue_head_t wq;
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struct mutex lock;
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const struct nand_controller_ops *ops;
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};
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static inline void nand_controller_init(struct nand_controller *nfc)
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{
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nfc->active = NULL;
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spin_lock_init(&nfc->lock);
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init_waitqueue_head(&nfc->wq);
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mutex_init(&nfc->lock);
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}
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/**
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@@ -936,7 +927,6 @@ static inline void nand_controller_init(struct nand_controller *nfc)
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* @waitfunc: hardware specific function for wait on ready.
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* @block_bad: check if a block is bad, using OOB markers
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* @block_markbad: mark a block bad
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* @erase: erase function
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* @set_features: set the NAND chip features
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* @get_features: get the NAND chip features
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* @chip_delay: chip dependent delay for transferring data from array to read
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@@ -962,7 +952,6 @@ struct nand_legacy {
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int (*waitfunc)(struct nand_chip *chip);
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int (*block_bad)(struct nand_chip *chip, loff_t ofs);
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int (*block_markbad)(struct nand_chip *chip, loff_t ofs);
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int (*erase)(struct nand_chip *chip, int page);
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int (*set_features)(struct nand_chip *chip, int feature_addr,
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u8 *subfeature_para);
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int (*get_features)(struct nand_chip *chip, int feature_addr,
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@@ -983,7 +972,6 @@ struct nand_legacy {
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* setting the read-retry mode. Mostly needed for MLC NAND.
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* @ecc: [BOARDSPECIFIC] ECC control structure
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* @buf_align: minimum buffer alignment required by a platform
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* @state: [INTERN] the current state of the NAND device
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* @oob_poi: "poison value buffer," used for laying out OOB data
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* before writing
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* @page_shift: [INTERN] number of address bits in a page (column
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@@ -1034,6 +1022,9 @@ struct nand_legacy {
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* cur_cs < numchips. NAND Controller drivers should not
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* modify this value, but they're allowed to read it.
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* @read_retries: [INTERN] the number of read retry modes supported
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* @lock: lock protecting the suspended field. Also used to
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* serialize accesses to the NAND device.
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* @suspended: set to 1 when the device is suspended, 0 when it's not.
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* @bbt: [INTERN] bad block table pointer
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* @bbt_td: [REPLACEABLE] bad block table descriptor for flash
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* lookup.
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@@ -1088,7 +1079,8 @@ struct nand_chip {
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int read_retries;
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flstate_t state;
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struct mutex lock;
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unsigned int suspended : 1;
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uint8_t *oob_poi;
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struct nand_controller *controller;
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