Merge branch 'drm-next-5.3' of git://people.freedesktop.org/~agd5f/linux into drm-next
New stuff for 5.3: - Add new thermal sensors for vega asics - Various RAS fixes - Add sysfs interface for memory interface utilization - Use HMM rather than mmu notifier for user pages - Expose xgmi topology via kfd - SR-IOV fixes - Fixes for manual driver reload - Add unique identifier for vega asics - Clean up user fence handling with UVD/VCE/VCN blocks - Convert DC to use core bpc attribute rather than a custom one - Add GWS support for KFD - Vega powerplay improvements - Add CRC support for DCE 12 - SR-IOV support for new security policy - Various cleanups From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190529220944.14464-1-alexander.deucher@amd.com
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@@ -35,9 +35,10 @@ struct kfd_ioctl_get_version_args {
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};
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/* For kfd_ioctl_create_queue_args.queue_type. */
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#define KFD_IOC_QUEUE_TYPE_COMPUTE 0
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#define KFD_IOC_QUEUE_TYPE_SDMA 1
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#define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 2
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#define KFD_IOC_QUEUE_TYPE_COMPUTE 0x0
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#define KFD_IOC_QUEUE_TYPE_SDMA 0x1
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#define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 0x2
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#define KFD_IOC_QUEUE_TYPE_SDMA_XGMI 0x3
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#define KFD_MAX_QUEUE_PERCENTAGE 100
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#define KFD_MAX_QUEUE_PRIORITY 15
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@@ -338,6 +339,7 @@ struct kfd_ioctl_acquire_vm_args {
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#define KFD_IOC_ALLOC_MEM_FLAGS_GTT (1 << 1)
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#define KFD_IOC_ALLOC_MEM_FLAGS_USERPTR (1 << 2)
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#define KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL (1 << 3)
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#define KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP (1 << 4)
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/* Allocation flags: attributes/access options */
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#define KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE (1 << 31)
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#define KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30)
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@@ -408,6 +410,21 @@ struct kfd_ioctl_unmap_memory_from_gpu_args {
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__u32 n_success; /* to/from KFD */
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};
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/* Allocate GWS for specific queue
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*
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* @gpu_id: device identifier
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* @queue_id: queue's id that GWS is allocated for
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* @num_gws: how many GWS to allocate
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* @first_gws: index of the first GWS allocated.
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* only support contiguous GWS allocation
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*/
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struct kfd_ioctl_alloc_queue_gws_args {
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__u32 gpu_id; /* to KFD */
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__u32 queue_id; /* to KFD */
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__u32 num_gws; /* to KFD */
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__u32 first_gws; /* from KFD */
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};
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struct kfd_ioctl_get_dmabuf_info_args {
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__u64 size; /* from KFD */
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__u64 metadata_ptr; /* to KFD */
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@@ -426,6 +443,13 @@ struct kfd_ioctl_import_dmabuf_args {
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__u32 dmabuf_fd; /* to KFD */
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};
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/* Register offset inside the remapped mmio page
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*/
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enum kfd_mmio_remap {
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KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL = 0,
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KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL = 4,
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};
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#define AMDKFD_IOCTL_BASE 'K'
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#define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
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#define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type)
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@@ -520,7 +544,10 @@ struct kfd_ioctl_import_dmabuf_args {
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#define AMDKFD_IOC_IMPORT_DMABUF \
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AMDKFD_IOWR(0x1D, struct kfd_ioctl_import_dmabuf_args)
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#define AMDKFD_IOC_ALLOC_QUEUE_GWS \
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AMDKFD_IOWR(0x1E, struct kfd_ioctl_alloc_queue_gws_args)
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#define AMDKFD_COMMAND_START 0x01
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#define AMDKFD_COMMAND_END 0x1E
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#define AMDKFD_COMMAND_END 0x1F
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#endif
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