Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma
Pull rdma updates from Jason Gunthorpe: "The majority of the patches are cleanups, refactorings and clarity improvements. This cycle saw some more activity from Syzkaller, I think we are now clean on all but one of those bugs, including the long standing and obnoxious rdma_cm locking design defect. Continue to see many drivers getting cleanups, with a few new user visible features. Summary: - Various driver updates for siw, bnxt_re, rxe, efa, mlx5, hfi1 - Lots of cleanup patches for hns - Convert more places to use refcount - Aggressively lock the RDMA CM code that syzkaller says isn't working - Work to clarify ib_cm - Use the new ib_device lifecycle model in bnxt_re - Fix mlx5's MR cache which seems to be failing more often with the new ODP code - mlx5 'dynamic uar' and 'tx steering' user interfaces" * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: (144 commits) RDMA/bnxt_re: make bnxt_re_ib_init static IB/qib: Delete struct qib_ivdev.qp_rnd RDMA/hns: Fix uninitialized variable bug RDMA/hns: Modify the mask of QP number for CQE of hip08 RDMA/hns: Reduce the maximum number of extend SGE per WQE RDMA/hns: Reduce PFC frames in congestion scenarios RDMA/mlx5: Add support for RDMA TX flow table net/mlx5: Add support for RDMA TX steering IB/hfi1: Call kobject_put() when kobject_init_and_add() fails IB/hfi1: Fix memory leaks in sysfs registration and unregistration IB/mlx5: Move to fully dynamic UAR mode once user space supports it IB/mlx5: Limit the scope of struct mlx5_bfreg_info to mlx5_ib IB/mlx5: Extend QP creation to get uar page index from user space IB/mlx5: Extend CQ creation to get uar page index from user space IB/mlx5: Expose UAR object and its alloc/destroy commands IB/hfi1: Get rid of a warning RDMA/hns: Remove redundant judgment of qp_type RDMA/hns: Remove redundant assignment of wc->smac when polling cq RDMA/hns: Remove redundant qpc setup operations RDMA/hns: Remove meaningless prints ...
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@@ -1211,6 +1211,12 @@ enum mlx5_qcam_feature_groups {
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#define MLX5_CAP_FLOWTABLE_RDMA_RX_MAX(mdev, cap) \
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MLX5_CAP_FLOWTABLE_MAX(mdev, flow_table_properties_nic_receive_rdma.cap)
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#define MLX5_CAP_FLOWTABLE_RDMA_TX(mdev, cap) \
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MLX5_CAP_FLOWTABLE(mdev, flow_table_properties_nic_transmit_rdma.cap)
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#define MLX5_CAP_FLOWTABLE_RDMA_TX_MAX(mdev, cap) \
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MLX5_CAP_FLOWTABLE_MAX(mdev, flow_table_properties_nic_transmit_rdma.cap)
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#define MLX5_CAP_ESW_FLOWTABLE(mdev, cap) \
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MLX5_GET(flow_table_eswitch_cap, \
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mdev->caps.hca_cur[MLX5_CAP_ESWITCH_FLOW_TABLE], cap)
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@@ -213,23 +213,6 @@ enum mlx5_port_status {
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MLX5_PORT_DOWN = 2,
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};
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struct mlx5_bfreg_info {
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u32 *sys_pages;
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int num_low_latency_bfregs;
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unsigned int *count;
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/*
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* protect bfreg allocation data structs
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*/
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struct mutex lock;
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u32 ver;
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bool lib_uar_4k;
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u32 num_sys_pages;
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u32 num_static_sys_pages;
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u32 total_num_bfregs;
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u32 num_dyn_bfregs;
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};
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struct mlx5_cmd_first {
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__be32 data[4];
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};
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@@ -77,6 +77,7 @@ enum mlx5_flow_namespace_type {
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MLX5_FLOW_NAMESPACE_EGRESS,
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MLX5_FLOW_NAMESPACE_RDMA_RX,
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MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL,
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MLX5_FLOW_NAMESPACE_RDMA_TX,
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};
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enum {
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@@ -709,7 +709,7 @@ struct mlx5_ifc_flow_table_nic_cap_bits {
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struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
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u8 reserved_at_a00[0x200];
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struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_rdma;
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struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
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@@ -879,7 +879,11 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
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u8 swp_csum[0x1];
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u8 swp_lso[0x1];
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u8 cqe_checksum_full[0x1];
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u8 reserved_at_24[0x5];
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u8 tunnel_stateless_geneve_tx[0x1];
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u8 tunnel_stateless_mpls_over_udp[0x1];
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u8 tunnel_stateless_mpls_over_gre[0x1];
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u8 tunnel_stateless_vxlan_gpe[0x1];
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u8 tunnel_stateless_ipv4_over_vxlan[0x1];
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u8 tunnel_stateless_ip_over_ip[0x1];
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u8 reserved_at_2a[0x6];
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u8 max_vxlan_udp_ports[0x8];
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