Alignment in mv643xx_eth
The driver contains this little piece of candy: #if defined(CONFIG_DMA_NONCOHERENT) || defined(CONFIG_NOT_COHERENT_CACHE) #define ETH_DMA_ALIGN L1_CACHE_BYTES #else #define ETH_DMA_ALIGN 8 #endif Any reason why we're not using dma_get_cache_alignment() instead? Ralf Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Cette révision appartient à :

révisé par
Jeff Garzik

Parent
92b0c4e240
révision
908b637fe7
@@ -42,17 +42,6 @@
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#define MAX_DESCS_PER_SKB 1
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#endif
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/*
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* The MV643XX HW requires 8-byte alignment. However, when I/O
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* is non-cache-coherent, we need to ensure that the I/O buffers
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* we use don't share cache lines with other data.
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*/
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#if defined(CONFIG_DMA_NONCOHERENT) || defined(CONFIG_NOT_COHERENT_CACHE)
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#define ETH_DMA_ALIGN L1_CACHE_BYTES
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#else
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#define ETH_DMA_ALIGN 8
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#endif
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#define ETH_VLAN_HLEN 4
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#define ETH_FCS_LEN 4
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#define ETH_HW_IP_ALIGN 2 /* hw aligns IP header */
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