drm/i915/gvt: cleanup usage for typed mmio reg vs. offset
We had previous hack that tried to accept either i915_reg_t or offset value to access vGPU virtual/shadow regs which broke that purpose to be type safe in context. This one trys to explicitly separate the usage of typed mmio reg with real offset. Old vgpu_vreg(offset) helper is used only for offset now with new vgpu_vreg_t(reg) is used for i915_reg_t only. Convert left usage of that to new helper. Also fixed left KASAN warning issues caused by previous hack. v2: rebase, fixup against recent mmio switch change Reviewed-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
此提交包含在:
@@ -38,25 +38,25 @@
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void populate_pvinfo_page(struct intel_vgpu *vgpu)
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{
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/* setup the ballooning information */
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vgpu_vreg64(vgpu, vgtif_reg(magic)) = VGT_MAGIC;
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vgpu_vreg(vgpu, vgtif_reg(version_major)) = 1;
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vgpu_vreg(vgpu, vgtif_reg(version_minor)) = 0;
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vgpu_vreg(vgpu, vgtif_reg(display_ready)) = 0;
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vgpu_vreg(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
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vgpu_vreg64_t(vgpu, vgtif_reg(magic)) = VGT_MAGIC;
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vgpu_vreg_t(vgpu, vgtif_reg(version_major)) = 1;
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vgpu_vreg_t(vgpu, vgtif_reg(version_minor)) = 0;
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vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0;
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vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
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vgpu_vreg(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT;
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vgpu_vreg(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
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vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT;
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vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
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vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
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vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
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vgpu_aperture_gmadr_base(vgpu);
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vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) =
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vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) =
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vgpu_aperture_sz(vgpu);
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vgpu_vreg(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) =
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vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) =
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vgpu_hidden_gmadr_base(vgpu);
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vgpu_vreg(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) =
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vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) =
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vgpu_hidden_sz(vgpu);
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vgpu_vreg(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu);
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vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu);
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gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id);
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gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n",
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