Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf updates from Ingo Molnar: "The main kernel changes were: - add support for Intel's "adaptive PEBS v4" - which embedds LBS data in PEBS records and can thus batch up and reduce the IRQ (NMI) rate significantly - reducing overhead and making call-graph profiling less intrusive. - add Intel CPU core and uncore support updates for Tremont, Icelake, - extend the x86 PMU constraints scheduler with 'constraint ranges' to better support Icelake hw constraints, - make x86 call-chain support work better with CONFIG_FRAME_POINTER=y - misc other changes Tooling changes: - updates to the main tools: 'perf record', 'perf trace', 'perf stat' - updated Intel and S/390 vendor events - libtraceevent updates - misc other updates and fixes" * 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (69 commits) perf/x86: Make perf callchains work without CONFIG_FRAME_POINTER watchdog: Fix typo in comment perf/x86/intel: Add Tremont core PMU support perf/x86/intel/uncore: Add Intel Icelake uncore support perf/x86/msr: Add Icelake support perf/x86/intel/rapl: Add Icelake support perf/x86/intel/cstate: Add Icelake support perf/x86/intel: Add Icelake support perf/x86: Support constraint ranges perf/x86/lbr: Avoid reading the LBRs when adaptive PEBS handles them perf/x86/intel: Support adaptive PEBS v4 perf/x86/intel/ds: Extract code of event update in short period perf/x86/intel: Extract memory code PEBS parser for reuse perf/x86: Support outputting XMM registers perf/x86/intel: Force resched when TFA sysctl is modified perf/core: Add perf_pmu_resched() as global function perf/headers: Fix stale comment for struct perf_addr_filter perf/core: Make perf_swevent_init_cpu() static perf/x86: Add sanity checks to x86_schedule_events() perf/x86: Optimize x86_schedule_events() ...
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@@ -2478,6 +2478,16 @@ static void ctx_resched(struct perf_cpu_context *cpuctx,
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perf_pmu_enable(cpuctx->ctx.pmu);
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}
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void perf_pmu_resched(struct pmu *pmu)
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{
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struct perf_cpu_context *cpuctx = this_cpu_ptr(pmu->pmu_cpu_context);
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struct perf_event_context *task_ctx = cpuctx->task_ctx;
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perf_ctx_lock(cpuctx, task_ctx);
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ctx_resched(cpuctx, task_ctx, EVENT_ALL|EVENT_CPU);
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perf_ctx_unlock(cpuctx, task_ctx);
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}
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/*
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* Cross CPU call to install and enable a performance event
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*
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@@ -11917,7 +11927,7 @@ static void __init perf_event_init_all_cpus(void)
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}
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}
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void perf_swevent_init_cpu(unsigned int cpu)
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static void perf_swevent_init_cpu(unsigned int cpu)
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{
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struct swevent_htable *swhash = &per_cpu(swevent_htable, cpu);
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@@ -590,7 +590,7 @@ static void lockup_detector_reconfigure(void)
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* Create the watchdog thread infrastructure and configure the detector(s).
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*
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* The threads are not unparked as watchdog_allowed_mask is empty. When
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* the threads are sucessfully initialized, take the proper locks and
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* the threads are successfully initialized, take the proper locks and
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* unpark the threads in the watchdog_cpumask if the watchdog is enabled.
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*/
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static __init void lockup_detector_setup(void)
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