mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codes
This patch renames the SPINOR_OP_* macros of the 4-byte address instruction set so the new names all share a common pattern: the 4-byte address name is built from the 3-byte address name appending the "_4B" suffix. The patch also introduces new op codes to support other SPI protocols such as SPI 1-4-4 and SPI 1-2-2. This is a transitional patch and will help a later patch of spi-nor.c to automate the translation from the 3-byte address op codes into their 4-byte address version. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Marek Vasut <marek.vasut@gmail.com>
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@@ -43,9 +43,13 @@
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#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
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#define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */
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#define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */
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#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */
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#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */
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#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */
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#define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */
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#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */
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#define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */
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#define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */
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#define SPINOR_OP_PP_1_1_4 0x32 /* Quad page program */
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#define SPINOR_OP_PP_1_4_4 0x38 /* Quad page program */
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#define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */
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#define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */
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#define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */
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@@ -56,11 +60,17 @@
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#define SPINOR_OP_RDFSR 0x70 /* Read flag status register */
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/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
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#define SPINOR_OP_READ4 0x13 /* Read data bytes (low frequency) */
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#define SPINOR_OP_READ4_FAST 0x0c /* Read data bytes (high frequency) */
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#define SPINOR_OP_READ4_1_1_2 0x3c /* Read data bytes (Dual SPI) */
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#define SPINOR_OP_READ4_1_1_4 0x6c /* Read data bytes (Quad SPI) */
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#define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */
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#define SPINOR_OP_READ_FAST_4B 0x0c /* Read data bytes (high frequency) */
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#define SPINOR_OP_READ_1_1_2_4B 0x3c /* Read data bytes (Dual Output SPI) */
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#define SPINOR_OP_READ_1_2_2_4B 0xbc /* Read data bytes (Dual I/O SPI) */
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#define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */
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#define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */
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#define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */
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#define SPINOR_OP_PP_1_1_4_4B 0x34 /* Quad page program */
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#define SPINOR_OP_PP_1_4_4_4B 0x3e /* Quad page program */
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#define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */
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#define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */
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#define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */
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/* Used for SST flashes only. */
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