iwlagn: more cleanup to remove unused reference
More cleanup code, no functional changes Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
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@@ -107,17 +107,7 @@
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* device. A queue maps to only one (selectable by driver) Tx DMA channel,
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* but one DMA channel may take input from several queues.
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*
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* Tx DMA FIFOs have dedicated purposes. For 4965, they are used as follows
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* (cf. default_queue_to_tx_fifo in iwl-4965.c):
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*
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* 0 -- EDCA BK (background) frames, lowest priority
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* 1 -- EDCA BE (best effort) frames, normal priority
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* 2 -- EDCA VI (video) frames, higher priority
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* 3 -- EDCA VO (voice) and management frames, highest priority
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* 4 -- Commands (e.g. RXON, etc.)
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* 5 -- unused (HCCA)
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* 6 -- unused (HCCA)
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* 7 -- not used by driver (device-internal only)
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* Tx DMA FIFOs have dedicated purposes.
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*
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* For 5000 series and up, they are used differently
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* (cf. iwl5000_default_queue_to_tx_fifo in iwl-5000.c):
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@@ -151,7 +141,7 @@
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* Tx completion may end up being out-of-order).
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*
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* The driver must maintain the queue's Byte Count table in host DRAM
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* (struct iwl4965_sched_queue_byte_cnt_tbl) for this mode.
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* for this mode.
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* This mode does not support fragmentation.
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*
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* 2) FIFO (a.k.a. non-Scheduler-ACK), in which each TFD is processed in order.
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@@ -164,7 +154,7 @@
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*
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* Driver controls scheduler operation via 3 means:
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* 1) Scheduler registers
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* 2) Shared scheduler data base in internal 4956 SRAM
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* 2) Shared scheduler data base in internal SRAM
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* 3) Shared data in host DRAM
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*
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* Initialization:
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