dt-bindings: clock: Introduce QCOM LPASS clock bindings
Add device tree bindings for Low Power Audio subsystem clock controller for Qualcomm Technology Inc's SDM845 SoCs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
@@ -197,6 +197,8 @@
|
||||
#define GCC_QSPI_CORE_CLK_SRC 187
|
||||
#define GCC_QSPI_CORE_CLK 188
|
||||
#define GCC_QSPI_CNOC_PERIPH_AHB_CLK 189
|
||||
#define GCC_LPASS_Q6_AXI_CLK 190
|
||||
#define GCC_LPASS_SWAY_CLK 191
|
||||
|
||||
/* GCC Resets */
|
||||
#define GCC_MMSS_BCR 0
|
||||
|
15
include/dt-bindings/clock/qcom,lpass-sdm845.h
Normal file
15
include/dt-bindings/clock/qcom,lpass-sdm845.h
Normal file
@@ -0,0 +1,15 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_CLK_SDM_LPASS_SDM845_H
|
||||
#define _DT_BINDINGS_CLK_SDM_LPASS_SDM845_H
|
||||
|
||||
#define LPASS_Q6SS_AHBM_AON_CLK 0
|
||||
#define LPASS_Q6SS_AHBS_AON_CLK 1
|
||||
#define LPASS_QDSP6SS_XO_CLK 2
|
||||
#define LPASS_QDSP6SS_SLEEP_CLK 3
|
||||
#define LPASS_QDSP6SS_CORE_CLK 4
|
||||
|
||||
#endif
|
Reference in New Issue
Block a user