x86: merge tsc_init and clocksource code
Unify the clocksource code. Unify the tsc_init code. Signed-off-by: Alok N Kataria <akataria@vmware.com> Signed-off-by: Dan Hecht <dhecht@vmware.com> Cc: Dan Hecht <dhecht@vmware.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Ingo Molnar

parent
2dbe06faf3
commit
8fbbc4b45c
@@ -56,7 +56,7 @@ static irqreturn_t timer_event_interrupt(int irq, void *dev_id)
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/* calibrate_cpu is used on systems with fixed rate TSCs to determine
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* processor frequency */
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#define TICK_COUNT 100000000
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static unsigned long __init calibrate_cpu(void)
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unsigned long __init calibrate_cpu(void)
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{
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int tsc_start, tsc_now;
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int i, no_ctr_free;
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@@ -114,41 +114,13 @@ void __init hpet_time_init(void)
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setup_irq(0, &irq0);
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}
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extern void set_cyc2ns_scale(unsigned long cpu_khz, int cpu);
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void __init time_init(void)
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{
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int cpu;
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cpu_khz = calculate_cpu_khz();
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tsc_khz = cpu_khz;
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if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
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(boot_cpu_data.x86_vendor == X86_VENDOR_AMD))
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cpu_khz = calibrate_cpu();
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lpj_fine = ((unsigned long)tsc_khz * 1000)/HZ;
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if (unsynchronized_tsc())
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mark_tsc_unstable("TSCs unsynchronized");
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tsc_init();
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if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
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vgetcpu_mode = VGETCPU_RDTSCP;
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else
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vgetcpu_mode = VGETCPU_LSL;
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printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
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cpu_khz / 1000, cpu_khz % 1000);
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/*
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* Secondary CPUs do not run through tsc_init(), so set up
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* all the scale factors for all CPUs, assuming the same
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* speed as the bootup CPU. (cpufreq notifiers will fix this
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* up if their speed diverges)
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*/
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for_each_possible_cpu(cpu)
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set_cyc2ns_scale(cpu_khz, cpu);
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init_tsc_clocksource();
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late_time_init = choose_time_init();
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}
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