drm/i915: Explicitly pin the logical context for execbuf
In order to separate the reservation phase of building a request from its emission phase, we need to pull some of the request alloc activities from deep inside i915_request to the surface, GEM_EXECBUFFER. v2: Be frivolous, use a local drm_i915_private. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190425050143.811-1-chris@chris-wilson.co.uk
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@@ -785,7 +785,6 @@ i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context *ctx)
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struct drm_i915_private *i915 = engine->i915;
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struct intel_context *ce;
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struct i915_request *rq;
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int ret;
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/*
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* Preempt contexts are reserved for exclusive use to inject a
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@@ -794,14 +793,6 @@ i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context *ctx)
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*/
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GEM_BUG_ON(ctx == i915->preempt_context);
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/*
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* ABI: Before userspace accesses the GPU (e.g. execbuffer), report
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* EIO if the GPU is already wedged.
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*/
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ret = i915_terminally_wedged(i915);
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if (ret)
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return ERR_PTR(ret);
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/*
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* Pinning the contexts may generate requests in order to acquire
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* GGTT space, so do this first before we reserve a seqno for
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