Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 platform updates from Ingo Molnar: "The main changes in this cycle were: - Intel-SoC enhancements (Andy Shevchenko) - Intel CPU symbolic model definition rework (Dave Hansen) - ... other misc changes" * 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (25 commits) x86/sfi: Enable enumeration of SD devices x86/pci: Use MRFLD abbreviation for Merrifield x86/platform/intel-mid: Make vertical indentation consistent x86/platform/intel-mid: Mark regulators explicitly defined x86/platform/intel-mid: Rename mrfl.c to mrfld.c x86/platform/intel-mid: Enable spidev on Intel Edison boards x86/platform/intel-mid: Extend PWRMU to support Penwell x86/pci, x86/platform/intel_mid_pci: Remove duplicate power off code x86/platform/intel-mid: Add pinctrl for Intel Merrifield x86/platform/intel-mid: Enable GPIO expanders on Edison x86/platform/intel-mid: Add Power Management Unit driver x86/platform/atom/punit: Enable support for Merrifield x86/platform/intel_mid_pci: Rework IRQ0 workaround x86, thermal: Clean up and fix CPU model detection for intel_soc_dts_thermal x86, mmc: Use Intel family name macros for mmc driver x86/intel_telemetry: Use Intel family name macros for telemetry driver x86/acpi/lss: Use Intel family name macros for the acpi_lpss driver x86/cpufreq: Use Intel family name macros for the intel_pstate cpufreq driver x86/platform: Use new Intel model number macros x86/intel_idle: Use Intel family macros for intel_idle ...
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@@ -36,7 +36,8 @@
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#define PCIE_CAP_OFFSET 0x100
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/* Quirks for the listed devices */
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#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190
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#define PCI_DEVICE_ID_INTEL_MRFLD_MMC 0x1190
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#define PCI_DEVICE_ID_INTEL_MRFLD_HSU 0x1191
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/* Fixed BAR fields */
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#define PCIE_VNDR_CAP_ID_FIXED_BAR 0x00 /* Fixed BAR (TBD) */
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@@ -224,14 +225,21 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
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/* Special treatment for IRQ0 */
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if (dev->irq == 0) {
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/*
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* Skip HS UART common registers device since it has
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* IRQ0 assigned and not used by the kernel.
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*/
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if (dev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU)
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return -EBUSY;
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/*
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* TNG has IRQ0 assigned to eMMC controller. But there
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* are also other devices with bogus PCI configuration
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* that have IRQ0 assigned. This check ensures that
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* eMMC gets it.
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* eMMC gets it. The rest of devices still could be
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* enabled without interrupt line being allocated.
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*/
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if (dev->device != PCI_DEVICE_ID_INTEL_MRFL_MMC)
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return -EBUSY;
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if (dev->device != PCI_DEVICE_ID_INTEL_MRFLD_MMC)
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return 0;
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}
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break;
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default:
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@@ -308,14 +316,39 @@ static void pci_d3delay_fixup(struct pci_dev *dev)
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_d3delay_fixup);
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static void mrst_power_off_unused_dev(struct pci_dev *dev)
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static void mid_power_off_one_device(struct pci_dev *dev)
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{
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u16 pmcsr;
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/*
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* Update current state first, otherwise PCI core enforces PCI_D0 in
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* pci_set_power_state() for devices which status was PCI_UNKNOWN.
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*/
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pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
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dev->current_state = (pci_power_t __force)(pmcsr & PCI_PM_CTRL_STATE_MASK);
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pci_set_power_state(dev, PCI_D3hot);
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0801, mrst_power_off_unused_dev);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0809, mrst_power_off_unused_dev);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x080C, mrst_power_off_unused_dev);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0815, mrst_power_off_unused_dev);
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static void mid_power_off_devices(struct pci_dev *dev)
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{
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int id;
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if (!pci_soc_mode)
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return;
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id = intel_mid_pwr_get_lss_id(dev);
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if (id < 0)
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return;
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/*
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* This sets only PMCSR bits. The actual power off will happen in
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* arch/x86/platform/intel-mid/pwr.c.
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*/
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mid_power_off_one_device(dev);
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, mid_power_off_devices);
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/*
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* Langwell devices reside at fixed offsets, don't try to move them.
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