net/mlx5: Add core support for double vlan push/pop steering action
As newer firmware supports double push/pop in a single FTE, we add core bits and extend vlan action logic for it. Signed-off-by: Jianbo Liu <jianbol@mellanox.com> Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Saeed Mahameed

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5e022dd353
commit
8da6fe2a18
@@ -152,6 +152,8 @@ struct mlx5_fs_vlan {
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u8 prio;
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};
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#define MLX5_FS_VLAN_DEPTH 2
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struct mlx5_flow_act {
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u32 action;
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bool has_flow_tag;
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@@ -159,7 +161,7 @@ struct mlx5_flow_act {
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u32 encap_id;
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u32 modify_id;
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uintptr_t esp_id;
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struct mlx5_fs_vlan vlan;
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struct mlx5_fs_vlan vlan[MLX5_FS_VLAN_DEPTH];
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struct ib_counters *counters;
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};
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@@ -337,7 +337,10 @@ struct mlx5_ifc_flow_table_prop_layout_bits {
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u8 reserved_at_9[0x1];
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u8 pop_vlan[0x1];
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u8 push_vlan[0x1];
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u8 reserved_at_c[0x14];
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u8 reserved_at_c[0x1];
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u8 pop_vlan_2[0x1];
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u8 push_vlan_2[0x1];
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u8 reserved_at_f[0x11];
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u8 reserved_at_20[0x2];
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u8 log_max_ft_size[0x6];
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@@ -2386,6 +2389,8 @@ enum {
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MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
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MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
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MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH = 0x100,
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MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2 = 0x400,
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MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2 = 0x800,
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};
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struct mlx5_ifc_vlan_bits {
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@@ -2416,7 +2421,9 @@ struct mlx5_ifc_flow_context_bits {
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u8 modify_header_id[0x20];
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u8 reserved_at_100[0x100];
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struct mlx5_ifc_vlan_bits push_vlan_2;
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u8 reserved_at_120[0xe0];
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struct mlx5_ifc_fte_match_param_bits match_value;
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