net/mlx5: Add core support for double vlan push/pop steering action

As newer firmware supports double push/pop in a single FTE, we add
core bits and extend vlan action logic for it.

Signed-off-by: Jianbo Liu <jianbol@mellanox.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This commit is contained in:
Jianbo Liu
2018-07-16 18:35:32 -07:00
committed by Saeed Mahameed
parent 5e022dd353
commit 8da6fe2a18
6 changed files with 29 additions and 10 deletions

View File

@@ -152,6 +152,8 @@ struct mlx5_fs_vlan {
u8 prio;
};
#define MLX5_FS_VLAN_DEPTH 2
struct mlx5_flow_act {
u32 action;
bool has_flow_tag;
@@ -159,7 +161,7 @@ struct mlx5_flow_act {
u32 encap_id;
u32 modify_id;
uintptr_t esp_id;
struct mlx5_fs_vlan vlan;
struct mlx5_fs_vlan vlan[MLX5_FS_VLAN_DEPTH];
struct ib_counters *counters;
};

View File

@@ -337,7 +337,10 @@ struct mlx5_ifc_flow_table_prop_layout_bits {
u8 reserved_at_9[0x1];
u8 pop_vlan[0x1];
u8 push_vlan[0x1];
u8 reserved_at_c[0x14];
u8 reserved_at_c[0x1];
u8 pop_vlan_2[0x1];
u8 push_vlan_2[0x1];
u8 reserved_at_f[0x11];
u8 reserved_at_20[0x2];
u8 log_max_ft_size[0x6];
@@ -2386,6 +2389,8 @@ enum {
MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH = 0x100,
MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2 = 0x400,
MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2 = 0x800,
};
struct mlx5_ifc_vlan_bits {
@@ -2416,7 +2421,9 @@ struct mlx5_ifc_flow_context_bits {
u8 modify_header_id[0x20];
u8 reserved_at_100[0x100];
struct mlx5_ifc_vlan_bits push_vlan_2;
u8 reserved_at_120[0xe0];
struct mlx5_ifc_fte_match_param_bits match_value;