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powerpc/86xx: Add power management support for MPC8610HPCD boards

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This patch adds needed nodes and properties to support suspend/resume
on the MPC8610HPCD boards.

There is a dedicated switch (SW9) that is used to wake up the boards.
By default the SW9 button is routed to IRQ8, but could be re-routed
(via PIXIS) to sreset.

With 'no_console_suspend' kernel command line argument specified, the
board is also able to wakeup upon serial port input.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Scott Wood <scottwood@freescale.com> [dts]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Anton Vorontsov
2009-09-16 01:44:00 +04:00
committed by Kumar Gala
parent 3cfee0aaa1
commit 8c68e2f788
3 changed files with 74 additions and 4 deletions
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26
arch/powerpc/boot/dts/mpc8610_hpcd.dts
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@@ -35,6 +35,8 @@
i-cache-line-size = <32>;
d-cache-size = <32768>; // L1
i-cache-size = <32768>; // L1
sleep = <&pmc 0x00008000 0 // core
&pmc 0x00004000 0>; // timebase
timebase-frequency = <0>; // From uboot
bus-frequency = <0>; // From uboot
clock-frequency = <0>; // From uboot
@@ -60,6 +62,7 @@
5 0 0xe8480000 0x00008000
6 0 0xe84c0000 0x00008000
3 0 0xe8000000 0x00000020>;
sleep = <&pmc 0x08000000 0>;
flash@0,0 {
compatible = "cfi-flash";
@@ -105,6 +108,8 @@
compatible = "fsl,fpga-pixis";
reg = <3 0 0x20>;
ranges = <0 3 0 0x20>;
interrupt-parent = <&mpic>;
interrupts = <8 8>;
sdcsr_pio: gpio-controller@a {
#gpio-cells = <2>;
@@ -163,6 +168,7 @@
reg = <0x3100 0x100>;
interrupts = <43 2>;
interrupt-parent = <&mpic>;
sleep = <&pmc 0x00000004 0>;
dfsrr;
};
@@ -174,6 +180,7 @@
clock-frequency = <0>;
interrupts = <42 2>;
interrupt-parent = <&mpic>;
sleep = <&pmc 0x00000002 0>;
};
serial1: serial@4600 {
@@ -184,6 +191,7 @@
clock-frequency = <0>;
interrupts = <42 2>;
interrupt-parent = <&mpic>;
sleep = <&pmc 0x00000008 0>;
};
spi@7000 {
@@ -196,6 +204,7 @@
interrupt-parent = <&mpic>;
mode = "cpu";
gpios = <&sdcsr_pio 7 0>;
sleep = <&pmc 0x00000800 0>;
mmc-slot@0 {
compatible = "fsl,mpc8610hpcd-mmc-slot",
@@ -213,6 +222,7 @@
reg = <0x2c000 100>;
interrupts = <72 2>;
interrupt-parent = <&mpic>;
sleep = <&pmc 0x04000000 0>;
};
mpic: interrupt-controller@40000 {
@@ -241,9 +251,18 @@
};
global-utilities@e0000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8610-guts";
reg = <0xe0000 0x1000>;
ranges = <0 0xe0000 0x1000>;
fsl,has-rstcr;
pmc: power@70 {
compatible = "fsl,mpc8610-pmc",
"fsl,mpc8641d-pmc";
reg = <0x70 0x20>;
};
};
wdt@e4000 {
@@ -262,6 +281,7 @@
fsl,playback-dma = <&dma00>;
fsl,capture-dma = <&dma01>;
fsl,fifo-depth = <8>;
sleep = <&pmc 0 0x08000000>;
};
ssi@16100 {
@@ -271,6 +291,7 @@
interrupt-parent = <&mpic>;
interrupts = <63 2>;
fsl,fifo-depth = <8>;
sleep = <&pmc 0 0x04000000>;
};
dma@21300 {
@@ -280,6 +301,7 @@
cell-index = <0>;
reg = <0x21300 0x4>; /* DMA general status register */
ranges = <0x0 0x21100 0x200>;
sleep = <&pmc 0x00000400 0>;
dma00: dma-channel@0 {
compatible = "fsl,mpc8610-dma-channel",
@@ -322,6 +344,7 @@
cell-index = <1>;
reg = <0xc300 0x4>; /* DMA general status register */
ranges = <0x0 0xc100 0x200>;
sleep = <&pmc 0x00000200 0>;
dma-channel@0 {
compatible = "fsl,mpc8610-dma-channel",
@@ -369,6 +392,7 @@
bus-range = <0 0>;
ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe1000000 0x0 0x00100000>;
sleep = <&pmc 0x80000000 0>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <24 2>;
@@ -398,6 +422,7 @@
bus-range = <1 3>;
ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
sleep = <&pmc 0x40000000 0>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <26 2>;
@@ -474,6 +499,7 @@
0x0000 0 0 4 &mpic 7 1>;
interrupt-parent = <&mpic>;
interrupts = <25 2>;
sleep = <&pmc 0x20000000 0>;
clock-frequency = <33333333>;
};
};