Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
This commit is contained in:
@@ -96,6 +96,7 @@
|
||||
#define PRID_IMP_1004K 0x9900
|
||||
#define PRID_IMP_1074K 0x9a00
|
||||
#define PRID_IMP_M14KC 0x9c00
|
||||
#define PRID_IMP_M14KEC 0x9e00
|
||||
|
||||
/*
|
||||
* These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
|
||||
@@ -264,6 +265,7 @@ enum cpu_type_enum {
|
||||
CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
|
||||
CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,
|
||||
CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, CPU_M14KC,
|
||||
CPU_M14KEC,
|
||||
|
||||
/*
|
||||
* MIPS64 class processors
|
||||
@@ -322,6 +324,7 @@ enum cpu_type_enum {
|
||||
#define MIPS_CPU_ULRI 0x00200000 /* CPU has ULRI feature */
|
||||
#define MIPS_CPU_PCI 0x00400000 /* CPU has Perf Ctr Int indicator */
|
||||
#define MIPS_CPU_RIXI 0x00800000 /* CPU has TLB Read/eXec Inhibit */
|
||||
#define MIPS_CPU_MICROMIPS 0x01000000 /* CPU has microMIPS capability */
|
||||
|
||||
/*
|
||||
* CPU ASE encodings
|
||||
@@ -333,6 +336,6 @@ enum cpu_type_enum {
|
||||
#define MIPS_ASE_DSP 0x00000010 /* Signal Processing ASE */
|
||||
#define MIPS_ASE_MIPSMT 0x00000020 /* CPU supports MIPS MT */
|
||||
#define MIPS_ASE_DSP2P 0x00000040 /* Signal Processing ASE Rev 2 */
|
||||
|
||||
#define MIPS_ASE_VZ 0x00000080 /* Virtualization ASE */
|
||||
|
||||
#endif /* _ASM_CPU_H */
|
||||
|
Reference in New Issue
Block a user