Merge branch 'sh/alphaproject' into sh-latest
This commit is contained in:
Paul Mundt
@@ -3,6 +3,9 @@ menu "Board support"
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config SOLUTION_ENGINE
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bool
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config SH_ALPHA_BOARD
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bool
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config SH_SOLUTION_ENGINE
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bool "SolutionEngine"
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select SOLUTION_ENGINE
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@@ -320,6 +323,21 @@ config SH_SH2007
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Compact Flash socket, two serial ports and PC-104 bus.
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More information at <http://sh2000.sh-linux.org>.
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config SH_APSH4A3A
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bool "AP-SH4A-3A"
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select SH_ALPHA_BOARD
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depends on CPU_SUBTYPE_SH7785
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help
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Select AP-SH4A-3A if configuring for an ALPHAPROJECT AP-SH4A-3A.
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config SH_APSH4AD0A
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bool "AP-SH4AD-0A"
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select SH_ALPHA_BOARD
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select SYS_SUPPORTS_PCI
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depends on CPU_SUBTYPE_SH7786
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help
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Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A.
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endmenu
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source "arch/sh/boards/mach-r2d/Kconfig"
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@@ -13,3 +13,5 @@ obj-$(CONFIG_SH_ESPT) += board-espt.o
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obj-$(CONFIG_SH_POLARIS) += board-polaris.o
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obj-$(CONFIG_SH_TITAN) += board-titan.o
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obj-$(CONFIG_SH_SH7757LCR) += board-sh7757lcr.o
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obj-$(CONFIG_SH_APSH4A3A) += board-apsh4a3a.o
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obj-$(CONFIG_SH_APSH4AD0A) += board-apsh4ad0a.o
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175
arch/sh/boards/board-apsh4a3a.c
Normal file
175
arch/sh/boards/board-apsh4a3a.c
Normal file
@@ -0,0 +1,175 @@
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/*
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* ALPHAPROJECT AP-SH4A-3A Support.
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*
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* Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
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* Copyright (C) 2008 Yoshihiro Shimoda
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* Copyright (C) 2009 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mtd/physmap.h>
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#include <linux/smsc911x.h>
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#include <linux/irq.h>
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#include <linux/clk.h>
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#include <asm/machvec.h>
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#include <asm/sizes.h>
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#include <asm/clock.h>
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static struct mtd_partition nor_flash_partitions[] = {
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{
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.name = "loader",
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.offset = 0x00000000,
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.size = 512 * 1024,
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},
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{
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.name = "bootenv",
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.offset = MTDPART_OFS_APPEND,
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.size = 512 * 1024,
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},
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = 4 * 1024 * 1024,
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},
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{
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.name = "data",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data nor_flash_data = {
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.width = 4,
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.parts = nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(nor_flash_partitions),
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};
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static struct resource nor_flash_resources[] = {
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[0] = {
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.start = 0x00000000,
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.end = 0x01000000 - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device nor_flash_device = {
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.name = "physmap-flash",
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.dev = {
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.platform_data = &nor_flash_data,
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},
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.num_resources = ARRAY_SIZE(nor_flash_resources),
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.resource = nor_flash_resources,
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};
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static struct resource smsc911x_resources[] = {
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[0] = {
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.name = "smsc911x-memory",
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.start = 0xA4000000,
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.end = 0xA4000000 + SZ_256 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.name = "smsc911x-irq",
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.start = evt2irq(0x200),
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.end = evt2irq(0x200),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct smsc911x_platform_config smsc911x_config = {
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
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.flags = SMSC911X_USE_16BIT,
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.phy_interface = PHY_INTERFACE_MODE_MII,
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};
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static struct platform_device smsc911x_device = {
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.name = "smsc911x",
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.id = -1,
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.num_resources = ARRAY_SIZE(smsc911x_resources),
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.resource = smsc911x_resources,
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.dev = {
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.platform_data = &smsc911x_config,
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},
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};
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static struct platform_device *apsh4a3a_devices[] __initdata = {
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&nor_flash_device,
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&smsc911x_device,
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};
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static int __init apsh4a3a_devices_setup(void)
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{
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return platform_add_devices(apsh4a3a_devices,
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ARRAY_SIZE(apsh4a3a_devices));
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}
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device_initcall(apsh4a3a_devices_setup);
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static int apsh4a3a_clk_init(void)
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{
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struct clk *clk;
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int ret;
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clk = clk_get(NULL, "extal");
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if (!clk || IS_ERR(clk))
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return PTR_ERR(clk);
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ret = clk_set_rate(clk, 33333000);
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clk_put(clk);
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return ret;
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}
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/* Initialize the board */
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static void __init apsh4a3a_setup(char **cmdline_p)
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{
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printk(KERN_INFO "Alpha Project AP-SH4A-3A support:\n");
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}
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static void __init apsh4a3a_init_irq(void)
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{
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plat_irq_setup_pins(IRQ_MODE_IRQ7654);
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}
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/* Return the board specific boot mode pin configuration */
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static int apsh4a3a_mode_pins(void)
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{
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int value = 0;
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/* These are the factory default settings of SW1 and SW2.
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* If you change these dip switches then you will need to
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* adjust the values below as well.
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*/
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value &= ~MODE_PIN0; /* Clock Mode 16 */
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value &= ~MODE_PIN1;
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value &= ~MODE_PIN2;
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value &= ~MODE_PIN3;
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value |= MODE_PIN4;
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value &= ~MODE_PIN5; /* 16-bit Area0 bus width */
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value |= MODE_PIN6; /* Area 0 SRAM interface */
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value |= MODE_PIN7;
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value |= MODE_PIN8; /* Little Endian */
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value |= MODE_PIN9; /* Master Mode */
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value |= MODE_PIN10; /* Crystal resonator */
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value |= MODE_PIN11; /* Display Unit */
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value |= MODE_PIN12;
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value &= ~MODE_PIN13; /* 29-bit address mode */
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value |= MODE_PIN14; /* No PLL step-up */
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return value;
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}
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/*
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* The Machine Vector
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*/
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static struct sh_machine_vector mv_apsh4a3a __initmv = {
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.mv_name = "AP-SH4A-3A",
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.mv_setup = apsh4a3a_setup,
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.mv_clk_init = apsh4a3a_clk_init,
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.mv_init_irq = apsh4a3a_init_irq,
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.mv_mode_pins = apsh4a3a_mode_pins,
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};
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125
arch/sh/boards/board-apsh4ad0a.c
Normal file
125
arch/sh/boards/board-apsh4ad0a.c
Normal file
@@ -0,0 +1,125 @@
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/*
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* ALPHAPROJECT AP-SH4AD-0A Support.
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*
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* Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
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* Copyright (C) 2010 Matt Fleming
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* Copyright (C) 2010 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/smsc911x.h>
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#include <linux/irq.h>
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#include <linux/clk.h>
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#include <asm/machvec.h>
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#include <asm/sizes.h>
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static struct resource smsc911x_resources[] = {
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[0] = {
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.name = "smsc911x-memory",
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.start = 0xA4000000,
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.end = 0xA4000000 + SZ_256 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.name = "smsc911x-irq",
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.start = evt2irq(0x200),
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.end = evt2irq(0x200),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct smsc911x_platform_config smsc911x_config = {
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
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.flags = SMSC911X_USE_16BIT,
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.phy_interface = PHY_INTERFACE_MODE_MII,
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};
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static struct platform_device smsc911x_device = {
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.name = "smsc911x",
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.id = -1,
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.num_resources = ARRAY_SIZE(smsc911x_resources),
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.resource = smsc911x_resources,
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.dev = {
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.platform_data = &smsc911x_config,
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},
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};
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static struct platform_device *apsh4ad0a_devices[] __initdata = {
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&smsc911x_device,
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};
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static int __init apsh4ad0a_devices_setup(void)
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{
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return platform_add_devices(apsh4ad0a_devices,
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ARRAY_SIZE(apsh4ad0a_devices));
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}
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device_initcall(apsh4ad0a_devices_setup);
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static int apsh4ad0a_mode_pins(void)
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{
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int value = 0;
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/* These are the factory default settings of SW1 and SW2.
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* If you change these dip switches then you will need to
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* adjust the values below as well.
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*/
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value |= MODE_PIN0; /* Clock Mode 3 */
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value |= MODE_PIN1;
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value &= ~MODE_PIN2;
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value &= ~MODE_PIN3;
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value &= ~MODE_PIN4; /* 16-bit Area0 bus width */
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value |= MODE_PIN5;
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value |= MODE_PIN6;
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value |= MODE_PIN7; /* Normal mode */
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value |= MODE_PIN8; /* Little Endian */
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value |= MODE_PIN9; /* Crystal resonator */
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value &= ~MODE_PIN10; /* 29-bit address mode */
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value &= ~MODE_PIN11; /* PCI-E Root port */
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value &= ~MODE_PIN12; /* 4 lane + 1 lane */
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value |= MODE_PIN13; /* AUD Enable */
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value &= ~MODE_PIN14; /* Normal Operation */
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return value;
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}
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static int apsh4ad0a_clk_init(void)
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{
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struct clk *clk;
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int ret;
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clk = clk_get(NULL, "extal");
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if (!clk || IS_ERR(clk))
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return PTR_ERR(clk);
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ret = clk_set_rate(clk, 33333000);
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clk_put(clk);
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return ret;
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}
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/* Initialize the board */
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static void __init apsh4ad0a_setup(char **cmdline_p)
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{
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pr_info("Alpha Project AP-SH4AD-0A support:\n");
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}
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static void __init apsh4ad0a_init_irq(void)
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{
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plat_irq_setup_pins(IRQ_MODE_IRQ3210);
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}
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/*
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* The Machine Vector
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*/
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static struct sh_machine_vector mv_apsh4ad0a __initmv = {
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.mv_name = "AP-SH4AD-0A",
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.mv_setup = apsh4ad0a_setup,
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.mv_mode_pins = apsh4ad0a_mode_pins,
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.mv_clk_init = apsh4ad0a_clk_init,
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.mv_init_irq = apsh4ad0a_init_irq,
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};
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