KVM: x86: add pcommit support
Pass PCOMMIT CPU feature to guest to enable PCOMMIT instruction Currently we do not catch pcommit instruction for L1 guest and allow L1 to catch this instruction for L2 if, as required by the spec, L1 can enumerate the PCOMMIT instruction via CPUID: | IA32_VMX_PROCBASED_CTLS2[53] (which enumerates support for the | 1-setting of PCOMMIT exiting) is always the same as | CPUID.07H:EBX.PCOMMIT[bit 22]. Thus, software can set PCOMMIT exiting | to 1 if and only if the PCOMMIT instruction is enumerated via CPUID The spec can be found at https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Paolo Bonzini

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@@ -78,6 +78,7 @@
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#define EXIT_REASON_PML_FULL 62
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#define EXIT_REASON_XSAVES 63
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#define EXIT_REASON_XRSTORS 64
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#define EXIT_REASON_PCOMMIT 65
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#define VMX_EXIT_REASONS \
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{ EXIT_REASON_EXCEPTION_NMI, "EXCEPTION_NMI" }, \
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@@ -126,7 +127,8 @@
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{ EXIT_REASON_INVVPID, "INVVPID" }, \
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{ EXIT_REASON_INVPCID, "INVPCID" }, \
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{ EXIT_REASON_XSAVES, "XSAVES" }, \
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{ EXIT_REASON_XRSTORS, "XRSTORS" }
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{ EXIT_REASON_XRSTORS, "XRSTORS" }, \
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{ EXIT_REASON_PCOMMIT, "PCOMMIT" }
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#define VMX_ABORT_SAVE_GUEST_MSR_FAIL 1
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#define VMX_ABORT_LOAD_HOST_MSR_FAIL 4
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