powerpc: Fix up dma_alloc_coherent() on platforms without cache coherency.
The implementation we just revived has issues, such as using a Kconfig-defined virtual address area in kernel space that nothing actually carves out (and thus will overlap whatever is there), or having some dependencies on being self contained in a single PTE page which adds unnecessary constraints on the kernel virtual address space. This fixes it by using more classic PTE accessors and automatically locating the area for consistent memory, carving an appropriate hole in the kernel virtual address space, leaving only the size of that area as a Kconfig option. It also brings some dma-mask related fixes from the ARM implementation which was almost identical initially but grew its own fixes. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@@ -26,7 +26,9 @@
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* allocate the space "normally" and use the cache management functions
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* to ensure it is consistent.
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*/
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extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
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struct device;
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extern void *__dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp);
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extern void __dma_free_coherent(size_t size, void *vaddr);
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extern void __dma_sync(void *vaddr, size_t size, int direction);
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extern void __dma_sync_page(struct page *page, unsigned long offset,
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@@ -37,7 +39,7 @@ extern void __dma_sync_page(struct page *page, unsigned long offset,
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* Cache coherent cores.
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*/
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#define __dma_alloc_coherent(gfp, size, handle) NULL
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#define __dma_alloc_coherent(dev, gfp, size, handle) NULL
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#define __dma_free_coherent(size, addr) ((void)0)
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#define __dma_sync(addr, size, rw) ((void)0)
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#define __dma_sync_page(pg, off, sz, rw) ((void)0)
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