ath9k_hw: Fix RTT calibration

This patch fixes multiple issues with the current RTT
implementation in ath9k.

* The data that is obtained from the RTT interface registers
  are stored in 31:5 - mask out the extra bits when reading them.

* A history buffer is maintained which is not needed at all.
  Remove this array and just store the baseband data for each
  chain (or bank).

* A 'num_readings' variable was being used to handle the
  last entry. But it was being used in an improper manner, with
  the result that the RTT values were never being written
  to the RTT Interface registers. Fix this by using a simple
  flag.

* Stop baseband operations before programming the calibration values
  to the HW.

* Do not restore RX gain settings as part of RTT.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Sujith Manoharan
2012-05-04 13:23:59 +05:30
committed by John W. Linville
parent 7d4e15b177
commit 8a90555fea
6 changed files with 89 additions and 70 deletions

View File

@@ -348,12 +348,6 @@ enum ath9k_int {
CHANNEL_HT40MINUS)
#define MAX_RTT_TABLE_ENTRY 6
#define RTT_HIST_MAX 3
struct ath9k_rtt_hist {
u32 table[AR9300_MAX_CHAINS][RTT_HIST_MAX][MAX_RTT_TABLE_ENTRY];
u8 num_readings;
};
#define MAX_IQCAL_MEASUREMENT 8
#define MAX_CL_TAB_ENTRY 16
@@ -363,6 +357,7 @@ struct ath9k_hw_cal_data {
int32_t CalValid;
int8_t iCoff;
int8_t qCoff;
bool rtt_done;
bool paprd_done;
bool nfcal_pending;
bool nfcal_interference;
@@ -373,8 +368,8 @@ struct ath9k_hw_cal_data {
u32 num_measures[AR9300_MAX_CHAINS];
int tx_corr_coeff[MAX_IQCAL_MEASUREMENT][AR9300_MAX_CHAINS];
u32 tx_clcal[AR9300_MAX_CHAINS][MAX_CL_TAB_ENTRY];
u32 rtt_table[AR9300_MAX_CHAINS][MAX_RTT_TABLE_ENTRY];
struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
struct ath9k_rtt_hist rtt_hist;
};
struct ath9k_channel {