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MIPS: Use copy_s.fmt rather than copy_u.fmt

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In revision 1.12 of the MSA specification, the copy_u.w instruction has
been removed for MIPS32 & the copy_u.d instruction has been removed for
MIPS64. Newer toolchains (eg. Codescape SDK essentials 2015.10) will
complain about this like so:

arch/mips/kernel/r4k_fpu.S:290: Error: opcode not supported on this
processor: mips32r2 (mips32r2) `copy_u.w $1,$w26[3]'

Since we always copy to the width of a GPR, simply use copy_s instead of
copy_u to fix this.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 4.3.x+
Patchwork: https://patchwork.linux-mips.org/patch/13061/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Paul Burton
2016-04-15 10:07:23 +01:00
committed by Ralf Baechle
parent 8e85f275e9
commit 8a3c8b48ac
2 changed files with 17 additions and 17 deletions
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10
arch/mips/kernel/r4k_fpu.S
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@@ -244,17 +244,17 @@ LEAF(\name)
.set push
.set noat
#ifdef CONFIG_64BIT
copy_u_d \wr, 1
copy_s_d \wr, 1
EX sd $1, \off(\base)
#elif defined(CONFIG_CPU_LITTLE_ENDIAN)
copy_u_w \wr, 2
copy_s_w \wr, 2
EX sw $1, \off(\base)
copy_u_w \wr, 3
copy_s_w \wr, 3
EX sw $1, (\off+4)(\base)
#else /* CONFIG_CPU_BIG_ENDIAN */
copy_u_w \wr, 2
copy_s_w \wr, 2
EX sw $1, (\off+4)(\base)
copy_u_w \wr, 3
copy_s_w \wr, 3
EX sw $1, \off(\base)
#endif
.set pop