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drm/amdgpu/gfx10: fix issues for suspend/resume

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1). use PREEMPT_QUEUE instead of RESET_QUEUE for gfx ring disablement.
2). Need wait for unmapping queue done before continue execution.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Tianci Yin <tianci.yin@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jack Xiao
2019-04-16 17:27:41 +08:00
committed by Alex Deucher
parent 948f540cd0
commit 8a33c4f194
1 changed files with 30 additions and 5 deletions
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35
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
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@@ -3544,8 +3544,9 @@ static int gfx_v10_0_hw_init(void *handle)
static int gfx10_0_disable_kgq(struct amdgpu_device *adev) static int gfx10_0_disable_kgq(struct amdgpu_device *adev)
{ {
struct amdgpu_kiq *kiq = &adev->gfx.kiq; struct amdgpu_kiq *kiq = &adev->gfx.kiq;
struct amdgpu_ring *kiq_ring = &kiq->ring; struct amdgpu_ring *ring, *kiq_ring = &kiq->ring;
int i; struct v10_gfx_mqd *mqd;
int r, i, j;
if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
return -EINVAL; return -EINVAL;
@@ -3554,9 +3555,33 @@ static int gfx10_0_disable_kgq(struct amdgpu_device *adev)
adev->gfx.num_gfx_rings)) adev->gfx.num_gfx_rings))
return -ENOMEM; return -ENOMEM;
for (i = 0; i < adev->gfx.num_gfx_rings; i++) for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
kiq->pmf->kiq_unmap_queues(kiq_ring, &adev->gfx.gfx_ring[i], ring = &adev->gfx.gfx_ring[i];
RESET_QUEUES, 0, 0);
r = amdgpu_bo_reserve(ring->mqd_obj, false);
if (unlikely(r != 0))
return r;
r = amdgpu_bo_kmap(ring->mqd_obj, (void **)&ring->mqd_ptr);
if (!r) {
kiq->pmf->kiq_unmap_queues(kiq_ring, ring,
PREEMPT_QUEUES, 0, 0);
mqd = ring->mqd_ptr;
for (j = 0; j < adev->usec_timeout; j++) {
if (!mqd->cp_gfx_hqd_active)
break;
udelay(1);
}
if (j == adev->usec_timeout)
DRM_ERROR("failed to wait for gfx inactive\n");
amdgpu_bo_kunmap(ring->mqd_obj);
ring->mqd_ptr = NULL;
}
amdgpu_bo_unreserve(ring->mqd_obj);
}
return amdgpu_ring_test_ring(kiq_ring); return amdgpu_ring_test_ring(kiq_ring);
} }