drm/radeon: update rptr saving logic for memory buffers
Add support for using memory buffers rather than scratch registers. Some rings may not be able to write to scratch registers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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committed by
Christian König

parent
8b25ed3482
commit
89d35807fb
@@ -2163,10 +2163,12 @@ void r600_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsign
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ring->ring_size = ring_size;
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ring->align_mask = 16 - 1;
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r = radeon_scratch_get(rdev, &ring->rptr_save_reg);
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if (r) {
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DRM_ERROR("failed to get scratch reg for rptr save (%d).\n", r);
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ring->rptr_save_reg = 0;
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if (radeon_ring_supports_scratch_reg(rdev, ring)) {
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r = radeon_scratch_get(rdev, &ring->rptr_save_reg);
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if (r) {
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DRM_ERROR("failed to get scratch reg for rptr save (%d).\n", r);
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ring->rptr_save_reg = 0;
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}
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}
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}
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@@ -2576,13 +2578,21 @@ void r600_fini(struct radeon_device *rdev)
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void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
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{
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struct radeon_ring *ring = &rdev->ring[ib->ring];
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u32 next_rptr;
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if (ring->rptr_save_reg) {
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uint32_t next_rptr = ring->wptr + 3 + 4;
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next_rptr = ring->wptr + 3 + 4;
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radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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radeon_ring_write(ring, ((ring->rptr_save_reg -
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PACKET3_SET_CONFIG_REG_OFFSET) >> 2));
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radeon_ring_write(ring, next_rptr);
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} else if (rdev->wb.enabled) {
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next_rptr = ring->wptr + 5 + 4;
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radeon_ring_write(ring, PACKET3(PACKET3_MEM_WRITE, 3));
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radeon_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc);
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radeon_ring_write(ring, (upper_32_bits(ring->next_rptr_gpu_addr) & 0xff) | (1 << 18));
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radeon_ring_write(ring, next_rptr);
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radeon_ring_write(ring, 0);
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}
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radeon_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));
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