drm/radeon: Disable HDP flush before every CS again for < r600
It was causing display corruption with R300 generation GPUs at least. Reported-and-Tested-by: Mikael Pettersson <mikpelinux@gmail.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher

parent
64d8ee5957
commit
897eba827e
@@ -185,7 +185,6 @@ static struct radeon_asic_ring r100_gfx_ring = {
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.get_rptr = &r100_gfx_get_rptr,
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.get_wptr = &r100_gfx_get_wptr,
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.set_wptr = &r100_gfx_set_wptr,
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.hdp_flush = &r100_ring_hdp_flush,
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};
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static struct radeon_asic r100_asic = {
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@@ -332,7 +331,6 @@ static struct radeon_asic_ring r300_gfx_ring = {
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.get_rptr = &r100_gfx_get_rptr,
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.get_wptr = &r100_gfx_get_wptr,
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.set_wptr = &r100_gfx_set_wptr,
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.hdp_flush = &r100_ring_hdp_flush,
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};
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static struct radeon_asic r300_asic = {
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