drm/meson: add mode selection limits against specific SoC revisions

The Amlogic S805X/Y uses the same die as the S905X, but with more
limited graphics capabilities.

This adds a soc version detection adding specific limitations on the HDMI
mode selections.

Here, we limit to HDMI 1.2a max HDMI PHY clock frequency.

Changes sinces v1:
- Moved frequency check in the vclk code, and also checks DMT modes

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[narmstrong: fixed commit message with HDMI 1.2a instead of HDMI 1.3a]
Link: https://patchwork.freedesktop.org/patch/msgid/20200428092147.13698-1-narmstrong@baylibre.com
This commit is contained in:
Neil Armstrong
2020-04-28 11:21:47 +02:00
parent e7f12054a1
commit 8976eeee8d
5 changed files with 52 additions and 4 deletions

View File

@@ -725,6 +725,13 @@ meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq)
/* In DMT mode, path after PLL is always /10 */
freq *= 10;
/* Check against soc revision/package limits */
if (priv->limits) {
if (priv->limits->max_hdmi_phy_freq &&
freq > priv->limits->max_hdmi_phy_freq)
return MODE_CLOCK_HIGH;
}
if (meson_hdmi_pll_find_params(priv, freq, &m, &frac, &od))
return MODE_OK;
@@ -762,7 +769,7 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
}
enum drm_mode_status
meson_vclk_vic_supported_freq(unsigned int phy_freq,
meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
unsigned int vclk_freq)
{
int i;
@@ -770,6 +777,13 @@ meson_vclk_vic_supported_freq(unsigned int phy_freq,
DRM_DEBUG_DRIVER("phy_freq = %d vclk_freq = %d\n",
phy_freq, vclk_freq);
/* Check against soc revision/package limits */
if (priv->limits) {
if (priv->limits->max_hdmi_phy_freq &&
phy_freq > priv->limits->max_hdmi_phy_freq)
return MODE_CLOCK_HIGH;
}
for (i = 0 ; params[i].pixel_freq ; ++i) {
DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n",
i, params[i].pixel_freq,