Merge tag 'mmc-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Let the dma map ops deal with bouncing and drop dma_max_pfn() from
     the dma-mapping interface for ARM
   - Convert the generic MMC DT doc to YAML schemas
   - Drop questionable support for powered-on re-init of SDIO cards at
     runtime resume and for SDIO HW reset
   - Prevent questionable re-init of powered-on removable SDIO cards at
     system resume
   - Cleanup and clarify some SDIO core code

  MMC host:
   - tmio: Make runtime PM enablement more flexible for variants
   - tmio/renesas_sdhi: Rename DT doc tmio_mmc.txt to renesas,sdhi.txt
     to clarify
   - sdhci-pci: Add support for Intel EHL
   - sdhci-pci-o2micro: Enable support for 8-bit bus
   - sdhci-msm: Prevent acquiring a mutex while holding a spin_lock
   - sdhci-of-esdhc: Improve clock management and tuning
   - sdhci_am654: Enable support for 4 and 8-bit bus on J721E
   - sdhci-sprd: Use pinctrl for a proper signal voltage switch
   - sdhci-sprd: Add support for HS400 enhanced strobe mode
   - sdhci-sprd: Enable PHY DLL and allow delay config to stabilize the
     clock
   - sdhci-sprd: Add support for optional gate clock
   - sunxi-mmc: Convert DT doc to YAML schemas
   - meson-gx: Add support for broken DRAM access for DMA

  MEMSTICK core:
   - Fixup error path of memstick_init()"

* tag 'mmc-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (52 commits)
  mmc: sdhci_am654: Add dependency on MMC_SDHCI_AM654
  mmc: alcor: remove a redundant greater or equal to zero comparison
  mmc: sdhci-msm: fix mutex while in spinlock
  mmc: sdhci_am654: Make some symbols static
  dma-mapping: remove dma_max_pfn
  mmc: core: let the dma map ops handle bouncing
  dt-binding: mmc: rename tmio_mmc.txt to renesas,sdhi.txt
  mmc: sdhci-sprd: Add pin control support for voltage switch
  dt-bindings: mmc: sprd: Add pinctrl support
  mmc: sdhci-sprd: Add start_signal_voltage_switch ops
  mmc: sdhci-pci: Add support for Intel EHL
  mmc: tmio: Use dma_max_mapping_size() instead of a workaround
  mmc: sdio: Drop unused in-parameter from mmc_sdio_init_card()
  mmc: sdio: Drop unused in-parameter to mmc_sdio_reinit_card()
  mmc: sdio: Don't re-initialize powered-on removable SDIO cards at resume
  mmc: sdio: Drop powered-on re-init at runtime resume and HW reset
  mmc: sdio: Move comment about re-initialization to mmc_sdio_reinit_card()
  mmc: sdio: Drop mmc_claim|release_host() in mmc_sdio_power_restore()
  mmc: sdio: Turn sdio_run_irqs() into static
  mmc: sdhci: Fix indenting on SDHCI_CTRL_8BITBUS
  ...
This commit is contained in:
Linus Torvalds
2019-07-11 18:11:21 -07:00
38개의 변경된 파일1186개의 추가작업 그리고 617개의 파일을 삭제

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@@ -0,0 +1,98 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/allwinner,sun4i-a10-mmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 MMC Controller Device Tree Bindings
allOf:
- $ref: "mmc-controller.yaml"
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <maxime.ripard@bootlin.com>
properties:
"#address-cells": true
"#size-cells": true
compatible:
oneOf:
- const: allwinner,sun4i-a10-mmc
- const: allwinner,sun5i-a13-mmc
- const: allwinner,sun7i-a20-mmc
- const: allwinner,sun8i-a83t-emmc
- const: allwinner,sun9i-a80-mmc
- const: allwinner,sun50i-a64-emmc
- const: allwinner,sun50i-a64-mmc
- items:
- const: allwinner,sun8i-a83t-mmc
- const: allwinner,sun7i-a20-mmc
- items:
- const: allwinner,sun50i-h6-emmc
- const: allwinner,sun50i-a64-emmc
- items:
- const: allwinner,sun50i-h6-mmc
- const: allwinner,sun50i-a64-mmc
- items:
- const: allwinner,sun8i-r40-emmc
- const: allwinner,sun50i-a64-emmc
- items:
- const: allwinner,sun8i-r40-mmc
- const: allwinner,sun50i-a64-mmc
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
minItems: 2
maxItems: 4
items:
- description: Bus Clock
- description: Module Clock
- description: Output Clock
- description: Sample Clock
clock-names:
minItems: 2
maxItems: 4
items:
- const: ahb
- const: mmc
- const: output
- const: sample
resets:
maxItems: 1
reset-names:
const: ahb
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
examples:
- |
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ahb_gates 8>, <&mmc0_clk>;
clock-names = "ahb", "mmc";
interrupts = <32>;
bus-width = <4>;
cd-gpios = <&pio 7 1 0>;
};
# FIXME: We should set it, but it would report all the generic
# properties as additional properties.
# additionalProperties: false
...

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@@ -22,6 +22,10 @@ Required properties:
clock rate requested by the MMC core.
- resets : phandle of the internal reset line
Optional properties:
- amlogic,dram-access-quirk: set when controller's internal DMA engine cannot access the
DRAM memory, like on the G12A dedicated SDIO controller.
Example:
sd_emmc_a: mmc@70000 {

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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MMC Controller Generic Binding
maintainers:
- Ulf Hansson <ulf.hansson@linaro.org>
description: |
These properties are common to multiple MMC host controllers. Any host
that requires the respective functionality should implement them using
these definitions.
properties:
$nodename:
pattern: "^mmc(@.*)?$"
"#address-cells":
const: 1
description: |
The cell is the slot ID if a function subnode is used.
"#size-cells":
const: 0
# Card Detection.
# If none of these properties are supplied, the host native card
# detect will be used. Only one of them should be provided.
broken-cd:
$ref: /schemas/types.yaml#/definitions/flag
description:
There is no card detection available; polling must be used.
cd-gpios:
description:
The card detection will be done using the GPIO provided.
non-removable:
$ref: /schemas/types.yaml#/definitions/flag
description:
Non-removable slot (like eMMC); assume always present.
# *NOTE* on CD and WP polarity. To use common for all SD/MMC host
# controllers line polarity properties, we have to fix the meaning
# of the "normal" and "inverted" line levels. We choose to follow
# the SDHCI standard, which specifies both those lines as "active
# low." Therefore, using the "cd-inverted" property means, that the
# CD line is active high, i.e. it is high, when a card is
# inserted. Similar logic applies to the "wp-inverted" property.
#
# CD and WP lines can be implemented on the hardware in one of two
# ways: as GPIOs, specified in cd-gpios and wp-gpios properties, or
# as dedicated pins. Polarity of dedicated pins can be specified,
# using *-inverted properties. GPIO polarity can also be specified
# using the GPIO_ACTIVE_LOW flag. This creates an ambiguity in the
# latter case. We choose to use the XOR logic for GPIO CD and WP
# lines. This means, the two properties are "superimposed," for
# example leaving the GPIO_ACTIVE_LOW flag clear and specifying the
# respective *-inverted property property results in a
# double-inversion and actually means the "normal" line polarity is
# in effect.
wp-inverted:
$ref: /schemas/types.yaml#/definitions/flag
description:
The Write Protect line polarity is inverted.
cd-inverted:
$ref: /schemas/types.yaml#/definitions/flag
description:
The CD line polarity is inverted.
# Other properties
bus-width:
allOf:
- $ref: /schemas/types.yaml#/definitions/uint32
- enum: [1, 4, 8]
default: 1
description:
Number of data lines.
max-frequency:
allOf:
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 400000
- maximum: 200000000
description:
Maximum operating frequency of the bus.
disable-wp:
$ref: /schemas/types.yaml#/definitions/flag
description:
When set, no physical write-protect line is present. This
property should only be specified when the controller has a
dedicated write-protect detection logic. If a GPIO is always
used for the write-protect detection. If a GPIO is always used
for the write-protect detection logic, it is sufficient to not
specify the wp-gpios property in the absence of a write-protect
line.
wp-gpios:
description:
GPIO to use for the write-protect detection.
cd-debounce-delay-ms:
description:
Set delay time before detecting card after card insert
interrupt.
no-1-8-v:
$ref: /schemas/types.yaml#/definitions/flag
description:
When specified, denotes that 1.8V card voltage is not supported
on this system, even if the controller claims it.
cap-sd-highspeed:
$ref: /schemas/types.yaml#/definitions/flag
description:
SD high-speed timing is supported.
cap-mmc-highspeed:
$ref: /schemas/types.yaml#/definitions/flag
description:
MMC high-speed timing is supported.
sd-uhs-sdr12:
$ref: /schemas/types.yaml#/definitions/flag
description:
SD UHS SDR12 speed is supported.
sd-uhs-sdr25:
$ref: /schemas/types.yaml#/definitions/flag
description:
SD UHS SDR25 speed is supported.
sd-uhs-sdr50:
$ref: /schemas/types.yaml#/definitions/flag
description:
SD UHS SDR50 speed is supported.
sd-uhs-sdr104:
$ref: /schemas/types.yaml#/definitions/flag
description:
SD UHS SDR104 speed is supported.
sd-uhs-ddr50:
$ref: /schemas/types.yaml#/definitions/flag
description:
SD UHS DDR50 speed is supported.
cap-power-off-card:
$ref: /schemas/types.yaml#/definitions/flag
description:
Powering off the card is safe.
cap-mmc-hw-reset:
$ref: /schemas/types.yaml#/definitions/flag
description:
eMMC hardware reset is supported
cap-sdio-irq:
$ref: /schemas/types.yaml#/definitions/flag
description:
enable SDIO IRQ signalling on this interface
full-pwr-cycle:
$ref: /schemas/types.yaml#/definitions/flag
description:
Full power cycle of the card is supported.
mmc-ddr-1_2v:
$ref: /schemas/types.yaml#/definitions/flag
description:
eMMC high-speed DDR mode (1.2V I/O) is supported.
mmc-ddr-1_8v:
$ref: /schemas/types.yaml#/definitions/flag
description:
eMMC high-speed DDR mode (1.8V I/O) is supported.
mmc-ddr-3_3v:
$ref: /schemas/types.yaml#/definitions/flag
description:
eMMC high-speed DDR mode (3.3V I/O) is supported.
mmc-hs200-1_2v:
$ref: /schemas/types.yaml#/definitions/flag
description:
eMMC HS200 mode (1.2V I/O) is supported.
mmc-hs200-1_8v:
$ref: /schemas/types.yaml#/definitions/flag
description:
eMMC HS200 mode (1.8V I/O) is supported.
mmc-hs400-1_2v:
$ref: /schemas/types.yaml#/definitions/flag
description:
eMMC HS400 mode (1.2V I/O) is supported.
mmc-hs400-1_8v:
$ref: /schemas/types.yaml#/definitions/flag
description:
eMMC HS400 mode (1.8V I/O) is supported.
mmc-hs400-enhanced-strobe:
$ref: /schemas/types.yaml#/definitions/flag
description:
eMMC HS400 enhanced strobe mode is supported
dsr:
allOf:
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0
- maximum: 0xffff
description:
Value the card Driver Stage Register (DSR) should be programmed
with.
no-sdio:
$ref: /schemas/types.yaml#/definitions/flag
description:
Controller is limited to send SDIO commands during
initialization.
no-sd:
$ref: /schemas/types.yaml#/definitions/flag
description:
Controller is limited to send SD commands during initialization.
no-mmc:
$ref: /schemas/types.yaml#/definitions/flag
description:
Controller is limited to send MMC commands during
initialization.
fixed-emmc-driver-type:
allOf:
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0
- maximum: 4
description:
For non-removable eMMC, enforce this driver type. The value is
the driver type as specified in the eMMC specification (table
206 in spec version 5.1)
post-power-on-delay-ms:
allOf:
- $ref: /schemas/types.yaml#/definitions/uint32
- default: 10
description:
It was invented for MMC pwrseq-simple which could be referred to
mmc-pwrseq-simple.txt. But now it\'s reused as a tunable delay
waiting for I/O signalling and card power supply to be stable,
regardless of whether pwrseq-simple is used. Default to 10ms if
no available.
supports-cqe:
$ref: /schemas/types.yaml#/definitions/flag
description:
The presence of this property indicates that the corresponding
MMC host controller supports HW command queue feature.
disable-cqe-dcmd:
$ref: /schemas/types.yaml#/definitions/flag
description:
The presence of this property indicates that the MMC
controller\'s command queue engine (CQE) does not support direct
commands (DCMDs).
keep-power-in-suspend:
$ref: /schemas/types.yaml#/definitions/flag
description:
SDIO only. Preserves card power during a suspend/resume cycle.
# Deprecated: enable-sdio-wakeup
wakeup-source:
$ref: /schemas/types.yaml#/definitions/flag
description:
SDIO only. Enables wake up of host system on SDIO IRQ assertion.
vmmc-supply:
description:
Supply for the card power
vqmmc-supply:
description:
Supply for the bus IO line power
mmc-pwrseq:
$ref: /schemas/types.yaml#/definitions/phandle
description:
System-on-Chip designs may specify a specific MMC power
sequence. To successfully detect an (e)MMC/SD/SDIO card, that
power sequence must be maintained while initializing the card.
patternProperties:
"^.*@[0-9]+$":
type: object
description: |
On embedded systems the cards connected to a host may need
additional properties. These can be specified in subnodes to the
host controller node. The subnodes are identified by the
standard \'reg\' property. Which information exactly can be
specified depends on the bindings for the SDIO function driver
for the subnode, as specified by the compatible string.
properties:
compatible:
description: |
Name of SDIO function following generic names recommended
practice
reg:
items:
- minimum: 0
maximum: 7
description:
Must contain the SDIO function number of the function this
subnode describes. A value of 0 denotes the memory SD
function, values from 1 to 7 denote the SDIO functions.
broken-hpi:
$ref: /schemas/types.yaml#/definitions/flag
description:
Use this to indicate that the mmc-card has a broken hpi
implementation, and that hpi should not be used.
required:
- reg
dependencies:
cd-debounce-delay-ms: [ cd-gpios ]
fixed-emmc-driver-type: [ non-removable ]
examples:
- |
sdhci@ab000000 {
compatible = "sdhci";
reg = <0xab000000 0x200>;
interrupts = <23>;
bus-width = <4>;
cd-gpios = <&gpio 69 0>;
cd-inverted;
wp-gpios = <&gpio 70 0>;
max-frequency = <50000000>;
keep-power-in-suspend;
wakeup-source;
mmc-pwrseq = <&sdhci0_pwrseq>;
};
- |
mmc3: mmc@1c12000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins_a>;
vmmc-supply = <&reg_vmmc3>;
bus-width = <4>;
non-removable;
mmc-pwrseq = <&sdhci0_pwrseq>;
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm43xx-fmac";
interrupt-parent = <&pio>;
interrupts = <10 8>;
interrupt-names = "host-wake";
};
};

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@@ -1,177 +1 @@
These properties are common to multiple MMC host controllers. Any host
that requires the respective functionality should implement them using
these definitions.
Interpreted by the OF core:
- reg: Registers location and length.
- interrupts: Interrupts used by the MMC controller.
Card detection:
If no property below is supplied, host native card detect is used.
Only one of the properties in this section should be supplied:
- broken-cd: There is no card detection available; polling must be used.
- cd-gpios: Specify GPIOs for card detection, see gpio binding
- non-removable: non-removable slot (like eMMC); assume always present.
Optional properties:
- bus-width: Number of data lines, can be <1>, <4>, or <8>. The default
will be <1> if the property is absent.
- wp-gpios: Specify GPIOs for write protection, see gpio binding
- cd-inverted: when present, polarity on the CD line is inverted. See the note
below for the case, when a GPIO is used for the CD line
- cd-debounce-delay-ms: Set delay time before detecting card after card insert interrupt.
It's only valid when cd-gpios is present.
- wp-inverted: when present, polarity on the WP line is inverted. See the note
below for the case, when a GPIO is used for the WP line
- disable-wp: When set no physical WP line is present. This property should
only be specified when the controller has a dedicated write-protect
detection logic. If a GPIO is always used for the write-protect detection
logic it is sufficient to not specify wp-gpios property in the absence of a WP
line.
- max-frequency: maximum operating clock frequency
- no-1-8-v: when present, denotes that 1.8v card voltage is not supported on
this system, even if the controller claims it is.
- cap-sd-highspeed: SD high-speed timing is supported
- cap-mmc-highspeed: MMC high-speed timing is supported
- sd-uhs-sdr12: SD UHS SDR12 speed is supported
- sd-uhs-sdr25: SD UHS SDR25 speed is supported
- sd-uhs-sdr50: SD UHS SDR50 speed is supported
- sd-uhs-sdr104: SD UHS SDR104 speed is supported
- sd-uhs-ddr50: SD UHS DDR50 speed is supported
- cap-power-off-card: powering off the card is safe
- cap-mmc-hw-reset: eMMC hardware reset is supported
- cap-sdio-irq: enable SDIO IRQ signalling on this interface
- full-pwr-cycle: full power cycle of the card is supported
- mmc-ddr-3_3v: eMMC high-speed DDR mode(3.3V I/O) is supported
- mmc-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported
- mmc-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported
- mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported
- mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported
- mmc-hs400-1_8v: eMMC HS400 mode(1.8V I/O) is supported
- mmc-hs400-1_2v: eMMC HS400 mode(1.2V I/O) is supported
- mmc-hs400-enhanced-strobe: eMMC HS400 enhanced strobe mode is supported
- dsr: Value the card's (optional) Driver Stage Register (DSR) should be
programmed with. Valid range: [0 .. 0xffff].
- no-sdio: controller is limited to send sdio cmd during initialization
- no-sd: controller is limited to send sd cmd during initialization
- no-mmc: controller is limited to send mmc cmd during initialization
- fixed-emmc-driver-type: for non-removable eMMC, enforce this driver type.
The value <n> is the driver type as specified in the eMMC specification
(table 206 in spec version 5.1).
- post-power-on-delay-ms : It was invented for MMC pwrseq-simple which could
be referred to mmc-pwrseq-simple.txt. But now it's reused as a tunable delay
waiting for I/O signalling and card power supply to be stable, regardless of
whether pwrseq-simple is used. Default to 10ms if no available.
- supports-cqe : The presence of this property indicates that the corresponding
MMC host controller supports HW command queue feature.
- disable-cqe-dcmd: This property indicates that the MMC controller's command
queue engine (CQE) does not support direct commands (DCMDs).
*NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
polarity properties, we have to fix the meaning of the "normal" and "inverted"
line levels. We choose to follow the SDHCI standard, which specifies both those
lines as "active low." Therefore, using the "cd-inverted" property means, that
the CD line is active high, i.e. it is high, when a card is inserted. Similar
logic applies to the "wp-inverted" property.
CD and WP lines can be implemented on the hardware in one of two ways: as GPIOs,
specified in cd-gpios and wp-gpios properties, or as dedicated pins. Polarity of
dedicated pins can be specified, using *-inverted properties. GPIO polarity can
also be specified using the GPIO_ACTIVE_LOW flag. This creates an ambiguity
in the latter case. We choose to use the XOR logic for GPIO CD and WP lines.
This means, the two properties are "superimposed," for example leaving the
GPIO_ACTIVE_LOW flag clear and specifying the respective *-inverted property
property results in a double-inversion and actually means the "normal" line
polarity is in effect.
Optional SDIO properties:
- keep-power-in-suspend: Preserves card power during a suspend/resume cycle
- wakeup-source: Enables wake up of host system on SDIO IRQ assertion
(Legacy property supported: "enable-sdio-wakeup")
MMC power
---------
Controllers may implement power control from both the connected cards and
the IO signaling (for example to change to high-speed 1.8V signalling). If
the system supports this, then the following two properties should point
to valid regulator nodes:
- vqmmc-supply: supply node for IO line power
- vmmc-supply: supply node for card's power
MMC power sequences:
--------------------
System on chip designs may specify a specific MMC power sequence. To
successfully detect an (e)MMC/SD/SDIO card, that power sequence must be
maintained while initializing the card.
Optional property:
- mmc-pwrseq: phandle to the MMC power sequence node. See "mmc-pwrseq-*"
for documentation of MMC power sequence bindings.
Use of Function subnodes
------------------------
On embedded systems the cards connected to a host may need additional
properties. These can be specified in subnodes to the host controller node.
The subnodes are identified by the standard 'reg' property.
Which information exactly can be specified depends on the bindings for the
SDIO function driver for the subnode, as specified by the compatible string.
Required host node properties when using function subnodes:
- #address-cells: should be one. The cell is the slot id.
- #size-cells: should be zero.
Required function subnode properties:
- reg: Must contain the SDIO function number of the function this subnode
describes. A value of 0 denotes the memory SD function, values from
1 to 7 denote the SDIO functions.
Optional function subnode properties:
- compatible: name of SDIO function following generic names recommended practice
Examples
--------
Basic example:
sdhci@ab000000 {
compatible = "sdhci";
reg = <0xab000000 0x200>;
interrupts = <23>;
bus-width = <4>;
cd-gpios = <&gpio 69 0>;
cd-inverted;
wp-gpios = <&gpio 70 0>;
max-frequency = <50000000>;
keep-power-in-suspend;
wakeup-source;
mmc-pwrseq = <&sdhci0_pwrseq>
}
Example with sdio function subnode:
mmc3: mmc@1c12000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins_a>;
vmmc-supply = <&reg_vmmc3>;
bus-width = <4>;
non-removable;
mmc-pwrseq = <&sdhci0_pwrseq>
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm43xx-fmac";
interrupt-parent = <&pio>;
interrupts = <10 8>; /* PH10 / EINT10 */
interrupt-names = "host-wake";
};
};
This file has moved to mmc-controller.yaml.

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@@ -1,13 +1,4 @@
* Toshiba Mobile IO SD/MMC controller
The tmio-mmc driver doesn't probe its devices actively, instead its binding to
devices is managed by either MFD drivers or by the sh_mobile_sdhi platform
driver. Those drivers supply the tmio-mmc driver with platform data, that either
describe hardware capabilities, known to them, or are obtained by them from
their own platform data or from their DT information. In the latter case all
compulsory and any optional properties, common to all SD/MMC drivers, as
described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
optional bindings can be used.
* Renesas SDHI SD/MMC controller
Required properties:
- compatible: should contain one or more of the following:

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@@ -8,7 +8,10 @@ Only deviations are documented here.
[3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
Required Properties:
- compatible: should be "ti,am654-sdhci-5.1"
- compatible: should be one of:
"ti,am654-sdhci-5.1": SDHCI on AM654 device.
"ti,j721e-sdhci-8bit": 8 bit SDHCI on J721E device.
"ti,j721e-sdhci-4bit": 4 bit SDHCI on J721E device.
- reg: Must be two entries.
- The first should be the sdhci register space
- The second should the subsystem/phy register space
@@ -16,9 +19,13 @@ Required Properties:
- clock-names: Tuple including "clk_xin" and "clk_ahb"
- interrupts: Interrupt specifiers
- ti,otap-del-sel: Output Tap Delay select
Optional Properties (Required for ti,am654-sdhci-5.1 and ti,j721e-sdhci-8bit):
- ti,trm-icp: DLL trim select
- ti,driver-strength-ohm: driver strength in ohms.
Valid values are 33, 40, 50, 66 and 100 ohms.
Optional Properties:
- ti,strobe-sel: strobe select delay for HS400 speed mode. Default value: 0x0.
Example:

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@@ -14,10 +14,31 @@ Required properties:
- clock-names: Should contain the following:
"sdio" - SDIO source clock (required)
"enable" - gate clock which used for enabling/disabling the device (required)
"2x_enable" - gate clock controlling the device for some special platforms (optional)
Optional properties:
- assigned-clocks: the same with "sdio" clock
- assigned-clock-parents: the default parent of "sdio" clock
- pinctrl-names: should be "default", "state_uhs"
- pinctrl-0: should contain default/high speed pin control
- pinctrl-1: should contain uhs mode pin control
PHY DLL delays are used to delay the data valid window, and align the window
to sampling clock. PHY DLL delays can be configured by following properties,
and each property contains 4 cells which are used to configure the clock data
write line delay value, clock read command line delay value, clock read data
positive edge delay value and clock read data negative edge delay value.
Each cell's delay value unit is cycle of the PHY clock.
- sprd,phy-delay-legacy: Delay value for legacy timing.
- sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing.
- sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing.
- sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
- sprd,phy-delay-mmc-highspeed: Delay value for MMC high-speed timing.
- sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing.
- sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing.
- sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing.
- sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing.
Examples:
@@ -32,6 +53,11 @@ sdio0: sdio@20600000 {
assigned-clocks = <&ap_clk CLK_EMMC_2X>;
assigned-clock-parents = <&rpll CLK_RPLL_390M>;
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sd0_pins_default>;
pinctrl-1 = <&sd0_pins_uhs>;
sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>;
bus-width = <8>;
non-removable;
no-sdio;

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@@ -1,52 +0,0 @@
* Allwinner sunxi MMC controller
The highspeed MMC host controller on Allwinner SoCs provides an interface
for MMC, SD and SDIO types of memory cards.
Supported maximum speeds are the ones of the eMMC standard 4.5 as well
as the speed of SD standard 3.0.
Absolute maximum transfer rate is 200MB/s
Required properties:
- compatible : should be one of:
* "allwinner,sun4i-a10-mmc"
* "allwinner,sun5i-a13-mmc"
* "allwinner,sun7i-a20-mmc"
* "allwinner,sun8i-a83t-emmc"
* "allwinner,sun9i-a80-mmc"
* "allwinner,sun50i-a64-emmc"
* "allwinner,sun50i-a64-mmc"
* "allwinner,sun50i-h6-emmc", "allwinner.sun50i-a64-emmc"
* "allwinner,sun50i-h6-mmc", "allwinner.sun50i-a64-mmc"
- reg : mmc controller base registers
- clocks : a list with 4 phandle + clock specifier pairs
- clock-names : must contain "ahb", "mmc", "output" and "sample"
- interrupts : mmc controller interrupt
Optional properties:
- resets : phandle + reset specifier pair
- reset-names : must contain "ahb"
- for cd, bus-width and additional generic mmc parameters
please refer to mmc.txt within this directory
Examples:
- Within .dtsi:
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ahb_gates 8>, <&mmc0_clk>, <&mmc0_output_clk>, <&mmc0_sample_clk>;
clock-names = "ahb", "mod", "output", "sample";
interrupts = <0 32 4>;
status = "disabled";
};
- Within dts:
mmc0: mmc@1c0f000 {
pinctrl-names = "default", "default";
pinctrl-0 = <&mmc0_pins_a>;
pinctrl-1 = <&mmc0_cd_pin_reference_design>;
bus-width = <4>;
cd-gpios = <&pio 7 1 0>; /* PH1 */
cd-inverted;
status = "okay";
};