drm/msm: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark
@@ -12,14 +12,14 @@ The rules-ng-ng source files this header was generated from are:
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- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1453 bytes, from 2013-03-31 16:51:27)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp4.xml ( 17996 bytes, from 2013-12-01 19:10:31)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp_common.xml ( 1615 bytes, from 2013-11-30 15:00:52)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp5.xml ( 22517 bytes, from 2013-12-03 20:59:13)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp5.xml ( 22517 bytes, from 2014-06-25 12:55:02)
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- /home/robclark/src/freedreno/envytools/rnndb/dsi/dsi.xml ( 11712 bytes, from 2013-08-17 17:13:43)
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- /home/robclark/src/freedreno/envytools/rnndb/dsi/sfpb.xml ( 344 bytes, from 2013-08-11 19:26:32)
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- /home/robclark/src/freedreno/envytools/rnndb/dsi/mmss_cc.xml ( 1544 bytes, from 2013-08-16 19:17:05)
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- /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2013-07-05 19:21:12)
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- /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 20932 bytes, from 2013-12-01 15:13:04)
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- /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 23613 bytes, from 2014-06-25 12:53:44)
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Copyright (C) 2013 by the following authors:
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Copyright (C) 2013-2014 by the following authors:
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- Rob Clark <robdclark@gmail.com> (robclark)
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Permission is hereby granted, free of charge, to any person obtaining
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@@ -148,9 +148,9 @@ static inline uint32_t REG_HDMI_GENERIC0(uint32_t i0) { return 0x00000088 + 0x4*
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static inline uint32_t REG_HDMI_GENERIC1(uint32_t i0) { return 0x000000a8 + 0x4*i0; }
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static inline uint32_t REG_HDMI_ACR(uint32_t i0) { return 0x000000c4 + 0x8*i0; }
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static inline uint32_t REG_HDMI_ACR(enum hdmi_acr_cts i0) { return 0x000000c4 + 0x8*i0; }
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static inline uint32_t REG_HDMI_ACR_0(uint32_t i0) { return 0x000000c4 + 0x8*i0; }
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static inline uint32_t REG_HDMI_ACR_0(enum hdmi_acr_cts i0) { return 0x000000c4 + 0x8*i0; }
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#define HDMI_ACR_0_CTS__MASK 0xfffff000
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#define HDMI_ACR_0_CTS__SHIFT 12
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static inline uint32_t HDMI_ACR_0_CTS(uint32_t val)
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@@ -158,7 +158,7 @@ static inline uint32_t HDMI_ACR_0_CTS(uint32_t val)
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return ((val) << HDMI_ACR_0_CTS__SHIFT) & HDMI_ACR_0_CTS__MASK;
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}
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static inline uint32_t REG_HDMI_ACR_1(uint32_t i0) { return 0x000000c8 + 0x8*i0; }
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static inline uint32_t REG_HDMI_ACR_1(enum hdmi_acr_cts i0) { return 0x000000c8 + 0x8*i0; }
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#define HDMI_ACR_1_N__MASK 0xffffffff
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#define HDMI_ACR_1_N__SHIFT 0
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static inline uint32_t HDMI_ACR_1_N(uint32_t val)
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@@ -552,6 +552,103 @@ static inline uint32_t HDMI_8x60_PHY_REG1_OUTVOL_SWING_CTRL(uint32_t val)
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#define REG_HDMI_8960_PHY_REG11 0x0000042c
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#define REG_HDMI_8960_PHY_REG12 0x00000430
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#define HDMI_8960_PHY_REG12_SW_RESET 0x00000020
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#define HDMI_8960_PHY_REG12_PWRDN_B 0x00000080
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#define REG_HDMI_8960_PHY_REG_BIST_CFG 0x00000434
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#define REG_HDMI_8960_PHY_DEBUG_BUS_SEL 0x00000438
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#define REG_HDMI_8960_PHY_REG_MISC0 0x0000043c
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#define REG_HDMI_8960_PHY_REG13 0x00000440
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#define REG_HDMI_8960_PHY_REG14 0x00000444
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#define REG_HDMI_8960_PHY_REG15 0x00000448
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#define REG_HDMI_8960_PHY_PLL_REFCLK_CFG 0x00000500
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#define REG_HDMI_8960_PHY_PLL_CHRG_PUMP_CFG 0x00000504
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#define REG_HDMI_8960_PHY_PLL_LOOP_FLT_CFG0 0x00000508
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#define REG_HDMI_8960_PHY_PLL_LOOP_FLT_CFG1 0x0000050c
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#define REG_HDMI_8960_PHY_PLL_IDAC_ADJ_CFG 0x00000510
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#define REG_HDMI_8960_PHY_PLL_I_VI_KVCO_CFG 0x00000514
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#define REG_HDMI_8960_PHY_PLL_PWRDN_B 0x00000518
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#define HDMI_8960_PHY_PLL_PWRDN_B_PD_PLL 0x00000002
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#define HDMI_8960_PHY_PLL_PWRDN_B_PLL_PWRDN_B 0x00000008
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#define REG_HDMI_8960_PHY_PLL_SDM_CFG0 0x0000051c
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#define REG_HDMI_8960_PHY_PLL_SDM_CFG1 0x00000520
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#define REG_HDMI_8960_PHY_PLL_SDM_CFG2 0x00000524
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#define REG_HDMI_8960_PHY_PLL_SDM_CFG3 0x00000528
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#define REG_HDMI_8960_PHY_PLL_SDM_CFG4 0x0000052c
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#define REG_HDMI_8960_PHY_PLL_SSC_CFG0 0x00000530
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#define REG_HDMI_8960_PHY_PLL_SSC_CFG1 0x00000534
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#define REG_HDMI_8960_PHY_PLL_SSC_CFG2 0x00000538
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#define REG_HDMI_8960_PHY_PLL_SSC_CFG3 0x0000053c
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#define REG_HDMI_8960_PHY_PLL_LOCKDET_CFG0 0x00000540
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#define REG_HDMI_8960_PHY_PLL_LOCKDET_CFG1 0x00000544
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#define REG_HDMI_8960_PHY_PLL_LOCKDET_CFG2 0x00000548
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#define REG_HDMI_8960_PHY_PLL_VCOCAL_CFG0 0x0000054c
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#define REG_HDMI_8960_PHY_PLL_VCOCAL_CFG1 0x00000550
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#define REG_HDMI_8960_PHY_PLL_VCOCAL_CFG2 0x00000554
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#define REG_HDMI_8960_PHY_PLL_VCOCAL_CFG3 0x00000558
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#define REG_HDMI_8960_PHY_PLL_VCOCAL_CFG4 0x0000055c
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#define REG_HDMI_8960_PHY_PLL_VCOCAL_CFG5 0x00000560
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#define REG_HDMI_8960_PHY_PLL_VCOCAL_CFG6 0x00000564
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#define REG_HDMI_8960_PHY_PLL_VCOCAL_CFG7 0x00000568
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#define REG_HDMI_8960_PHY_PLL_DEBUG_SEL 0x0000056c
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#define REG_HDMI_8960_PHY_PLL_MISC0 0x00000570
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#define REG_HDMI_8960_PHY_PLL_MISC1 0x00000574
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#define REG_HDMI_8960_PHY_PLL_MISC2 0x00000578
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#define REG_HDMI_8960_PHY_PLL_MISC3 0x0000057c
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#define REG_HDMI_8960_PHY_PLL_MISC4 0x00000580
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#define REG_HDMI_8960_PHY_PLL_MISC5 0x00000584
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#define REG_HDMI_8960_PHY_PLL_MISC6 0x00000588
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#define REG_HDMI_8960_PHY_PLL_DEBUG_BUS0 0x0000058c
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#define REG_HDMI_8960_PHY_PLL_DEBUG_BUS1 0x00000590
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#define REG_HDMI_8960_PHY_PLL_DEBUG_BUS2 0x00000594
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#define REG_HDMI_8960_PHY_PLL_STATUS0 0x00000598
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#define HDMI_8960_PHY_PLL_STATUS0_PLL_LOCK 0x00000001
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#define REG_HDMI_8960_PHY_PLL_STATUS1 0x0000059c
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#define REG_HDMI_8x74_ANA_CFG0 0x00000000
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@@ -12,12 +12,12 @@ The rules-ng-ng source files this header was generated from are:
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- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1453 bytes, from 2013-03-31 16:51:27)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp4.xml ( 17996 bytes, from 2013-12-01 19:10:31)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp_common.xml ( 1615 bytes, from 2013-11-30 15:00:52)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp5.xml ( 22517 bytes, from 2013-12-03 20:59:13)
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- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp5.xml ( 22517 bytes, from 2014-06-25 12:55:02)
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- /home/robclark/src/freedreno/envytools/rnndb/dsi/dsi.xml ( 11712 bytes, from 2013-08-17 17:13:43)
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- /home/robclark/src/freedreno/envytools/rnndb/dsi/sfpb.xml ( 344 bytes, from 2013-08-11 19:26:32)
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- /home/robclark/src/freedreno/envytools/rnndb/dsi/mmss_cc.xml ( 1544 bytes, from 2013-08-16 19:17:05)
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- /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2013-07-05 19:21:12)
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- /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 20932 bytes, from 2013-12-01 15:13:04)
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- /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 23613 bytes, from 2014-06-25 12:53:44)
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Copyright (C) 2013 by the following authors:
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- Rob Clark <robdclark@gmail.com> (robclark)
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