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Merge tag 'mips_4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Browse Source 
Pull MIPS updates from Paul Burton:
 "Here's the main MIPS pull for Linux 4.21. Core architecture changes
  include:

   - Syscall tables & definitions for unistd.h are now generated by
     scripts, providing greater consistency with other architectures &
     making it easier to add new syscalls.

   - Support for building kernels with no floating point support, upon
     which any userland attempting to use floating point instructions
     will receive a SIGILL. Mostly useful to shrink the kernel & as
     preparation for nanoMIPS support which does not yet include FP.

   - MIPS SIMD Architecture (MSA) vector register context is now exposed
     by ptrace via a new NT_MIPS_MSA regset.

   - ASIDs are now stored as 64b values even for MIPS32 kernels,
     expanding the ASID version field sufficiently that we don't need to
     worry about overflow & avoiding rare issues with reused ASIDs that
     have been observed in the wild.

   - The branch delay slot "emulation" page is now mapped without write
     permission for the user, preventing its use as a nice location for
     attacks to execute malicious code from.

   - Support for ioremap_prot(), primarily to allow gdb or other ptrace
     users the ability to view their tracee's memory using the same
     cache coherency attribute.

   - Optimizations to more cpu_has_* macros, allowing more to be
     compile-time constant where possible.

   - Enable building the whole kernel with UBSAN instrumentation.

   - Enable building the kernel with link-time dead code & data
     elimination.

  Platform specific changes include:

   - The Boston board gains a workaround for DMA prefetching issues with
     the EG20T Platform Controller Hub that it uses.

   - Cleanups to Cavium Octeon code removing about 20k lines of
     redundant code, mostly unused or duplicate register definitions in
     headers.

   - defconfig updates for the DECstation machines, including new
     defconfigs for r4k & 64b machines.

   - Further work on Loongson 3 support.

   - DMA fixes for SiByte machines"

* tag 'mips_4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (95 commits)
  MIPS: math-emu: Write-protect delay slot emulation pages
  MIPS: Remove struct mm_context_t fp_mode_switching field
  mips: generate uapi header and system call table files
  mips: add system call table generation support
  mips: remove syscall table entries
  mips: add +1 to __NR_syscalls in uapi header
  mips: rename scall64-64.S to scall64-n64.S
  mips: remove unused macros
  mips: add __NR_syscalls along with __NR_Linux_syscalls
  MIPS: Expand MIPS32 ASIDs to 64 bits
  MIPS: OCTEON: delete redundant register definitions
  MIPS: OCTEON: cvmx_gmxx_inf_mode: use oldest forward compatible definition
  MIPS: OCTEON: cvmx_mio_fus_dat3: use oldest forward compatible definition
  MIPS: OCTEON: cvmx_pko_mem_debug8: use oldest forward compatible definition
  MIPS: OCTEON: octeon-usb: use common gpio_bit definition
  MIPS: OCTEON: enable all OCTEON drivers in defconfig
  mips: annotate implicit fall throughs
  MIPS: Hardcode cpu_has_mips* where target ISA allows
  MIPS: MT: Remove norps command line parameter
  MIPS: Only include mmzone.h when CONFIG_NEED_MULTIPLE_NODES=y
  ...
This commit is contained in:
Linus Torvalds
2018-12-26 10:45:33 -08:00
parent c2f1f3e0e1 adcc81f148
commit 89261c5702
221 changed files with 4324 additions and 25498 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/mips/include/asm/Kbuild
View File

@@ -1,4 +1,8 @@
# MIPS headers
generated-y += syscall_table_32_o32.h
generated-y += syscall_table_64_n32.h
generated-y += syscall_table_64_n64.h
generated-y += syscall_table_64_o32.h
generic-(CONFIG_GENERIC_CSUM) += checksum.h
generic-y += current.h
generic-y += device.h

27
arch/mips/include/asm/atomic.h
View File

@@ -59,12 +59,13 @@ static __inline__ void atomic_##op(int i, atomic_t * v) \
int temp; \
\
__asm__ __volatile__( \
" .set push \n" \
" .set "MIPS_ISA_LEVEL" \n" \
"1: ll %0, %1 # atomic_" #op " \n" \
" " #asm_op " %0, %2 \n" \
" sc %0, %1 \n" \
"\t" __scbeqz " %0, 1b \n" \
" .set mips0 \n" \
" .set pop \n" \
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
: "Ir" (i)); \
} else { \
@@ -85,13 +86,14 @@ static __inline__ int atomic_##op##_return_relaxed(int i, atomic_t * v) \
int temp; \
\
__asm__ __volatile__( \
" .set push \n" \
" .set "MIPS_ISA_LEVEL" \n" \
"1: ll %1, %2 # atomic_" #op "_return \n" \
" " #asm_op " %0, %1, %3 \n" \
" sc %0, %2 \n" \
"\t" __scbeqz " %0, 1b \n" \
" " #asm_op " %0, %1, %3 \n" \
" .set mips0 \n" \
" .set pop \n" \
: "=&r" (result), "=&r" (temp), \
"+" GCC_OFF_SMALL_ASM() (v->counter) \
: "Ir" (i)); \
@@ -117,12 +119,13 @@ static __inline__ int atomic_fetch_##op##_relaxed(int i, atomic_t * v) \
int temp; \
\
__asm__ __volatile__( \
" .set push \n" \
" .set "MIPS_ISA_LEVEL" \n" \
"1: ll %1, %2 # atomic_fetch_" #op " \n" \
" " #asm_op " %0, %1, %3 \n" \
" sc %0, %2 \n" \
"\t" __scbeqz " %0, 1b \n" \
" .set mips0 \n" \
" .set pop \n" \
" move %0, %1 \n" \
: "=&r" (result), "=&r" (temp), \
"+" GCC_OFF_SMALL_ASM() (v->counter) \
@@ -188,17 +191,19 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
int temp;
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_LEVEL" \n"
"1: ll %1, %2 # atomic_sub_if_positive\n"
" .set mips0 \n"
" .set pop \n"
" subu %0, %1, %3 \n"
" move %1, %0 \n"
" bltz %0, 1f \n"
" .set push \n"
" .set "MIPS_ISA_LEVEL" \n"
" sc %1, %2 \n"
"\t" __scbeqz " %1, 1b \n"
"1: \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (result), "=&r" (temp),
"+" GCC_OFF_SMALL_ASM() (v->counter)
: "Ir" (i));
@@ -252,12 +257,13 @@ static __inline__ void atomic64_##op(long i, atomic64_t * v) \
long temp; \
\
__asm__ __volatile__( \
" .set push \n" \
" .set "MIPS_ISA_LEVEL" \n" \
"1: lld %0, %1 # atomic64_" #op " \n" \
" " #asm_op " %0, %2 \n" \
" scd %0, %1 \n" \
"\t" __scbeqz " %0, 1b \n" \
" .set mips0 \n" \
" .set pop \n" \
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
: "Ir" (i)); \
} else { \
@@ -278,13 +284,14 @@ static __inline__ long atomic64_##op##_return_relaxed(long i, atomic64_t * v) \
long temp; \
\
__asm__ __volatile__( \
" .set push \n" \
" .set "MIPS_ISA_LEVEL" \n" \
"1: lld %1, %2 # atomic64_" #op "_return\n" \
" " #asm_op " %0, %1, %3 \n" \
" scd %0, %2 \n" \
"\t" __scbeqz " %0, 1b \n" \
" " #asm_op " %0, %1, %3 \n" \
" .set mips0 \n" \
" .set pop \n" \
: "=&r" (result), "=&r" (temp), \
"+" GCC_OFF_SMALL_ASM() (v->counter) \
: "Ir" (i)); \
@@ -310,13 +317,14 @@ static __inline__ long atomic64_fetch_##op##_relaxed(long i, atomic64_t * v) \
long temp; \
\
__asm__ __volatile__( \
" .set push \n" \
" .set "MIPS_ISA_LEVEL" \n" \
"1: lld %1, %2 # atomic64_fetch_" #op "\n" \
" " #asm_op " %0, %1, %3 \n" \
" scd %0, %2 \n" \
"\t" __scbeqz " %0, 1b \n" \
" move %0, %1 \n" \
" .set mips0 \n" \
" .set pop \n" \
: "=&r" (result), "=&r" (temp), \
"+" GCC_OFF_SMALL_ASM() (v->counter) \
: "Ir" (i)); \
@@ -382,6 +390,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
long temp;
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_LEVEL" \n"
"1: lld %1, %2 # atomic64_sub_if_positive\n"
" dsubu %0, %1, %3 \n"
@@ -390,7 +399,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
" scd %1, %2 \n"
"\t" __scbeqz " %1, 1b \n"
"1: \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (result), "=&r" (temp),
"+" GCC_OFF_SMALL_ASM() (v->counter)
: "Ir" (i));

42
arch/mips/include/asm/bitops.h
View File

@@ -58,12 +58,13 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
if (kernel_uses_llsc && R10000_LLSC_WAR) {
__asm__ __volatile__(
" .set push \n"
" .set arch=r4000 \n"
"1: " __LL "%0, %1 # set_bit \n"
" or %0, %2 \n"
" " __SC "%0, %1 \n"
" beqzl %0, 1b \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*m)
: "ir" (1UL << bit), GCC_OFF_SMALL_ASM() (*m));
#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
@@ -80,11 +81,12 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
} else if (kernel_uses_llsc) {
do {
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" " __LL "%0, %1 # set_bit \n"
" or %0, %2 \n"
" " __SC "%0, %1 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
: "ir" (1UL << bit));
} while (unlikely(!temp));
@@ -110,12 +112,13 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
if (kernel_uses_llsc && R10000_LLSC_WAR) {
__asm__ __volatile__(
" .set push \n"
" .set arch=r4000 \n"
"1: " __LL "%0, %1 # clear_bit \n"
" and %0, %2 \n"
" " __SC "%0, %1 \n"
" beqzl %0, 1b \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
: "ir" (~(1UL << bit)));
#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
@@ -132,11 +135,12 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
} else if (kernel_uses_llsc) {
do {
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" " __LL "%0, %1 # clear_bit \n"
" and %0, %2 \n"
" " __SC "%0, %1 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
: "ir" (~(1UL << bit)));
} while (unlikely(!temp));
@@ -176,12 +180,13 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set arch=r4000 \n"
"1: " __LL "%0, %1 # change_bit \n"
" xor %0, %2 \n"
" " __SC "%0, %1 \n"
" beqzl %0, 1b \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
: "ir" (1UL << bit));
} else if (kernel_uses_llsc) {
@@ -190,11 +195,12 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
do {
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" " __LL "%0, %1 # change_bit \n"
" xor %0, %2 \n"
" " __SC "%0, %1 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
: "ir" (1UL << bit));
} while (unlikely(!temp));
@@ -223,13 +229,14 @@ static inline int test_and_set_bit(unsigned long nr,
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set arch=r4000 \n"
"1: " __LL "%0, %1 # test_and_set_bit \n"
" or %2, %0, %3 \n"
" " __SC "%2, %1 \n"
" beqzl %2, 1b \n"
" and %2, %0, %3 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
: "r" (1UL << bit)
: "memory");
@@ -239,11 +246,12 @@ static inline int test_and_set_bit(unsigned long nr,
do {
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" " __LL "%0, %1 # test_and_set_bit \n"
" or %2, %0, %3 \n"
" " __SC "%2, %1 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
: "r" (1UL << bit)
: "memory");
@@ -277,13 +285,14 @@ static inline int test_and_set_bit_lock(unsigned long nr,
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set arch=r4000 \n"
"1: " __LL "%0, %1 # test_and_set_bit \n"
" or %2, %0, %3 \n"
" " __SC "%2, %1 \n"
" beqzl %2, 1b \n"
" and %2, %0, %3 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+m" (*m), "=&r" (res)
: "r" (1UL << bit)
: "memory");
@@ -293,11 +302,12 @@ static inline int test_and_set_bit_lock(unsigned long nr,
do {
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" " __LL "%0, %1 # test_and_set_bit \n"
" or %2, %0, %3 \n"
" " __SC "%2, %1 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
: "r" (1UL << bit)
: "memory");
@@ -332,6 +342,7 @@ static inline int test_and_clear_bit(unsigned long nr,
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set arch=r4000 \n"
"1: " __LL "%0, %1 # test_and_clear_bit \n"
" or %2, %0, %3 \n"
@@ -339,7 +350,7 @@ static inline int test_and_clear_bit(unsigned long nr,
" " __SC "%2, %1 \n"
" beqzl %2, 1b \n"
" and %2, %0, %3 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
: "r" (1UL << bit)
: "memory");
@@ -365,12 +376,13 @@ static inline int test_and_clear_bit(unsigned long nr,
do {
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" " __LL "%0, %1 # test_and_clear_bit \n"
" or %2, %0, %3 \n"
" xor %2, %3 \n"
" " __SC "%2, %1 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
: "r" (1UL << bit)
: "memory");
@@ -406,13 +418,14 @@ static inline int test_and_change_bit(unsigned long nr,
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set arch=r4000 \n"
"1: " __LL "%0, %1 # test_and_change_bit \n"
" xor %2, %0, %3 \n"
" " __SC "%2, %1 \n"
" beqzl %2, 1b \n"
" and %2, %0, %3 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
: "r" (1UL << bit)
: "memory");
@@ -422,11 +435,12 @@ static inline int test_and_change_bit(unsigned long nr,
do {
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" " __LL "%0, %1 # test_and_change_bit \n"
" xor %2, %0, %3 \n"
" " __SC "\t%2, %1 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
: "r" (1UL << bit)
: "memory");

6
arch/mips/include/asm/cmpxchg.h
View File

@@ -47,9 +47,10 @@ extern unsigned long __xchg_called_with_bad_pointer(void)
__asm__ __volatile__( \
" .set push \n" \
" .set noat \n" \
" .set push \n" \
" .set " MIPS_ISA_ARCH_LEVEL " \n" \
"1: " ld " %0, %2 # __xchg_asm \n" \
" .set mips0 \n" \
" .set pop \n" \
" move $1, %z3 \n" \
" .set " MIPS_ISA_ARCH_LEVEL " \n" \
" " st " $1, %1 \n" \
@@ -117,10 +118,11 @@ static inline unsigned long __xchg(volatile void *ptr, unsigned long x,
__asm__ __volatile__( \
" .set push \n" \
" .set noat \n" \
" .set push \n" \
" .set "MIPS_ISA_ARCH_LEVEL" \n" \
"1: " ld " %0, %2 # __cmpxchg_asm \n" \
" bne %0, %z3, 2f \n" \
" .set mips0 \n" \
" .set pop \n" \
" move $1, %z4 \n" \
" .set "MIPS_ISA_ARCH_LEVEL" \n" \
" " st " $1, %1 \n" \

24
arch/mips/include/asm/compiler.h
View File

@@ -43,27 +43,15 @@
#undef barrier_before_unreachable
#define barrier_before_unreachable() asm volatile(".insn")
#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
#define GCC_IMM_ASM() "n"
#define GCC_REG_ACCUM "$0"
#if !defined(CONFIG_CC_IS_GCC) || \
(__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
# define GCC_OFF_SMALL_ASM() "ZC"
#elif defined(CONFIG_CPU_MICROMIPS)
# error "microMIPS compilation unsupported with GCC older than 4.9"
#else
#define GCC_IMM_ASM() "rn"
#define GCC_REG_ACCUM "accum"
# define GCC_OFF_SMALL_ASM() "R"
#endif
#ifdef CONFIG_CPU_MIPSR6
/* All MIPS R6 toolchains support the ZC constrain */
#define GCC_OFF_SMALL_ASM() "ZC"
#else
#ifndef CONFIG_CPU_MICROMIPS
#define GCC_OFF_SMALL_ASM() "R"
#elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
#define GCC_OFF_SMALL_ASM() "ZC"
#else
#error "microMIPS compilation unsupported with GCC older than 4.9"
#endif /* CONFIG_CPU_MICROMIPS */
#endif /* CONFIG_CPU_MIPSR6 */
#ifdef CONFIG_CPU_MIPSR6
#define MIPS_ISA_LEVEL "mips64r6"
#define MIPS_ISA_ARCH_LEVEL MIPS_ISA_LEVEL

60
arch/mips/include/asm/cpu-features.h
View File

@@ -15,6 +15,7 @@
#include <cpu-feature-overrides.h>
#define __ase(ase) (cpu_data[0].ases & (ase))
#define __isa(isa) (cpu_data[0].isa_level & (isa))
#define __opt(opt) (cpu_data[0].options & (opt))
/*
@@ -52,6 +53,18 @@
#define __isa_lt_and_ase(isa, ase) ((MIPS_ISA_REV < (isa)) && __ase(ase))
#define __isa_lt_and_opt(isa, opt) ((MIPS_ISA_REV < (isa)) && __opt(opt))
/*
* Similarly allow for ISA level checks that take into account knowledge of the
* ISA targeted by the kernel build, provided by MIPS_ISA_REV.
*/
#define __isa_ge_and_flag(isa, flag) ((MIPS_ISA_REV >= (isa)) && __isa(flag))
#define __isa_ge_or_flag(isa, flag) ((MIPS_ISA_REV >= (isa)) || __isa(flag))
#define __isa_lt_and_flag(isa, flag) ((MIPS_ISA_REV < (isa)) && __isa(flag))
#define __isa_range(ge, lt) \
((MIPS_ISA_REV >= (ge)) && (MIPS_ISA_REV < (lt)))
#define __isa_range_or_flag(ge, lt, flag) \
(__isa_range(ge, lt) || ((MIPS_ISA_REV < (lt)) && __isa(flag)))
/*
* SMP assumption: Options of CPU 0 are a superset of all processors.
* This is true for all known MIPS systems.
@@ -115,10 +128,15 @@
#endif
/* Don't override `cpu_has_fpu' to 1 or the "nofpu" option won't work. */
#ifndef cpu_has_fpu
#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU)
#define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU)
# ifdef CONFIG_MIPS_FP_SUPPORT
# define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU)
# define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU)
# else
# define cpu_has_fpu 0
# define raw_cpu_has_fpu 0
# endif
#else
#define raw_cpu_has_fpu cpu_has_fpu
# define raw_cpu_has_fpu cpu_has_fpu
#endif
#ifndef cpu_has_32fpr
#define cpu_has_32fpr __isa_ge_or_opt(1, MIPS_CPU_32FPR)
@@ -195,7 +213,9 @@
#endif
#ifndef cpu_has_mmips
# ifdef CONFIG_SYS_SUPPORTS_MICROMIPS
# if defined(__mips_micromips)
# define cpu_has_mmips 1
# elif defined(CONFIG_SYS_SUPPORTS_MICROMIPS)
# define cpu_has_mmips __opt(MIPS_CPU_MICROMIPS)
# else
# define cpu_has_mmips 0
@@ -246,48 +266,38 @@
#endif
#endif
/* __builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r */
#if !((defined(cpu_has_mips32r1) && cpu_has_mips32r1) || \
(defined(cpu_has_mips32r2) && cpu_has_mips32r2) || \
(defined(cpu_has_mips32r6) && cpu_has_mips32r6) || \
(defined(cpu_has_mips64r1) && cpu_has_mips64r1) || \
(defined(cpu_has_mips64r2) && cpu_has_mips64r2) || \
(defined(cpu_has_mips64r6) && cpu_has_mips64r6))
#define CPU_NO_EFFICIENT_FFS 1
#endif
#ifndef cpu_has_mips_1
# define cpu_has_mips_1 (!cpu_has_mips_r6)
# define cpu_has_mips_1 (MIPS_ISA_REV < 6)
#endif
#ifndef cpu_has_mips_2
# define cpu_has_mips_2 (cpu_data[0].isa_level & MIPS_CPU_ISA_II)
# define cpu_has_mips_2 __isa_lt_and_flag(6, MIPS_CPU_ISA_II)
#endif
#ifndef cpu_has_mips_3
# define cpu_has_mips_3 (cpu_data[0].isa_level & MIPS_CPU_ISA_III)
# define cpu_has_mips_3 __isa_lt_and_flag(6, MIPS_CPU_ISA_III)
#endif
#ifndef cpu_has_mips_4
# define cpu_has_mips_4 (cpu_data[0].isa_level & MIPS_CPU_ISA_IV)
# define cpu_has_mips_4 __isa_lt_and_flag(6, MIPS_CPU_ISA_IV)
#endif
#ifndef cpu_has_mips_5
# define cpu_has_mips_5 (cpu_data[0].isa_level & MIPS_CPU_ISA_V)
# define cpu_has_mips_5 __isa_lt_and_flag(6, MIPS_CPU_ISA_V)
#endif
#ifndef cpu_has_mips32r1
# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1)
# define cpu_has_mips32r1 __isa_range_or_flag(1, 6, MIPS_CPU_ISA_M32R1)
#endif
#ifndef cpu_has_mips32r2
# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)
# define cpu_has_mips32r2 __isa_range_or_flag(2, 6, MIPS_CPU_ISA_M32R2)
#endif
#ifndef cpu_has_mips32r6
# define cpu_has_mips32r6 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R6)
# define cpu_has_mips32r6 __isa_ge_or_flag(6, MIPS_CPU_ISA_M32R6)
#endif
#ifndef cpu_has_mips64r1
# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)
# define cpu_has_mips64r1 __isa_range_or_flag(1, 6, MIPS_CPU_ISA_M64R1)
#endif
#ifndef cpu_has_mips64r2
# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)
# define cpu_has_mips64r2 __isa_range_or_flag(2, 6, MIPS_CPU_ISA_M64R2)
#endif
#ifndef cpu_has_mips64r6
# define cpu_has_mips64r6 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R6)
# define cpu_has_mips64r6 __isa_ge_and_flag(6, MIPS_CPU_ISA_M64R6)
#endif
/*

2
arch/mips/include/asm/cpu-info.h
View File

@@ -50,7 +50,7 @@ struct guest_info {
#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */
struct cpuinfo_mips {
unsigned long asid_cache;
u64 asid_cache;
#ifdef CONFIG_MIPS_ASID_BITS_VARIABLE
unsigned long asid_mask;
#endif

3
arch/mips/include/asm/cpu.h
View File

@@ -248,8 +248,9 @@
#define PRID_REV_LOONGSON3A_R1 0x0005
#define PRID_REV_LOONGSON3B_R1 0x0006
#define PRID_REV_LOONGSON3B_R2 0x0007
#define PRID_REV_LOONGSON3A_R2 0x0008
#define PRID_REV_LOONGSON3A_R2_0 0x0008
#define PRID_REV_LOONGSON3A_R3_0 0x0009
#define PRID_REV_LOONGSON3A_R2_1 0x000c
#define PRID_REV_LOONGSON3A_R3_1 0x000d
/*

29
arch/mips/include/asm/dsemul.h
View File

@@ -52,7 +52,14 @@ extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
*
* Return: True if an emulation frame was returned from, else false.
*/
#ifdef CONFIG_MIPS_FP_SUPPORT
extern bool do_dsemulret(struct pt_regs *xcp);
#else
static inline bool do_dsemulret(struct pt_regs *xcp)
{
return false;
}
#endif
/**
* dsemul_thread_cleanup() - Cleanup thread 'emulation' frame
@@ -63,8 +70,14 @@ extern bool do_dsemulret(struct pt_regs *xcp);
*
* Return: True if a frame was freed, else false.
*/
#ifdef CONFIG_MIPS_FP_SUPPORT
extern bool dsemul_thread_cleanup(struct task_struct *tsk);
#else
static inline bool dsemul_thread_cleanup(struct task_struct *tsk)
{
return false;
}
#endif
/**
* dsemul_thread_rollback() - Rollback from an 'emulation' frame
* @regs: User thread register context.
@@ -77,7 +90,14 @@ extern bool dsemul_thread_cleanup(struct task_struct *tsk);
*
* Return: True if a frame was exited, else false.
*/
#ifdef CONFIG_MIPS_FP_SUPPORT
extern bool dsemul_thread_rollback(struct pt_regs *regs);
#else
static inline bool dsemul_thread_rollback(struct pt_regs *regs)
{
return false;
}
#endif
/**
* dsemul_mm_cleanup() - Cleanup per-mm delay slot 'emulation' state
@@ -87,6 +107,13 @@ extern bool dsemul_thread_rollback(struct pt_regs *regs);
* for delay slot 'emulation' book-keeping is freed. This is to be called
* before @mm is freed in order to avoid memory leaks.
*/
#ifdef CONFIG_MIPS_FP_SUPPORT
extern void dsemul_mm_cleanup(struct mm_struct *mm);
#else
static inline void dsemul_mm_cleanup(struct mm_struct *mm)
{
/* no-op */
}
#endif
#endif /* __MIPS_ASM_DSEMUL_H__ */

3
arch/mips/include/asm/edac.h
View File

@@ -21,12 +21,13 @@ static inline void edac_atomic_scrub(void *va, u32 size)
*/
__asm__ __volatile__ (
" .set push \n"
" .set mips2 \n"
"1: ll %0, %1 # edac_atomic_scrub \n"
" addu %0, $0 \n"
" sc %0, %1 \n"
" beqz %0, 1b \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*virt_addr)
: GCC_OFF_SMALL_ASM() (*virt_addr));

26
arch/mips/include/asm/elf.h
View File

@@ -481,6 +481,8 @@ struct linux_binprm;
extern int arch_setup_additional_pages(struct linux_binprm *bprm,
int uses_interp);
#ifdef CONFIG_MIPS_FP_SUPPORT
struct arch_elf_state {
int nan_2008;
int fp_abi;
@@ -497,19 +499,35 @@ struct arch_elf_state {
.overall_fp_mode = -1, \
}
/* Whether to accept legacy-NaN and 2008-NaN user binaries. */
extern bool mips_use_nan_legacy;
extern bool mips_use_nan_2008;
extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
bool is_interp, struct arch_elf_state *state);
extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr,
struct arch_elf_state *state);
/* Whether to accept legacy-NaN and 2008-NaN user binaries. */
extern bool mips_use_nan_legacy;
extern bool mips_use_nan_2008;
extern void mips_set_personality_nan(struct arch_elf_state *state);
extern void mips_set_personality_fp(struct arch_elf_state *state);
#else /* !CONFIG_MIPS_FP_SUPPORT */
struct arch_elf_state;
static inline void mips_set_personality_nan(struct arch_elf_state *state)
{
/* no-op */
}
static inline void mips_set_personality_fp(struct arch_elf_state *state)
{
/* no-op */
}
#endif /* !CONFIG_MIPS_FP_SUPPORT */
#define elf_read_implies_exec(ex, stk) mips_elf_read_implies_exec(&(ex), stk)
extern int mips_elf_read_implies_exec(void *elf_ex, int exstack);

145
arch/mips/include/asm/fpu.h
View File

@@ -30,13 +30,6 @@
#include <asm/mips_mt.h>
#endif
struct sigcontext;
struct sigcontext32;
extern void _init_fpu(unsigned int);
extern void _save_fp(struct task_struct *);
extern void _restore_fp(struct task_struct *);
/*
* This enum specifies a mode in which we want the FPU to operate, for cores
* which implement the Status.FR bit. Note that the bottom bit of the value
@@ -51,6 +44,11 @@ enum fpu_mode {
#define FPU_FR_MASK 0x1
};
#ifdef CONFIG_MIPS_FP_SUPPORT
extern void _save_fp(struct task_struct *);
extern void _restore_fp(struct task_struct *);
#define __disable_fpu() \
do { \
clear_c0_status(ST0_CU1); \
@@ -198,42 +196,36 @@ static inline void lose_fpu(int save)
preempt_enable();
}
static inline int init_fpu(void)
/**
* init_fp_ctx() - Initialize task FP context
* @target: The task whose FP context should be initialized.
*
* Initializes the FP context of the target task to sane default values if that
* target task does not already have valid FP context. Once the context has
* been initialized, the task will be marked as having used FP & thus having
* valid FP context.
*
* Returns: true if context is initialized, else false.
*/
static inline bool init_fp_ctx(struct task_struct *target)
{
unsigned int fcr31 = current->thread.fpu.fcr31;
int ret = 0;
/* If FP has been used then the target already has context */
if (tsk_used_math(target))
return false;
if (cpu_has_fpu) {
unsigned int config5;
/* Begin with data registers set to all 1s... */
memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
ret = __own_fpu();
if (ret)
return ret;
/* FCSR has been preset by `mips_set_personality_nan'. */
if (!cpu_has_fre) {
_init_fpu(fcr31);
/*
* Record that the target has "used" math, such that the context
* just initialised, and any modifications made by the caller,
* aren't discarded.
*/
set_stopped_child_used_math(target);
return 0;
}
/*
* Ensure FRE is clear whilst running _init_fpu, since
* single precision FP instructions are used. If FRE
* was set then we'll just end up initialising all 32
* 64b registers.
*/
config5 = clear_c0_config5(MIPS_CONF5_FRE);
enable_fpu_hazard();
_init_fpu(fcr31);
/* Restore FRE */
write_c0_config5(config5);
enable_fpu_hazard();
} else
fpu_emulator_init_fpu();
return ret;
return true;
}
static inline void save_fp(struct task_struct *tsk)
@@ -260,4 +252,81 @@ static inline union fpureg *get_fpu_regs(struct task_struct *tsk)
return tsk->thread.fpu.fpr;
}
#else /* !CONFIG_MIPS_FP_SUPPORT */
/*
* When FP support is disabled we provide only a minimal set of stub functions
* to avoid callers needing to care too much about CONFIG_MIPS_FP_SUPPORT.
*/
static inline int __enable_fpu(enum fpu_mode mode)
{
return SIGILL;
}
static inline void __disable_fpu(void)
{
/* no-op */
}
static inline int is_fpu_owner(void)
{
return 0;
}
static inline void clear_fpu_owner(void)
{
/* no-op */
}
static inline int own_fpu_inatomic(int restore)
{
return SIGILL;
}
static inline int own_fpu(int restore)
{
return SIGILL;
}
static inline void lose_fpu_inatomic(int save, struct task_struct *tsk)
{
/* no-op */
}
static inline void lose_fpu(int save)
{
/* no-op */
}
static inline bool init_fp_ctx(struct task_struct *target)
{
return false;
}
/*
* The following functions should only be called in paths where we know that FP
* support is enabled, typically a path where own_fpu() or __enable_fpu() have
* returned successfully. When CONFIG_MIPS_FP_SUPPORT=n it is known at compile
* time that this should never happen, so calls to these functions should be
* optimized away & never actually be emitted.
*/
extern void save_fp(struct task_struct *tsk)
__compiletime_error("save_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
extern void _save_fp(struct task_struct *)
__compiletime_error("_save_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
extern void restore_fp(struct task_struct *tsk)
__compiletime_error("restore_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
extern void _restore_fp(struct task_struct *)
__compiletime_error("_restore_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
extern union fpureg *get_fpu_regs(struct task_struct *tsk)
__compiletime_error("get_fpu_regs() should not be called when CONFIG_MIPS_FP_SUPPORT=n");
#endif /* !CONFIG_MIPS_FP_SUPPORT */
#endif /* _ASM_FPU_H */

11
arch/mips/include/asm/fpu_emulator.h
View File

@@ -188,17 +188,6 @@ int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
unsigned long *contpc);
#define SIGNALLING_NAN 0x7ff800007ff80000LL
static inline void fpu_emulator_init_fpu(void)
{
struct task_struct *t = current;
int i;
for (i = 0; i < 32; i++)
set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN);
}
/*
* Mask the FCSR Cause bits according to the Enable bits, observing
* that Unimplemented is always enabled.

14
arch/mips/include/asm/futex.h
View File

@@ -24,9 +24,10 @@
__asm__ __volatile__( \
" .set push \n" \
" .set noat \n" \
" .set push \n" \
" .set arch=r4000 \n" \
"1: ll %1, %4 # __futex_atomic_op \n" \
" .set mips0 \n" \
" .set pop \n" \
" " insn " \n" \
" .set arch=r4000 \n" \
"2: sc $1, %2 \n" \
@@ -35,7 +36,6 @@
"3: \n" \
" .insn \n" \
" .set pop \n" \
" .set mips0 \n" \
" .section .fixup,\"ax\" \n" \
"4: li %0, %6 \n" \
" j 3b \n" \
@@ -53,9 +53,10 @@
__asm__ __volatile__( \
" .set push \n" \
" .set noat \n" \
" .set push \n" \
" .set "MIPS_ISA_ARCH_LEVEL" \n" \
"1: "user_ll("%1", "%4")" # __futex_atomic_op\n" \
" .set mips0 \n" \
" .set pop \n" \
" " insn " \n" \
" .set "MIPS_ISA_ARCH_LEVEL" \n" \
"2: "user_sc("$1", "%2")" \n" \
@@ -64,7 +65,6 @@
"3: \n" \
" .insn \n" \
" .set pop \n" \
" .set mips0 \n" \
" .section .fixup,\"ax\" \n" \
"4: li %0, %6 \n" \
" j 3b \n" \
@@ -137,10 +137,11 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
"# futex_atomic_cmpxchg_inatomic \n"
" .set push \n"
" .set noat \n"
" .set push \n"
" .set arch=r4000 \n"
"1: ll %1, %3 \n"
" bne %1, %z4, 3f \n"
" .set mips0 \n"
" .set pop \n"
" move $1, %z5 \n"
" .set arch=r4000 \n"
"2: sc $1, %2 \n"
@@ -166,10 +167,11 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
"# futex_atomic_cmpxchg_inatomic \n"
" .set push \n"
" .set noat \n"
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
"1: "user_ll("%1", "%3")" \n"
" bne %1, %z4, 3f \n"
" .set mips0 \n"
" .set pop \n"
" move $1, %z5 \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
"2: "user_sc("$1", "%2")" \n"

6
arch/mips/include/asm/hazards.h
View File

@@ -66,10 +66,11 @@ do { \
unsigned long tmp; \
\
__asm__ __volatile__( \
" .set push \n" \
" .set "MIPS_ISA_LEVEL" \n" \
" dla %0, 1f \n" \
" jr.hb %0 \n" \
" .set mips0 \n" \
" .set pop \n" \
"1: \n" \
: "=r" (tmp)); \
} while (0)
@@ -141,10 +142,11 @@ do { \
unsigned long tmp; \
\
__asm__ __volatile__( \
" .set push \n" \
" .set mips64r2 \n" \
" dla %0, 1f \n" \
" jr.hb %0 \n" \
" .set mips0 \n" \
" .set pop \n" \
"1: \n" \
: "=r" (tmp)); \
} while (0)

22
arch/mips/include/asm/io.h
View File

@@ -217,6 +217,18 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si
#undef __IS_LOW512
}
/*
* ioremap_prot - map bus memory into CPU space
* @offset: bus address of the memory
* @size: size of the resource to map
* ioremap_prot gives the caller control over cache coherency attributes (CCA)
*/
static inline void __iomem *ioremap_prot(phys_addr_t offset,
unsigned long size, unsigned long prot_val) {
return __ioremap_mode(offset, size, prot_val & _CACHE_MASK);
}
/*
* ioremap - map bus memory into CPU space
* @offset: bus address of the memory
@@ -342,13 +354,14 @@ static inline void pfx##write##bwlq(type val, \
if (irq) \
local_irq_save(__flags); \
__asm__ __volatile__( \
".set arch=r4000" "\t\t# __writeq""\n\t" \
".set push" "\t\t# __writeq""\n\t" \
".set arch=r4000" "\n\t" \
"dsll32 %L0, %L0, 0" "\n\t" \
"dsrl32 %L0, %L0, 0" "\n\t" \
"dsll32 %M0, %M0, 0" "\n\t" \
"or %L0, %L0, %M0" "\n\t" \
"sd %L0, %2" "\n\t" \
".set mips0" "\n" \
".set pop" "\n" \
: "=r" (__tmp) \
: "0" (__val), "m" (*__mem)); \
if (irq) \
@@ -375,11 +388,12 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \
if (irq) \
local_irq_save(__flags); \
__asm__ __volatile__( \
".set arch=r4000" "\t\t# __readq" "\n\t" \
".set push" "\t\t# __readq" "\n\t" \
".set arch=r4000" "\n\t" \
"ld %L0, %1" "\n\t" \
"dsra32 %M0, %L0, 0" "\n\t" \
"sll %L0, %L0, 0" "\n\t" \
".set mips0" "\n" \
".set pop" "\n" \
: "=r" (__val) \
: "m" (*__mem)); \
if (irq) \

9
arch/mips/include/asm/kvm_host.h
View File

@@ -411,11 +411,12 @@ static inline void _kvm_atomic_set_c0_guest_reg(unsigned long *reg,
unsigned long temp;
do {
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" " __LL "%0, %1 \n"
" or %0, %2 \n"
" " __SC "%0, %1 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+m" (*reg)
: "r" (val));
} while (unlikely(!temp));
@@ -427,11 +428,12 @@ static inline void _kvm_atomic_clear_c0_guest_reg(unsigned long *reg,
unsigned long temp;
do {
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" " __LL "%0, %1 \n"
" and %0, %2 \n"
" " __SC "%0, %1 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+m" (*reg)
: "r" (~val));
} while (unlikely(!temp));
@@ -444,12 +446,13 @@ static inline void _kvm_atomic_change_c0_guest_reg(unsigned long *reg,
unsigned long temp;
do {
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" " __LL "%0, %1 \n"
" and %0, %2 \n"
" or %0, %3 \n"
" " __SC "%0, %1 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (temp), "+m" (*reg)
: "r" (~change), "r" (val & change));
} while (unlikely(!temp));

12
arch/mips/include/asm/local.h
View File

@@ -35,13 +35,14 @@ static __inline__ long local_add_return(long i, local_t * l)
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set arch=r4000 \n"
"1:" __LL "%1, %2 # local_add_return \n"
" addu %0, %1, %3 \n"
__SC "%0, %2 \n"
" beqzl %0, 1b \n"
" addu %0, %1, %3 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
: "Ir" (i), "m" (l->a.counter)
: "memory");
@@ -49,13 +50,14 @@ static __inline__ long local_add_return(long i, local_t * l)
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
"1:" __LL "%1, %2 # local_add_return \n"
" addu %0, %1, %3 \n"
__SC "%0, %2 \n"
" beqz %0, 1b \n"
" addu %0, %1, %3 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
: "Ir" (i), "m" (l->a.counter)
: "memory");
@@ -80,13 +82,14 @@ static __inline__ long local_sub_return(long i, local_t * l)
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set arch=r4000 \n"
"1:" __LL "%1, %2 # local_sub_return \n"
" subu %0, %1, %3 \n"
__SC "%0, %2 \n"
" beqzl %0, 1b \n"
" subu %0, %1, %3 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
: "Ir" (i), "m" (l->a.counter)
: "memory");
@@ -94,13 +97,14 @@ static __inline__ long local_sub_return(long i, local_t * l)
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
"1:" __LL "%1, %2 # local_sub_return \n"
" subu %0, %1, %3 \n"
__SC "%0, %2 \n"
" beqz %0, 1b \n"
" subu %0, %1, %3 \n"
" .set mips0 \n"
" .set pop \n"
: "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
: "Ir" (i), "m" (l->a.counter)
: "memory");

4
arch/mips/include/asm/mach-loongson64/kernel-entry-init.h
View File

@@ -31,7 +31,7 @@
/* Enable STFill Buffer */
mfc0 t0, CP0_PRID
andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2)
slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2_0)
bnez t0, 1f
mfc0 t0, CP0_CONFIG6
or t0, 0x100
@@ -60,7 +60,7 @@
/* Enable STFill Buffer */
mfc0 t0, CP0_PRID
andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2)
slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2_0)
bnez t0, 1f
mfc0 t0, CP0_CONFIG6
or t0, 0x100

1
arch/mips/include/asm/mach-loongson64/mmzone.h
View File

@@ -21,6 +21,7 @@
#define NODE3_ADDRSPACE_OFFSET 0x300000000000UL
#define pa_to_nid(addr) (((addr) & 0xf00000000000) >> NODE_ADDRSPACE_SHIFT)
#define nid_to_addrbase(nid) ((nid) << NODE_ADDRSPACE_SHIFT)
#define LEVELS_PER_SLICE 128

7
arch/mips/include/asm/mipsmtregs.h
View File

@@ -255,12 +255,12 @@ static inline unsigned int dmt(void)
static inline void __raw_emt(void)
{
__asm__ __volatile__(
" .set push \n"
" .set noreorder \n"
" .set mips32r2 \n"
" .word 0x41600be1 # emt \n"
" ehb \n"
" .set mips0 \n"
" .set reorder");
" .set pop");
}
/* enable multi-threaded execution if previous suggested it should be.
@@ -277,9 +277,10 @@ static inline void emt(int previous)
static inline void ehb(void)
{
__asm__ __volatile__(
" .set push \n"
" .set mips32r2 \n"
" ehb \n"
" .set mips0 \n");
" .set pop \n");
}
#define mftc0(rt,sel) \

30
arch/mips/include/asm/mipsregs.h
View File

@@ -1345,9 +1345,10 @@ do { \
: "=r" (__res)); \
else \
__asm__ vol( \
".set\tpush\n\t" \
".set\tmips32\n\t" \
"mfc0\t%0, " #source ", " #sel "\n\t" \
".set\tmips0\n\t" \
".set\tpop\n\t" \
: "=r" (__res)); \
__res; \
})
@@ -1358,15 +1359,17 @@ do { \
__res = __read_64bit_c0_split(source, sel, vol); \
else if (sel == 0) \
__asm__ vol( \
".set\tpush\n\t" \
".set\tmips3\n\t" \
"dmfc0\t%0, " #source "\n\t" \
".set\tmips0" \
".set\tpop" \
: "=r" (__res)); \
else \
__asm__ vol( \
".set\tpush\n\t" \
".set\tmips64\n\t" \
"dmfc0\t%0, " #source ", " #sel "\n\t" \
".set\tmips0" \
".set\tpop" \
: "=r" (__res)); \
__res; \
})
@@ -1391,9 +1394,10 @@ do { \
: : "Jr" ((unsigned int)(value))); \
else \
__asm__ __volatile__( \
".set\tpush\n\t" \
".set\tmips32\n\t" \
"mtc0\t%z0, " #register ", " #sel "\n\t" \
".set\tmips0" \
".set\tpop" \
: : "Jr" ((unsigned int)(value))); \
} while (0)
@@ -1403,15 +1407,17 @@ do { \
__write_64bit_c0_split(register, sel, value); \
else if (sel == 0) \
__asm__ __volatile__( \
".set\tpush\n\t" \
".set\tmips3\n\t" \
"dmtc0\t%z0, " #register "\n\t" \
".set\tmips0" \
".set\tpop" \
: : "Jr" (value)); \
else \
__asm__ __volatile__( \
".set\tpush\n\t" \
".set\tmips64\n\t" \
"dmtc0\t%z0, " #register ", " #sel "\n\t" \
".set\tmips0" \
".set\tpop" \
: : "Jr" (value)); \
} while (0)
@@ -1463,19 +1469,21 @@ do { \
local_irq_save(__flags); \
if (sel == 0) \
__asm__ vol( \
".set\tpush\n\t" \
".set\tmips64\n\t" \
"dmfc0\t%L0, " #source "\n\t" \
"dsra\t%M0, %L0, 32\n\t" \
"sll\t%L0, %L0, 0\n\t" \
".set\tmips0" \
".set\tpop" \
: "=r" (__val)); \
else \
__asm__ vol( \
".set\tpush\n\t" \
".set\tmips64\n\t" \
"dmfc0\t%L0, " #source ", " #sel "\n\t" \
"dsra\t%M0, %L0, 32\n\t" \
"sll\t%L0, %L0, 0\n\t" \
".set\tmips0" \
".set\tpop" \
: "=r" (__val)); \
local_irq_restore(__flags); \
\
@@ -1498,23 +1506,25 @@ do { \
: "+r" (__tmp)); \
else if (sel == 0) \
__asm__ __volatile__( \
".set\tpush\n\t" \
".set\tmips64\n\t" \
"dsll\t%L0, %L0, 32\n\t" \
"dsrl\t%L0, %L0, 32\n\t" \
"dsll\t%M0, %M0, 32\n\t" \
"or\t%L0, %L0, %M0\n\t" \
"dmtc0\t%L0, " #source "\n\t" \
".set\tmips0" \
".set\tpop" \
: "+r" (__tmp)); \
else \
__asm__ __volatile__( \
".set\tpush\n\t" \
".set\tmips64\n\t" \
"dsll\t%L0, %L0, 32\n\t" \
"dsrl\t%L0, %L0, 32\n\t" \
"dsll\t%M0, %M0, 32\n\t" \
"or\t%L0, %L0, %M0\n\t" \
"dmtc0\t%L0, " #source ", " #sel "\n\t" \
".set\tmips0" \
".set\tpop" \
: "+r" (__tmp)); \
local_irq_restore(__flags); \
} while (0)

3
arch/mips/include/asm/mmu.h
View File

@@ -7,9 +7,8 @@
#include <linux/wait.h>
typedef struct {
unsigned long asid[NR_CPUS];
u64 asid[NR_CPUS];
void *vdso;
atomic_t fp_mode_switching;
/* lock to be held whilst modifying fp_bd_emupage_allocmap */
spinlock_t bd_emupage_lock;

10
arch/mips/include/asm/mmu_context.h
View File

@@ -76,14 +76,14 @@ extern unsigned long pgd_current[];
* All unused by hardware upper bits will be considered
* as a software asid extension.
*/
static unsigned long asid_version_mask(unsigned int cpu)
static inline u64 asid_version_mask(unsigned int cpu)
{
unsigned long asid_mask = cpu_asid_mask(&cpu_data[cpu]);
return ~(asid_mask | (asid_mask - 1));
return ~(u64)(asid_mask | (asid_mask - 1));
}
static unsigned long asid_first_version(unsigned int cpu)
static inline u64 asid_first_version(unsigned int cpu)
{
return ~asid_version_mask(cpu) + 1;
}
@@ -102,14 +102,12 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
static inline void
get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
{
unsigned long asid = asid_cache(cpu);
u64 asid = asid_cache(cpu);
if (!((asid += cpu_asid_inc()) & cpu_asid_mask(&cpu_data[cpu]))) {
if (cpu_has_vtag_icache)
flush_icache_all();
local_flush_tlb_all(); /* start new asid cycle */
if (!asid) /* fix version if needed */
asid = asid_first_version(cpu);
}
cpu_context(cpu, mm) = asid_cache(cpu) = asid;

13
arch/mips/include/asm/mmzone.h
View File

@@ -7,7 +7,18 @@
#define _ASM_MMZONE_H_
#include <asm/page.h>
#include <mmzone.h>
#ifdef CONFIG_NEED_MULTIPLE_NODES
# include <mmzone.h>
#endif
#ifndef pa_to_nid
#define pa_to_nid(addr) 0
#endif
#ifndef nid_to_addrbase
#define nid_to_addrbase(nid) 0
#endif
#ifdef CONFIG_DISCONTIGMEM

699
arch/mips/include/asm/octeon/cvmx-agl-defs.h
View File

File diff suppressed because it is too large Load Diff

105
arch/mips/include/asm/octeon/cvmx-asxx-defs.h
View File

@@ -68,9 +68,6 @@ union cvmx_asxx_gmii_rx_clk_set {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_asxx_gmii_rx_clk_set_s cn30xx;
struct cvmx_asxx_gmii_rx_clk_set_s cn31xx;
struct cvmx_asxx_gmii_rx_clk_set_s cn50xx;
};
union cvmx_asxx_gmii_rx_dat_set {
@@ -84,9 +81,6 @@ union cvmx_asxx_gmii_rx_dat_set {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_asxx_gmii_rx_dat_set_s cn30xx;
struct cvmx_asxx_gmii_rx_dat_set_s cn31xx;
struct cvmx_asxx_gmii_rx_dat_set_s cn50xx;
};
union cvmx_asxx_int_en {
@@ -121,12 +115,6 @@ union cvmx_asxx_int_en {
uint64_t reserved_11_63:53;
#endif
} cn30xx;
struct cvmx_asxx_int_en_cn30xx cn31xx;
struct cvmx_asxx_int_en_s cn38xx;
struct cvmx_asxx_int_en_s cn38xxp2;
struct cvmx_asxx_int_en_cn30xx cn50xx;
struct cvmx_asxx_int_en_s cn58xx;
struct cvmx_asxx_int_en_s cn58xxp1;
};
union cvmx_asxx_int_reg {
@@ -161,12 +149,6 @@ union cvmx_asxx_int_reg {
uint64_t reserved_11_63:53;
#endif
} cn30xx;
struct cvmx_asxx_int_reg_cn30xx cn31xx;
struct cvmx_asxx_int_reg_s cn38xx;
struct cvmx_asxx_int_reg_s cn38xxp2;
struct cvmx_asxx_int_reg_cn30xx cn50xx;
struct cvmx_asxx_int_reg_s cn58xx;
struct cvmx_asxx_int_reg_s cn58xxp1;
};
union cvmx_asxx_mii_rx_dat_set {
@@ -180,8 +162,6 @@ union cvmx_asxx_mii_rx_dat_set {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_asxx_mii_rx_dat_set_s cn30xx;
struct cvmx_asxx_mii_rx_dat_set_s cn50xx;
};
union cvmx_asxx_prt_loop {
@@ -210,12 +190,6 @@ union cvmx_asxx_prt_loop {
uint64_t reserved_7_63:57;
#endif
} cn30xx;
struct cvmx_asxx_prt_loop_cn30xx cn31xx;
struct cvmx_asxx_prt_loop_s cn38xx;
struct cvmx_asxx_prt_loop_s cn38xxp2;
struct cvmx_asxx_prt_loop_cn30xx cn50xx;
struct cvmx_asxx_prt_loop_s cn58xx;
struct cvmx_asxx_prt_loop_s cn58xxp1;
};
union cvmx_asxx_rld_bypass {
@@ -229,10 +203,6 @@ union cvmx_asxx_rld_bypass {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_asxx_rld_bypass_s cn38xx;
struct cvmx_asxx_rld_bypass_s cn38xxp2;
struct cvmx_asxx_rld_bypass_s cn58xx;
struct cvmx_asxx_rld_bypass_s cn58xxp1;
};
union cvmx_asxx_rld_bypass_setting {
@@ -246,10 +216,6 @@ union cvmx_asxx_rld_bypass_setting {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_asxx_rld_bypass_setting_s cn38xx;
struct cvmx_asxx_rld_bypass_setting_s cn38xxp2;
struct cvmx_asxx_rld_bypass_setting_s cn58xx;
struct cvmx_asxx_rld_bypass_setting_s cn58xxp1;
};
union cvmx_asxx_rld_comp {
@@ -276,9 +242,6 @@ union cvmx_asxx_rld_comp {
uint64_t reserved_8_63:56;
#endif
} cn38xx;
struct cvmx_asxx_rld_comp_cn38xx cn38xxp2;
struct cvmx_asxx_rld_comp_s cn58xx;
struct cvmx_asxx_rld_comp_s cn58xxp1;
};
union cvmx_asxx_rld_data_drv {
@@ -294,10 +257,6 @@ union cvmx_asxx_rld_data_drv {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_asxx_rld_data_drv_s cn38xx;
struct cvmx_asxx_rld_data_drv_s cn38xxp2;
struct cvmx_asxx_rld_data_drv_s cn58xx;
struct cvmx_asxx_rld_data_drv_s cn58xxp1;
};
union cvmx_asxx_rld_fcram_mode {
@@ -311,8 +270,6 @@ union cvmx_asxx_rld_fcram_mode {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_asxx_rld_fcram_mode_s cn38xx;
struct cvmx_asxx_rld_fcram_mode_s cn38xxp2;
};
union cvmx_asxx_rld_nctl_strong {
@@ -326,10 +283,6 @@ union cvmx_asxx_rld_nctl_strong {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_asxx_rld_nctl_strong_s cn38xx;
struct cvmx_asxx_rld_nctl_strong_s cn38xxp2;
struct cvmx_asxx_rld_nctl_strong_s cn58xx;
struct cvmx_asxx_rld_nctl_strong_s cn58xxp1;
};
union cvmx_asxx_rld_nctl_weak {
@@ -343,10 +296,6 @@ union cvmx_asxx_rld_nctl_weak {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_asxx_rld_nctl_weak_s cn38xx;
struct cvmx_asxx_rld_nctl_weak_s cn38xxp2;
struct cvmx_asxx_rld_nctl_weak_s cn58xx;
struct cvmx_asxx_rld_nctl_weak_s cn58xxp1;
};
union cvmx_asxx_rld_pctl_strong {
@@ -360,10 +309,6 @@ union cvmx_asxx_rld_pctl_strong {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_asxx_rld_pctl_strong_s cn38xx;
struct cvmx_asxx_rld_pctl_strong_s cn38xxp2;
struct cvmx_asxx_rld_pctl_strong_s cn58xx;
struct cvmx_asxx_rld_pctl_strong_s cn58xxp1;
};
union cvmx_asxx_rld_pctl_weak {
@@ -377,10 +322,6 @@ union cvmx_asxx_rld_pctl_weak {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_asxx_rld_pctl_weak_s cn38xx;
struct cvmx_asxx_rld_pctl_weak_s cn38xxp2;
struct cvmx_asxx_rld_pctl_weak_s cn58xx;
struct cvmx_asxx_rld_pctl_weak_s cn58xxp1;
};
union cvmx_asxx_rld_setting {
@@ -411,9 +352,6 @@ union cvmx_asxx_rld_setting {
uint64_t reserved_5_63:59;
#endif
} cn38xx;
struct cvmx_asxx_rld_setting_cn38xx cn38xxp2;
struct cvmx_asxx_rld_setting_s cn58xx;
struct cvmx_asxx_rld_setting_s cn58xxp1;
};
union cvmx_asxx_rx_clk_setx {
@@ -427,13 +365,6 @@ union cvmx_asxx_rx_clk_setx {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_asxx_rx_clk_setx_s cn30xx;
struct cvmx_asxx_rx_clk_setx_s cn31xx;
struct cvmx_asxx_rx_clk_setx_s cn38xx;
struct cvmx_asxx_rx_clk_setx_s cn38xxp2;
struct cvmx_asxx_rx_clk_setx_s cn50xx;
struct cvmx_asxx_rx_clk_setx_s cn58xx;
struct cvmx_asxx_rx_clk_setx_s cn58xxp1;
};
union cvmx_asxx_rx_prt_en {
@@ -456,12 +387,6 @@ union cvmx_asxx_rx_prt_en {
uint64_t reserved_3_63:61;
#endif
} cn30xx;
struct cvmx_asxx_rx_prt_en_cn30xx cn31xx;
struct cvmx_asxx_rx_prt_en_s cn38xx;
struct cvmx_asxx_rx_prt_en_s cn38xxp2;
struct cvmx_asxx_rx_prt_en_cn30xx cn50xx;
struct cvmx_asxx_rx_prt_en_s cn58xx;
struct cvmx_asxx_rx_prt_en_s cn58xxp1;
};
union cvmx_asxx_rx_wol {
@@ -477,8 +402,6 @@ union cvmx_asxx_rx_wol {
uint64_t reserved_2_63:62;
#endif
} s;
struct cvmx_asxx_rx_wol_s cn38xx;
struct cvmx_asxx_rx_wol_s cn38xxp2;
};
union cvmx_asxx_rx_wol_msk {
@@ -490,8 +413,6 @@ union cvmx_asxx_rx_wol_msk {
uint64_t msk:64;
#endif
} s;
struct cvmx_asxx_rx_wol_msk_s cn38xx;
struct cvmx_asxx_rx_wol_msk_s cn38xxp2;
};
union cvmx_asxx_rx_wol_powok {
@@ -505,8 +426,6 @@ union cvmx_asxx_rx_wol_powok {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_asxx_rx_wol_powok_s cn38xx;
struct cvmx_asxx_rx_wol_powok_s cn38xxp2;
};
union cvmx_asxx_rx_wol_sig {
@@ -520,8 +439,6 @@ union cvmx_asxx_rx_wol_sig {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_asxx_rx_wol_sig_s cn38xx;
struct cvmx_asxx_rx_wol_sig_s cn38xxp2;
};
union cvmx_asxx_tx_clk_setx {
@@ -535,13 +452,6 @@ union cvmx_asxx_tx_clk_setx {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_asxx_tx_clk_setx_s cn30xx;
struct cvmx_asxx_tx_clk_setx_s cn31xx;
struct cvmx_asxx_tx_clk_setx_s cn38xx;
struct cvmx_asxx_tx_clk_setx_s cn38xxp2;
struct cvmx_asxx_tx_clk_setx_s cn50xx;
struct cvmx_asxx_tx_clk_setx_s cn58xx;
struct cvmx_asxx_tx_clk_setx_s cn58xxp1;
};
union cvmx_asxx_tx_comp_byp {
@@ -566,7 +476,6 @@ union cvmx_asxx_tx_comp_byp {
uint64_t reserved_9_63:55;
#endif
} cn30xx;
struct cvmx_asxx_tx_comp_byp_cn30xx cn31xx;
struct cvmx_asxx_tx_comp_byp_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_8_63:56;
@@ -578,7 +487,6 @@ union cvmx_asxx_tx_comp_byp {
uint64_t reserved_8_63:56;
#endif
} cn38xx;
struct cvmx_asxx_tx_comp_byp_cn38xx cn38xxp2;
struct cvmx_asxx_tx_comp_byp_cn50xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_17_63:47;
@@ -609,7 +517,6 @@ union cvmx_asxx_tx_comp_byp {
uint64_t reserved_13_63:51;
#endif
} cn58xx;
struct cvmx_asxx_tx_comp_byp_cn58xx cn58xxp1;
};
union cvmx_asxx_tx_hi_waterx {
@@ -632,12 +539,6 @@ union cvmx_asxx_tx_hi_waterx {
uint64_t reserved_3_63:61;
#endif
} cn30xx;
struct cvmx_asxx_tx_hi_waterx_cn30xx cn31xx;
struct cvmx_asxx_tx_hi_waterx_s cn38xx;
struct cvmx_asxx_tx_hi_waterx_s cn38xxp2;
struct cvmx_asxx_tx_hi_waterx_cn30xx cn50xx;
struct cvmx_asxx_tx_hi_waterx_s cn58xx;
struct cvmx_asxx_tx_hi_waterx_s cn58xxp1;
};
union cvmx_asxx_tx_prt_en {
@@ -660,12 +561,6 @@ union cvmx_asxx_tx_prt_en {
uint64_t reserved_3_63:61;
#endif
} cn30xx;
struct cvmx_asxx_tx_prt_en_cn30xx cn31xx;
struct cvmx_asxx_tx_prt_en_s cn38xx;
struct cvmx_asxx_tx_prt_en_s cn38xxp2;
struct cvmx_asxx_tx_prt_en_cn30xx cn50xx;
struct cvmx_asxx_tx_prt_en_s cn58xx;
struct cvmx_asxx_tx_prt_en_s cn58xxp1;
};
#endif

76
arch/mips/include/asm/octeon/cvmx-bootmem.h
View File

@@ -145,18 +145,6 @@ struct cvmx_bootmem_desc {
*/
extern int cvmx_bootmem_init(void *mem_desc_ptr);
/**
* Allocate a block of memory from the free list that was passed
* to the application by the bootloader.
* This is an allocate-only algorithm, so freeing memory is not possible.
*
* @size: Size in bytes of block to allocate
* @alignment: Alignment required - must be power of 2
*
* Returns pointer to block of memory, NULL on error
*/
extern void *cvmx_bootmem_alloc(uint64_t size, uint64_t alignment);
/**
* Allocate a block of memory from the free list that was
* passed to the application by the bootloader at a specific
@@ -173,22 +161,6 @@ extern void *cvmx_bootmem_alloc(uint64_t size, uint64_t alignment);
extern void *cvmx_bootmem_alloc_address(uint64_t size, uint64_t address,
uint64_t alignment);
/**
* Allocate a block of memory from the free list that was
* passed to the application by the bootloader within a specified
* address range. This is an allocate-only algorithm, so
* freeing memory is not possible. Allocation will fail if
* memory cannot be allocated in the requested range.
*
* @size: Size in bytes of block to allocate
* @min_addr: defines the minimum address of the range
* @max_addr: defines the maximum address of the range
* @alignment: Alignment required - must be power of 2
* Returns pointer to block of memory, NULL on error
*/
extern void *cvmx_bootmem_alloc_range(uint64_t size, uint64_t alignment,
uint64_t min_addr, uint64_t max_addr);
/**
* Frees a previously allocated named bootmem block.
*
@@ -214,27 +186,6 @@ extern void *cvmx_bootmem_alloc_range(uint64_t size, uint64_t alignment,
extern void *cvmx_bootmem_alloc_named(uint64_t size, uint64_t alignment,
char *name);
/**
* Allocate a block of memory from the free list that was passed
* to the application by the bootloader, and assign it a name in the
* global named block table. (part of the cvmx_bootmem_descriptor_t structure)
* Named blocks can later be freed.
*
* @size: Size in bytes of block to allocate
* @address: Physical address to allocate memory at. If this
* memory is not available, the allocation fails.
* @name: name of block - must be less than CVMX_BOOTMEM_NAME_LEN
* bytes
*
* Returns a pointer to block of memory, NULL on error
*/
extern void *cvmx_bootmem_alloc_named_address(uint64_t size, uint64_t address,
char *name);
/**
* Allocate a block of memory from a specific range of the free list
* that was passed to the application by the bootloader, and assign it
@@ -350,33 +301,6 @@ int64_t cvmx_bootmem_phy_named_block_alloc(uint64_t size, uint64_t min_addr,
uint64_t alignment,
char *name, uint32_t flags);
/**
* Finds a named memory block by name.
* Also used for finding an unused entry in the named block table.
*
* @name: Name of memory block to find. If NULL pointer given, then
* finds unused descriptor, if available.
*
* @flags: Flags to control options for the allocation.
*
* Returns Pointer to memory block descriptor, NULL if not found.
* If NULL returned when name parameter is NULL, then no memory
* block descriptors are available.
*/
struct cvmx_bootmem_named_block_desc *
cvmx_bootmem_phy_named_block_find(char *name, uint32_t flags);
/**
* Frees a named block.
*
* @name: name of block to free
* @flags: flags for passing options
*
* Returns 0 on failure
* 1 on success
*/
int cvmx_bootmem_phy_named_block_free(char *name, uint32_t flags);
/**
* Frees a block to the bootmem allocator list. This must
* be used with care, as the size provided must match the size

7060
arch/mips/include/asm/octeon/cvmx-ciu2-defs.h
View File

File diff suppressed because it is too large Load Diff

4
arch/mips/include/asm/octeon/cvmx-dbg-defs.h
View File

@@ -62,7 +62,6 @@ union cvmx_dbg_data {
uint64_t reserved_31_63:33;
#endif
} cn30xx;
struct cvmx_dbg_data_cn30xx cn31xx;
struct cvmx_dbg_data_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_29_63:35;
@@ -82,8 +81,6 @@ union cvmx_dbg_data {
uint64_t reserved_29_63:35;
#endif
} cn38xx;
struct cvmx_dbg_data_cn38xx cn38xxp2;
struct cvmx_dbg_data_cn30xx cn50xx;
struct cvmx_dbg_data_cn58xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_29_63:35;
@@ -99,7 +96,6 @@ union cvmx_dbg_data {
uint64_t reserved_29_63:35;
#endif
} cn58xx;
struct cvmx_dbg_data_cn58xx cn58xxp1;
};
#endif

178
arch/mips/include/asm/octeon/cvmx-dpi-defs.h
View File

@@ -89,7 +89,6 @@ union cvmx_dpi_bist_status {
uint64_t reserved_47_63:17;
#endif
} s;
struct cvmx_dpi_bist_status_s cn61xx;
struct cvmx_dpi_bist_status_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_45_63:19;
@@ -108,10 +107,6 @@ union cvmx_dpi_bist_status {
uint64_t reserved_37_63:27;
#endif
} cn63xxp1;
struct cvmx_dpi_bist_status_s cn66xx;
struct cvmx_dpi_bist_status_cn63xx cn68xx;
struct cvmx_dpi_bist_status_cn63xx cn68xxp1;
struct cvmx_dpi_bist_status_s cnf71xx;
};
union cvmx_dpi_ctl {
@@ -136,12 +131,6 @@ union cvmx_dpi_ctl {
uint64_t reserved_1_63:63;
#endif
} cn61xx;
struct cvmx_dpi_ctl_s cn63xx;
struct cvmx_dpi_ctl_s cn63xxp1;
struct cvmx_dpi_ctl_s cn66xx;
struct cvmx_dpi_ctl_s cn68xx;
struct cvmx_dpi_ctl_s cn68xxp1;
struct cvmx_dpi_ctl_cn61xx cnf71xx;
};
union cvmx_dpi_dmax_counts {
@@ -157,13 +146,6 @@ union cvmx_dpi_dmax_counts {
uint64_t reserved_39_63:25;
#endif
} s;
struct cvmx_dpi_dmax_counts_s cn61xx;
struct cvmx_dpi_dmax_counts_s cn63xx;
struct cvmx_dpi_dmax_counts_s cn63xxp1;
struct cvmx_dpi_dmax_counts_s cn66xx;
struct cvmx_dpi_dmax_counts_s cn68xx;
struct cvmx_dpi_dmax_counts_s cn68xxp1;
struct cvmx_dpi_dmax_counts_s cnf71xx;
};
union cvmx_dpi_dmax_dbell {
@@ -177,13 +159,6 @@ union cvmx_dpi_dmax_dbell {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_dpi_dmax_dbell_s cn61xx;
struct cvmx_dpi_dmax_dbell_s cn63xx;
struct cvmx_dpi_dmax_dbell_s cn63xxp1;
struct cvmx_dpi_dmax_dbell_s cn66xx;
struct cvmx_dpi_dmax_dbell_s cn68xx;
struct cvmx_dpi_dmax_dbell_s cn68xxp1;
struct cvmx_dpi_dmax_dbell_s cnf71xx;
};
union cvmx_dpi_dmax_err_rsp_status {
@@ -197,11 +172,6 @@ union cvmx_dpi_dmax_err_rsp_status {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_dpi_dmax_err_rsp_status_s cn61xx;
struct cvmx_dpi_dmax_err_rsp_status_s cn66xx;
struct cvmx_dpi_dmax_err_rsp_status_s cn68xx;
struct cvmx_dpi_dmax_err_rsp_status_s cn68xxp1;
struct cvmx_dpi_dmax_err_rsp_status_s cnf71xx;
};
union cvmx_dpi_dmax_ibuff_saddr {
@@ -242,12 +212,6 @@ union cvmx_dpi_dmax_ibuff_saddr {
uint64_t reserved_62_63:2;
#endif
} cn61xx;
struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn63xx;
struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn63xxp1;
struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn66xx;
struct cvmx_dpi_dmax_ibuff_saddr_s cn68xx;
struct cvmx_dpi_dmax_ibuff_saddr_s cn68xxp1;
struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cnf71xx;
};
union cvmx_dpi_dmax_iflight {
@@ -261,11 +225,6 @@ union cvmx_dpi_dmax_iflight {
uint64_t reserved_3_63:61;
#endif
} s;
struct cvmx_dpi_dmax_iflight_s cn61xx;
struct cvmx_dpi_dmax_iflight_s cn66xx;
struct cvmx_dpi_dmax_iflight_s cn68xx;
struct cvmx_dpi_dmax_iflight_s cn68xxp1;
struct cvmx_dpi_dmax_iflight_s cnf71xx;
};
union cvmx_dpi_dmax_naddr {
@@ -288,12 +247,6 @@ union cvmx_dpi_dmax_naddr {
uint64_t reserved_36_63:28;
#endif
} cn61xx;
struct cvmx_dpi_dmax_naddr_cn61xx cn63xx;
struct cvmx_dpi_dmax_naddr_cn61xx cn63xxp1;
struct cvmx_dpi_dmax_naddr_cn61xx cn66xx;
struct cvmx_dpi_dmax_naddr_s cn68xx;
struct cvmx_dpi_dmax_naddr_s cn68xxp1;
struct cvmx_dpi_dmax_naddr_cn61xx cnf71xx;
};
union cvmx_dpi_dmax_reqbnk0 {
@@ -305,13 +258,6 @@ union cvmx_dpi_dmax_reqbnk0 {
uint64_t state:64;
#endif
} s;
struct cvmx_dpi_dmax_reqbnk0_s cn61xx;
struct cvmx_dpi_dmax_reqbnk0_s cn63xx;
struct cvmx_dpi_dmax_reqbnk0_s cn63xxp1;
struct cvmx_dpi_dmax_reqbnk0_s cn66xx;
struct cvmx_dpi_dmax_reqbnk0_s cn68xx;
struct cvmx_dpi_dmax_reqbnk0_s cn68xxp1;
struct cvmx_dpi_dmax_reqbnk0_s cnf71xx;
};
union cvmx_dpi_dmax_reqbnk1 {
@@ -323,13 +269,6 @@ union cvmx_dpi_dmax_reqbnk1 {
uint64_t state:64;
#endif
} s;
struct cvmx_dpi_dmax_reqbnk1_s cn61xx;
struct cvmx_dpi_dmax_reqbnk1_s cn63xx;
struct cvmx_dpi_dmax_reqbnk1_s cn63xxp1;
struct cvmx_dpi_dmax_reqbnk1_s cn66xx;
struct cvmx_dpi_dmax_reqbnk1_s cn68xx;
struct cvmx_dpi_dmax_reqbnk1_s cn68xxp1;
struct cvmx_dpi_dmax_reqbnk1_s cnf71xx;
};
union cvmx_dpi_dma_control {
@@ -379,7 +318,6 @@ union cvmx_dpi_dma_control {
uint64_t reserved_62_63:2;
#endif
} s;
struct cvmx_dpi_dma_control_s cn61xx;
struct cvmx_dpi_dma_control_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_61_63:3;
@@ -462,10 +400,6 @@ union cvmx_dpi_dma_control {
uint64_t reserved_59_63:5;
#endif
} cn63xxp1;
struct cvmx_dpi_dma_control_cn63xx cn66xx;
struct cvmx_dpi_dma_control_s cn68xx;
struct cvmx_dpi_dma_control_cn63xx cn68xxp1;
struct cvmx_dpi_dma_control_s cnf71xx;
};
union cvmx_dpi_dma_engx_en {
@@ -479,13 +413,6 @@ union cvmx_dpi_dma_engx_en {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_dpi_dma_engx_en_s cn61xx;
struct cvmx_dpi_dma_engx_en_s cn63xx;
struct cvmx_dpi_dma_engx_en_s cn63xxp1;
struct cvmx_dpi_dma_engx_en_s cn66xx;
struct cvmx_dpi_dma_engx_en_s cn68xx;
struct cvmx_dpi_dma_engx_en_s cn68xxp1;
struct cvmx_dpi_dma_engx_en_s cnf71xx;
};
union cvmx_dpi_dma_ppx_cnt {
@@ -499,9 +426,6 @@ union cvmx_dpi_dma_ppx_cnt {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_dpi_dma_ppx_cnt_s cn61xx;
struct cvmx_dpi_dma_ppx_cnt_s cn68xx;
struct cvmx_dpi_dma_ppx_cnt_s cnf71xx;
};
union cvmx_dpi_engx_buf {
@@ -521,7 +445,6 @@ union cvmx_dpi_engx_buf {
uint64_t reserved_37_63:27;
#endif
} s;
struct cvmx_dpi_engx_buf_s cn61xx;
struct cvmx_dpi_engx_buf_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_8_63:56;
@@ -533,11 +456,6 @@ union cvmx_dpi_engx_buf {
uint64_t reserved_8_63:56;
#endif
} cn63xx;
struct cvmx_dpi_engx_buf_cn63xx cn63xxp1;
struct cvmx_dpi_engx_buf_s cn66xx;
struct cvmx_dpi_engx_buf_s cn68xx;
struct cvmx_dpi_engx_buf_s cn68xxp1;
struct cvmx_dpi_engx_buf_s cnf71xx;
};
union cvmx_dpi_info_reg {
@@ -557,8 +475,6 @@ union cvmx_dpi_info_reg {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_dpi_info_reg_s cn61xx;
struct cvmx_dpi_info_reg_s cn63xx;
struct cvmx_dpi_info_reg_cn63xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_2_63:62;
@@ -570,10 +486,6 @@ union cvmx_dpi_info_reg {
uint64_t reserved_2_63:62;
#endif
} cn63xxp1;
struct cvmx_dpi_info_reg_s cn66xx;
struct cvmx_dpi_info_reg_s cn68xx;
struct cvmx_dpi_info_reg_s cn68xxp1;
struct cvmx_dpi_info_reg_s cnf71xx;
};
union cvmx_dpi_int_en {
@@ -617,7 +529,6 @@ union cvmx_dpi_int_en {
uint64_t reserved_28_63:36;
#endif
} s;
struct cvmx_dpi_int_en_s cn61xx;
struct cvmx_dpi_int_en_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_26_63:38;
@@ -653,11 +564,6 @@ union cvmx_dpi_int_en {
uint64_t reserved_26_63:38;
#endif
} cn63xx;
struct cvmx_dpi_int_en_cn63xx cn63xxp1;
struct cvmx_dpi_int_en_s cn66xx;
struct cvmx_dpi_int_en_cn63xx cn68xx;
struct cvmx_dpi_int_en_cn63xx cn68xxp1;
struct cvmx_dpi_int_en_s cnf71xx;
};
union cvmx_dpi_int_reg {
@@ -701,7 +607,6 @@ union cvmx_dpi_int_reg {
uint64_t reserved_28_63:36;
#endif
} s;
struct cvmx_dpi_int_reg_s cn61xx;
struct cvmx_dpi_int_reg_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_26_63:38;
@@ -737,11 +642,6 @@ union cvmx_dpi_int_reg {
uint64_t reserved_26_63:38;
#endif
} cn63xx;
struct cvmx_dpi_int_reg_cn63xx cn63xxp1;
struct cvmx_dpi_int_reg_s cn66xx;
struct cvmx_dpi_int_reg_cn63xx cn68xx;
struct cvmx_dpi_int_reg_cn63xx cn68xxp1;
struct cvmx_dpi_int_reg_s cnf71xx;
};
union cvmx_dpi_ncbx_cfg {
@@ -755,10 +655,6 @@ union cvmx_dpi_ncbx_cfg {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_dpi_ncbx_cfg_s cn61xx;
struct cvmx_dpi_ncbx_cfg_s cn66xx;
struct cvmx_dpi_ncbx_cfg_s cn68xx;
struct cvmx_dpi_ncbx_cfg_s cnf71xx;
};
union cvmx_dpi_pint_info {
@@ -776,13 +672,6 @@ union cvmx_dpi_pint_info {
uint64_t reserved_14_63:50;
#endif
} s;
struct cvmx_dpi_pint_info_s cn61xx;
struct cvmx_dpi_pint_info_s cn63xx;
struct cvmx_dpi_pint_info_s cn63xxp1;
struct cvmx_dpi_pint_info_s cn66xx;
struct cvmx_dpi_pint_info_s cn68xx;
struct cvmx_dpi_pint_info_s cn68xxp1;
struct cvmx_dpi_pint_info_s cnf71xx;
};
union cvmx_dpi_pkt_err_rsp {
@@ -796,13 +685,6 @@ union cvmx_dpi_pkt_err_rsp {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_dpi_pkt_err_rsp_s cn61xx;
struct cvmx_dpi_pkt_err_rsp_s cn63xx;
struct cvmx_dpi_pkt_err_rsp_s cn63xxp1;
struct cvmx_dpi_pkt_err_rsp_s cn66xx;
struct cvmx_dpi_pkt_err_rsp_s cn68xx;
struct cvmx_dpi_pkt_err_rsp_s cn68xxp1;
struct cvmx_dpi_pkt_err_rsp_s cnf71xx;
};
union cvmx_dpi_req_err_rsp {
@@ -816,13 +698,6 @@ union cvmx_dpi_req_err_rsp {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_dpi_req_err_rsp_s cn61xx;
struct cvmx_dpi_req_err_rsp_s cn63xx;
struct cvmx_dpi_req_err_rsp_s cn63xxp1;
struct cvmx_dpi_req_err_rsp_s cn66xx;
struct cvmx_dpi_req_err_rsp_s cn68xx;
struct cvmx_dpi_req_err_rsp_s cn68xxp1;
struct cvmx_dpi_req_err_rsp_s cnf71xx;
};
union cvmx_dpi_req_err_rsp_en {
@@ -836,13 +711,6 @@ union cvmx_dpi_req_err_rsp_en {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_dpi_req_err_rsp_en_s cn61xx;
struct cvmx_dpi_req_err_rsp_en_s cn63xx;
struct cvmx_dpi_req_err_rsp_en_s cn63xxp1;
struct cvmx_dpi_req_err_rsp_en_s cn66xx;
struct cvmx_dpi_req_err_rsp_en_s cn68xx;
struct cvmx_dpi_req_err_rsp_en_s cn68xxp1;
struct cvmx_dpi_req_err_rsp_en_s cnf71xx;
};
union cvmx_dpi_req_err_rst {
@@ -856,13 +724,6 @@ union cvmx_dpi_req_err_rst {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_dpi_req_err_rst_s cn61xx;
struct cvmx_dpi_req_err_rst_s cn63xx;
struct cvmx_dpi_req_err_rst_s cn63xxp1;
struct cvmx_dpi_req_err_rst_s cn66xx;
struct cvmx_dpi_req_err_rst_s cn68xx;
struct cvmx_dpi_req_err_rst_s cn68xxp1;
struct cvmx_dpi_req_err_rst_s cnf71xx;
};
union cvmx_dpi_req_err_rst_en {
@@ -876,13 +737,6 @@ union cvmx_dpi_req_err_rst_en {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_dpi_req_err_rst_en_s cn61xx;
struct cvmx_dpi_req_err_rst_en_s cn63xx;
struct cvmx_dpi_req_err_rst_en_s cn63xxp1;
struct cvmx_dpi_req_err_rst_en_s cn66xx;
struct cvmx_dpi_req_err_rst_en_s cn68xx;
struct cvmx_dpi_req_err_rst_en_s cn68xxp1;
struct cvmx_dpi_req_err_rst_en_s cnf71xx;
};
union cvmx_dpi_req_err_skip_comp {
@@ -900,11 +754,6 @@ union cvmx_dpi_req_err_skip_comp {
uint64_t reserved_24_63:40;
#endif
} s;
struct cvmx_dpi_req_err_skip_comp_s cn61xx;
struct cvmx_dpi_req_err_skip_comp_s cn66xx;
struct cvmx_dpi_req_err_skip_comp_s cn68xx;
struct cvmx_dpi_req_err_skip_comp_s cn68xxp1;
struct cvmx_dpi_req_err_skip_comp_s cnf71xx;
};
union cvmx_dpi_req_gbl_en {
@@ -918,13 +767,6 @@ union cvmx_dpi_req_gbl_en {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_dpi_req_gbl_en_s cn61xx;
struct cvmx_dpi_req_gbl_en_s cn63xx;
struct cvmx_dpi_req_gbl_en_s cn63xxp1;
struct cvmx_dpi_req_gbl_en_s cn66xx;
struct cvmx_dpi_req_gbl_en_s cn68xx;
struct cvmx_dpi_req_gbl_en_s cn68xxp1;
struct cvmx_dpi_req_gbl_en_s cnf71xx;
};
union cvmx_dpi_sli_prtx_cfg {
@@ -960,7 +802,6 @@ union cvmx_dpi_sli_prtx_cfg {
uint64_t reserved_25_63:39;
#endif
} s;
struct cvmx_dpi_sli_prtx_cfg_s cn61xx;
struct cvmx_dpi_sli_prtx_cfg_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_25_63:39;
@@ -994,11 +835,6 @@ union cvmx_dpi_sli_prtx_cfg {
uint64_t reserved_25_63:39;
#endif
} cn63xx;
struct cvmx_dpi_sli_prtx_cfg_cn63xx cn63xxp1;
struct cvmx_dpi_sli_prtx_cfg_s cn66xx;
struct cvmx_dpi_sli_prtx_cfg_cn63xx cn68xx;
struct cvmx_dpi_sli_prtx_cfg_cn63xx cn68xxp1;
struct cvmx_dpi_sli_prtx_cfg_s cnf71xx;
};
union cvmx_dpi_sli_prtx_err {
@@ -1012,13 +848,6 @@ union cvmx_dpi_sli_prtx_err {
uint64_t addr:61;
#endif
} s;
struct cvmx_dpi_sli_prtx_err_s cn61xx;
struct cvmx_dpi_sli_prtx_err_s cn63xx;
struct cvmx_dpi_sli_prtx_err_s cn63xxp1;
struct cvmx_dpi_sli_prtx_err_s cn66xx;
struct cvmx_dpi_sli_prtx_err_s cn68xx;
struct cvmx_dpi_sli_prtx_err_s cn68xxp1;
struct cvmx_dpi_sli_prtx_err_s cnf71xx;
};
union cvmx_dpi_sli_prtx_err_info {
@@ -1040,13 +869,6 @@ union cvmx_dpi_sli_prtx_err_info {
uint64_t reserved_9_63:55;
#endif
} s;
struct cvmx_dpi_sli_prtx_err_info_s cn61xx;
struct cvmx_dpi_sli_prtx_err_info_s cn63xx;
struct cvmx_dpi_sli_prtx_err_info_s cn63xxp1;
struct cvmx_dpi_sli_prtx_err_info_s cn66xx;
struct cvmx_dpi_sli_prtx_err_info_s cn68xx;
struct cvmx_dpi_sli_prtx_err_info_s cn68xxp1;
struct cvmx_dpi_sli_prtx_err_info_s cnf71xx;
};
#endif

247
arch/mips/include/asm/octeon/cvmx-fpa-defs.h
View File

@@ -81,11 +81,6 @@ union cvmx_fpa_addr_range_error {
uint64_t reserved_38_63:26;
#endif
} s;
struct cvmx_fpa_addr_range_error_s cn61xx;
struct cvmx_fpa_addr_range_error_s cn66xx;
struct cvmx_fpa_addr_range_error_s cn68xx;
struct cvmx_fpa_addr_range_error_s cn68xxp1;
struct cvmx_fpa_addr_range_error_s cnf71xx;
};
union cvmx_fpa_bist_status {
@@ -107,24 +102,6 @@ union cvmx_fpa_bist_status {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_fpa_bist_status_s cn30xx;
struct cvmx_fpa_bist_status_s cn31xx;
struct cvmx_fpa_bist_status_s cn38xx;
struct cvmx_fpa_bist_status_s cn38xxp2;
struct cvmx_fpa_bist_status_s cn50xx;
struct cvmx_fpa_bist_status_s cn52xx;
struct cvmx_fpa_bist_status_s cn52xxp1;
struct cvmx_fpa_bist_status_s cn56xx;
struct cvmx_fpa_bist_status_s cn56xxp1;
struct cvmx_fpa_bist_status_s cn58xx;
struct cvmx_fpa_bist_status_s cn58xxp1;
struct cvmx_fpa_bist_status_s cn61xx;
struct cvmx_fpa_bist_status_s cn63xx;
struct cvmx_fpa_bist_status_s cn63xxp1;
struct cvmx_fpa_bist_status_s cn66xx;
struct cvmx_fpa_bist_status_s cn68xx;
struct cvmx_fpa_bist_status_s cn68xxp1;
struct cvmx_fpa_bist_status_s cnf71xx;
};
union cvmx_fpa_ctl_status {
@@ -173,23 +150,6 @@ union cvmx_fpa_ctl_status {
uint64_t reserved_18_63:46;
#endif
} cn30xx;
struct cvmx_fpa_ctl_status_cn30xx cn31xx;
struct cvmx_fpa_ctl_status_cn30xx cn38xx;
struct cvmx_fpa_ctl_status_cn30xx cn38xxp2;
struct cvmx_fpa_ctl_status_cn30xx cn50xx;
struct cvmx_fpa_ctl_status_cn30xx cn52xx;
struct cvmx_fpa_ctl_status_cn30xx cn52xxp1;
struct cvmx_fpa_ctl_status_cn30xx cn56xx;
struct cvmx_fpa_ctl_status_cn30xx cn56xxp1;
struct cvmx_fpa_ctl_status_cn30xx cn58xx;
struct cvmx_fpa_ctl_status_cn30xx cn58xxp1;
struct cvmx_fpa_ctl_status_s cn61xx;
struct cvmx_fpa_ctl_status_s cn63xx;
struct cvmx_fpa_ctl_status_cn30xx cn63xxp1;
struct cvmx_fpa_ctl_status_s cn66xx;
struct cvmx_fpa_ctl_status_s cn68xx;
struct cvmx_fpa_ctl_status_s cn68xxp1;
struct cvmx_fpa_ctl_status_s cnf71xx;
};
union cvmx_fpa_fpfx_marks {
@@ -205,19 +165,6 @@ union cvmx_fpa_fpfx_marks {
uint64_t reserved_22_63:42;
#endif
} s;
struct cvmx_fpa_fpfx_marks_s cn38xx;
struct cvmx_fpa_fpfx_marks_s cn38xxp2;
struct cvmx_fpa_fpfx_marks_s cn56xx;
struct cvmx_fpa_fpfx_marks_s cn56xxp1;
struct cvmx_fpa_fpfx_marks_s cn58xx;
struct cvmx_fpa_fpfx_marks_s cn58xxp1;
struct cvmx_fpa_fpfx_marks_s cn61xx;
struct cvmx_fpa_fpfx_marks_s cn63xx;
struct cvmx_fpa_fpfx_marks_s cn63xxp1;
struct cvmx_fpa_fpfx_marks_s cn66xx;
struct cvmx_fpa_fpfx_marks_s cn68xx;
struct cvmx_fpa_fpfx_marks_s cn68xxp1;
struct cvmx_fpa_fpfx_marks_s cnf71xx;
};
union cvmx_fpa_fpfx_size {
@@ -231,19 +178,6 @@ union cvmx_fpa_fpfx_size {
uint64_t reserved_11_63:53;
#endif
} s;
struct cvmx_fpa_fpfx_size_s cn38xx;
struct cvmx_fpa_fpfx_size_s cn38xxp2;
struct cvmx_fpa_fpfx_size_s cn56xx;
struct cvmx_fpa_fpfx_size_s cn56xxp1;
struct cvmx_fpa_fpfx_size_s cn58xx;
struct cvmx_fpa_fpfx_size_s cn58xxp1;
struct cvmx_fpa_fpfx_size_s cn61xx;
struct cvmx_fpa_fpfx_size_s cn63xx;
struct cvmx_fpa_fpfx_size_s cn63xxp1;
struct cvmx_fpa_fpfx_size_s cn66xx;
struct cvmx_fpa_fpfx_size_s cn68xx;
struct cvmx_fpa_fpfx_size_s cn68xxp1;
struct cvmx_fpa_fpfx_size_s cnf71xx;
};
union cvmx_fpa_fpf0_marks {
@@ -259,19 +193,6 @@ union cvmx_fpa_fpf0_marks {
uint64_t reserved_24_63:40;
#endif
} s;
struct cvmx_fpa_fpf0_marks_s cn38xx;
struct cvmx_fpa_fpf0_marks_s cn38xxp2;
struct cvmx_fpa_fpf0_marks_s cn56xx;
struct cvmx_fpa_fpf0_marks_s cn56xxp1;
struct cvmx_fpa_fpf0_marks_s cn58xx;
struct cvmx_fpa_fpf0_marks_s cn58xxp1;
struct cvmx_fpa_fpf0_marks_s cn61xx;
struct cvmx_fpa_fpf0_marks_s cn63xx;
struct cvmx_fpa_fpf0_marks_s cn63xxp1;
struct cvmx_fpa_fpf0_marks_s cn66xx;
struct cvmx_fpa_fpf0_marks_s cn68xx;
struct cvmx_fpa_fpf0_marks_s cn68xxp1;
struct cvmx_fpa_fpf0_marks_s cnf71xx;
};
union cvmx_fpa_fpf0_size {
@@ -285,19 +206,6 @@ union cvmx_fpa_fpf0_size {
uint64_t reserved_12_63:52;
#endif
} s;
struct cvmx_fpa_fpf0_size_s cn38xx;
struct cvmx_fpa_fpf0_size_s cn38xxp2;
struct cvmx_fpa_fpf0_size_s cn56xx;
struct cvmx_fpa_fpf0_size_s cn56xxp1;
struct cvmx_fpa_fpf0_size_s cn58xx;
struct cvmx_fpa_fpf0_size_s cn58xxp1;
struct cvmx_fpa_fpf0_size_s cn61xx;
struct cvmx_fpa_fpf0_size_s cn63xx;
struct cvmx_fpa_fpf0_size_s cn63xxp1;
struct cvmx_fpa_fpf0_size_s cn66xx;
struct cvmx_fpa_fpf0_size_s cn68xx;
struct cvmx_fpa_fpf0_size_s cn68xxp1;
struct cvmx_fpa_fpf0_size_s cnf71xx;
};
union cvmx_fpa_fpf8_marks {
@@ -313,8 +221,6 @@ union cvmx_fpa_fpf8_marks {
uint64_t reserved_22_63:42;
#endif
} s;
struct cvmx_fpa_fpf8_marks_s cn68xx;
struct cvmx_fpa_fpf8_marks_s cn68xxp1;
};
union cvmx_fpa_fpf8_size {
@@ -328,8 +234,6 @@ union cvmx_fpa_fpf8_size {
uint64_t reserved_12_63:52;
#endif
} s;
struct cvmx_fpa_fpf8_size_s cn68xx;
struct cvmx_fpa_fpf8_size_s cn68xxp1;
};
union cvmx_fpa_int_enb {
@@ -496,16 +400,6 @@ union cvmx_fpa_int_enb {
uint64_t reserved_28_63:36;
#endif
} cn30xx;
struct cvmx_fpa_int_enb_cn30xx cn31xx;
struct cvmx_fpa_int_enb_cn30xx cn38xx;
struct cvmx_fpa_int_enb_cn30xx cn38xxp2;
struct cvmx_fpa_int_enb_cn30xx cn50xx;
struct cvmx_fpa_int_enb_cn30xx cn52xx;
struct cvmx_fpa_int_enb_cn30xx cn52xxp1;
struct cvmx_fpa_int_enb_cn30xx cn56xx;
struct cvmx_fpa_int_enb_cn30xx cn56xxp1;
struct cvmx_fpa_int_enb_cn30xx cn58xx;
struct cvmx_fpa_int_enb_cn30xx cn58xxp1;
struct cvmx_fpa_int_enb_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_50_63:14;
@@ -700,8 +594,6 @@ union cvmx_fpa_int_enb {
uint64_t reserved_44_63:20;
#endif
} cn63xx;
struct cvmx_fpa_int_enb_cn30xx cn63xxp1;
struct cvmx_fpa_int_enb_cn61xx cn66xx;
struct cvmx_fpa_int_enb_cn68xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_50_63:14;
@@ -809,8 +701,6 @@ union cvmx_fpa_int_enb {
uint64_t reserved_50_63:14;
#endif
} cn68xx;
struct cvmx_fpa_int_enb_cn68xx cn68xxp1;
struct cvmx_fpa_int_enb_cn61xx cnf71xx;
};
union cvmx_fpa_int_sum {
@@ -985,16 +875,6 @@ union cvmx_fpa_int_sum {
uint64_t reserved_28_63:36;
#endif
} cn30xx;
struct cvmx_fpa_int_sum_cn30xx cn31xx;
struct cvmx_fpa_int_sum_cn30xx cn38xx;
struct cvmx_fpa_int_sum_cn30xx cn38xxp2;
struct cvmx_fpa_int_sum_cn30xx cn50xx;
struct cvmx_fpa_int_sum_cn30xx cn52xx;
struct cvmx_fpa_int_sum_cn30xx cn52xxp1;
struct cvmx_fpa_int_sum_cn30xx cn56xx;
struct cvmx_fpa_int_sum_cn30xx cn56xxp1;
struct cvmx_fpa_int_sum_cn30xx cn58xx;
struct cvmx_fpa_int_sum_cn30xx cn58xxp1;
struct cvmx_fpa_int_sum_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_50_63:14;
@@ -1189,11 +1069,6 @@ union cvmx_fpa_int_sum {
uint64_t reserved_44_63:20;
#endif
} cn63xx;
struct cvmx_fpa_int_sum_cn30xx cn63xxp1;
struct cvmx_fpa_int_sum_cn61xx cn66xx;
struct cvmx_fpa_int_sum_s cn68xx;
struct cvmx_fpa_int_sum_s cn68xxp1;
struct cvmx_fpa_int_sum_cn61xx cnf71xx;
};
union cvmx_fpa_packet_threshold {
@@ -1207,12 +1082,6 @@ union cvmx_fpa_packet_threshold {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_fpa_packet_threshold_s cn61xx;
struct cvmx_fpa_packet_threshold_s cn63xx;
struct cvmx_fpa_packet_threshold_s cn66xx;
struct cvmx_fpa_packet_threshold_s cn68xx;
struct cvmx_fpa_packet_threshold_s cn68xxp1;
struct cvmx_fpa_packet_threshold_s cnf71xx;
};
union cvmx_fpa_poolx_end_addr {
@@ -1226,11 +1095,6 @@ union cvmx_fpa_poolx_end_addr {
uint64_t reserved_33_63:31;
#endif
} s;
struct cvmx_fpa_poolx_end_addr_s cn61xx;
struct cvmx_fpa_poolx_end_addr_s cn66xx;
struct cvmx_fpa_poolx_end_addr_s cn68xx;
struct cvmx_fpa_poolx_end_addr_s cn68xxp1;
struct cvmx_fpa_poolx_end_addr_s cnf71xx;
};
union cvmx_fpa_poolx_start_addr {
@@ -1244,11 +1108,6 @@ union cvmx_fpa_poolx_start_addr {
uint64_t reserved_33_63:31;
#endif
} s;
struct cvmx_fpa_poolx_start_addr_s cn61xx;
struct cvmx_fpa_poolx_start_addr_s cn66xx;
struct cvmx_fpa_poolx_start_addr_s cn68xx;
struct cvmx_fpa_poolx_start_addr_s cn68xxp1;
struct cvmx_fpa_poolx_start_addr_s cnf71xx;
};
union cvmx_fpa_poolx_threshold {
@@ -1271,11 +1130,6 @@ union cvmx_fpa_poolx_threshold {
uint64_t reserved_29_63:35;
#endif
} cn61xx;
struct cvmx_fpa_poolx_threshold_cn61xx cn63xx;
struct cvmx_fpa_poolx_threshold_cn61xx cn66xx;
struct cvmx_fpa_poolx_threshold_s cn68xx;
struct cvmx_fpa_poolx_threshold_s cn68xxp1;
struct cvmx_fpa_poolx_threshold_cn61xx cnf71xx;
};
union cvmx_fpa_quex_available {
@@ -1298,23 +1152,6 @@ union cvmx_fpa_quex_available {
uint64_t reserved_29_63:35;
#endif
} cn30xx;
struct cvmx_fpa_quex_available_cn30xx cn31xx;
struct cvmx_fpa_quex_available_cn30xx cn38xx;
struct cvmx_fpa_quex_available_cn30xx cn38xxp2;
struct cvmx_fpa_quex_available_cn30xx cn50xx;
struct cvmx_fpa_quex_available_cn30xx cn52xx;
struct cvmx_fpa_quex_available_cn30xx cn52xxp1;
struct cvmx_fpa_quex_available_cn30xx cn56xx;
struct cvmx_fpa_quex_available_cn30xx cn56xxp1;
struct cvmx_fpa_quex_available_cn30xx cn58xx;
struct cvmx_fpa_quex_available_cn30xx cn58xxp1;
struct cvmx_fpa_quex_available_cn30xx cn61xx;
struct cvmx_fpa_quex_available_cn30xx cn63xx;
struct cvmx_fpa_quex_available_cn30xx cn63xxp1;
struct cvmx_fpa_quex_available_cn30xx cn66xx;
struct cvmx_fpa_quex_available_s cn68xx;
struct cvmx_fpa_quex_available_s cn68xxp1;
struct cvmx_fpa_quex_available_cn30xx cnf71xx;
};
union cvmx_fpa_quex_page_index {
@@ -1328,24 +1165,6 @@ union cvmx_fpa_quex_page_index {
uint64_t reserved_25_63:39;
#endif
} s;
struct cvmx_fpa_quex_page_index_s cn30xx;
struct cvmx_fpa_quex_page_index_s cn31xx;
struct cvmx_fpa_quex_page_index_s cn38xx;
struct cvmx_fpa_quex_page_index_s cn38xxp2;
struct cvmx_fpa_quex_page_index_s cn50xx;
struct cvmx_fpa_quex_page_index_s cn52xx;
struct cvmx_fpa_quex_page_index_s cn52xxp1;
struct cvmx_fpa_quex_page_index_s cn56xx;
struct cvmx_fpa_quex_page_index_s cn56xxp1;
struct cvmx_fpa_quex_page_index_s cn58xx;
struct cvmx_fpa_quex_page_index_s cn58xxp1;
struct cvmx_fpa_quex_page_index_s cn61xx;
struct cvmx_fpa_quex_page_index_s cn63xx;
struct cvmx_fpa_quex_page_index_s cn63xxp1;
struct cvmx_fpa_quex_page_index_s cn66xx;
struct cvmx_fpa_quex_page_index_s cn68xx;
struct cvmx_fpa_quex_page_index_s cn68xxp1;
struct cvmx_fpa_quex_page_index_s cnf71xx;
};
union cvmx_fpa_que8_page_index {
@@ -1359,8 +1178,6 @@ union cvmx_fpa_que8_page_index {
uint64_t reserved_25_63:39;
#endif
} s;
struct cvmx_fpa_que8_page_index_s cn68xx;
struct cvmx_fpa_que8_page_index_s cn68xxp1;
};
union cvmx_fpa_que_act {
@@ -1376,24 +1193,6 @@ union cvmx_fpa_que_act {
uint64_t reserved_29_63:35;
#endif
} s;
struct cvmx_fpa_que_act_s cn30xx;
struct cvmx_fpa_que_act_s cn31xx;
struct cvmx_fpa_que_act_s cn38xx;
struct cvmx_fpa_que_act_s cn38xxp2;
struct cvmx_fpa_que_act_s cn50xx;
struct cvmx_fpa_que_act_s cn52xx;
struct cvmx_fpa_que_act_s cn52xxp1;
struct cvmx_fpa_que_act_s cn56xx;
struct cvmx_fpa_que_act_s cn56xxp1;
struct cvmx_fpa_que_act_s cn58xx;
struct cvmx_fpa_que_act_s cn58xxp1;
struct cvmx_fpa_que_act_s cn61xx;
struct cvmx_fpa_que_act_s cn63xx;
struct cvmx_fpa_que_act_s cn63xxp1;
struct cvmx_fpa_que_act_s cn66xx;
struct cvmx_fpa_que_act_s cn68xx;
struct cvmx_fpa_que_act_s cn68xxp1;
struct cvmx_fpa_que_act_s cnf71xx;
};
union cvmx_fpa_que_exp {
@@ -1409,24 +1208,6 @@ union cvmx_fpa_que_exp {
uint64_t reserved_29_63:35;
#endif
} s;
struct cvmx_fpa_que_exp_s cn30xx;
struct cvmx_fpa_que_exp_s cn31xx;
struct cvmx_fpa_que_exp_s cn38xx;
struct cvmx_fpa_que_exp_s cn38xxp2;
struct cvmx_fpa_que_exp_s cn50xx;
struct cvmx_fpa_que_exp_s cn52xx;
struct cvmx_fpa_que_exp_s cn52xxp1;
struct cvmx_fpa_que_exp_s cn56xx;
struct cvmx_fpa_que_exp_s cn56xxp1;
struct cvmx_fpa_que_exp_s cn58xx;
struct cvmx_fpa_que_exp_s cn58xxp1;
struct cvmx_fpa_que_exp_s cn61xx;
struct cvmx_fpa_que_exp_s cn63xx;
struct cvmx_fpa_que_exp_s cn63xxp1;
struct cvmx_fpa_que_exp_s cn66xx;
struct cvmx_fpa_que_exp_s cn68xx;
struct cvmx_fpa_que_exp_s cn68xxp1;
struct cvmx_fpa_que_exp_s cnf71xx;
};
union cvmx_fpa_wart_ctl {
@@ -1440,17 +1221,6 @@ union cvmx_fpa_wart_ctl {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_fpa_wart_ctl_s cn30xx;
struct cvmx_fpa_wart_ctl_s cn31xx;
struct cvmx_fpa_wart_ctl_s cn38xx;
struct cvmx_fpa_wart_ctl_s cn38xxp2;
struct cvmx_fpa_wart_ctl_s cn50xx;
struct cvmx_fpa_wart_ctl_s cn52xx;
struct cvmx_fpa_wart_ctl_s cn52xxp1;
struct cvmx_fpa_wart_ctl_s cn56xx;
struct cvmx_fpa_wart_ctl_s cn56xxp1;
struct cvmx_fpa_wart_ctl_s cn58xx;
struct cvmx_fpa_wart_ctl_s cn58xxp1;
};
union cvmx_fpa_wart_status {
@@ -1464,17 +1234,6 @@ union cvmx_fpa_wart_status {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_fpa_wart_status_s cn30xx;
struct cvmx_fpa_wart_status_s cn31xx;
struct cvmx_fpa_wart_status_s cn38xx;
struct cvmx_fpa_wart_status_s cn38xxp2;
struct cvmx_fpa_wart_status_s cn50xx;
struct cvmx_fpa_wart_status_s cn52xx;
struct cvmx_fpa_wart_status_s cn52xxp1;
struct cvmx_fpa_wart_status_s cn56xx;
struct cvmx_fpa_wart_status_s cn56xxp1;
struct cvmx_fpa_wart_status_s cn58xx;
struct cvmx_fpa_wart_status_s cn58xxp1;
};
union cvmx_fpa_wqe_threshold {
@@ -1488,12 +1247,6 @@ union cvmx_fpa_wqe_threshold {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_fpa_wqe_threshold_s cn61xx;
struct cvmx_fpa_wqe_threshold_s cn63xx;
struct cvmx_fpa_wqe_threshold_s cn66xx;
struct cvmx_fpa_wqe_threshold_s cn68xx;
struct cvmx_fpa_wqe_threshold_s cn68xxp1;
struct cvmx_fpa_wqe_threshold_s cnf71xx;
};
#endif

4672
arch/mips/include/asm/octeon/cvmx-gmxx-defs.h
View File

File diff suppressed because it is too large Load Diff

116
arch/mips/include/asm/octeon/cvmx-gpio-defs.h
View File

@@ -90,10 +90,6 @@ union cvmx_gpio_bit_cfgx {
uint64_t reserved_12_63:52;
#endif
} cn30xx;
struct cvmx_gpio_bit_cfgx_cn30xx cn31xx;
struct cvmx_gpio_bit_cfgx_cn30xx cn38xx;
struct cvmx_gpio_bit_cfgx_cn30xx cn38xxp2;
struct cvmx_gpio_bit_cfgx_cn30xx cn50xx;
struct cvmx_gpio_bit_cfgx_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_15_63:49;
@@ -117,20 +113,6 @@ union cvmx_gpio_bit_cfgx {
uint64_t reserved_15_63:49;
#endif
} cn52xx;
struct cvmx_gpio_bit_cfgx_cn52xx cn52xxp1;
struct cvmx_gpio_bit_cfgx_cn52xx cn56xx;
struct cvmx_gpio_bit_cfgx_cn52xx cn56xxp1;
struct cvmx_gpio_bit_cfgx_cn30xx cn58xx;
struct cvmx_gpio_bit_cfgx_cn30xx cn58xxp1;
struct cvmx_gpio_bit_cfgx_s cn61xx;
struct cvmx_gpio_bit_cfgx_s cn63xx;
struct cvmx_gpio_bit_cfgx_s cn63xxp1;
struct cvmx_gpio_bit_cfgx_s cn66xx;
struct cvmx_gpio_bit_cfgx_s cn68xx;
struct cvmx_gpio_bit_cfgx_s cn68xxp1;
struct cvmx_gpio_bit_cfgx_s cn70xx;
struct cvmx_gpio_bit_cfgx_s cn73xx;
struct cvmx_gpio_bit_cfgx_s cnf71xx;
};
union cvmx_gpio_boot_ena {
@@ -146,9 +128,6 @@ union cvmx_gpio_boot_ena {
uint64_t reserved_12_63:52;
#endif
} s;
struct cvmx_gpio_boot_ena_s cn30xx;
struct cvmx_gpio_boot_ena_s cn31xx;
struct cvmx_gpio_boot_ena_s cn50xx;
};
union cvmx_gpio_clk_genx {
@@ -162,17 +141,6 @@ union cvmx_gpio_clk_genx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_gpio_clk_genx_s cn52xx;
struct cvmx_gpio_clk_genx_s cn52xxp1;
struct cvmx_gpio_clk_genx_s cn56xx;
struct cvmx_gpio_clk_genx_s cn56xxp1;
struct cvmx_gpio_clk_genx_s cn61xx;
struct cvmx_gpio_clk_genx_s cn63xx;
struct cvmx_gpio_clk_genx_s cn63xxp1;
struct cvmx_gpio_clk_genx_s cn66xx;
struct cvmx_gpio_clk_genx_s cn68xx;
struct cvmx_gpio_clk_genx_s cn68xxp1;
struct cvmx_gpio_clk_genx_s cnf71xx;
};
union cvmx_gpio_clk_qlmx {
@@ -218,11 +186,6 @@ union cvmx_gpio_clk_qlmx {
uint64_t reserved_3_63:61;
#endif
} cn63xx;
struct cvmx_gpio_clk_qlmx_cn63xx cn63xxp1;
struct cvmx_gpio_clk_qlmx_cn61xx cn66xx;
struct cvmx_gpio_clk_qlmx_s cn68xx;
struct cvmx_gpio_clk_qlmx_s cn68xxp1;
struct cvmx_gpio_clk_qlmx_cn61xx cnf71xx;
};
union cvmx_gpio_dbg_ena {
@@ -236,9 +199,6 @@ union cvmx_gpio_dbg_ena {
uint64_t reserved_21_63:43;
#endif
} s;
struct cvmx_gpio_dbg_ena_s cn30xx;
struct cvmx_gpio_dbg_ena_s cn31xx;
struct cvmx_gpio_dbg_ena_s cn50xx;
};
union cvmx_gpio_int_clr {
@@ -252,24 +212,6 @@ union cvmx_gpio_int_clr {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_gpio_int_clr_s cn30xx;
struct cvmx_gpio_int_clr_s cn31xx;
struct cvmx_gpio_int_clr_s cn38xx;
struct cvmx_gpio_int_clr_s cn38xxp2;
struct cvmx_gpio_int_clr_s cn50xx;
struct cvmx_gpio_int_clr_s cn52xx;
struct cvmx_gpio_int_clr_s cn52xxp1;
struct cvmx_gpio_int_clr_s cn56xx;
struct cvmx_gpio_int_clr_s cn56xxp1;
struct cvmx_gpio_int_clr_s cn58xx;
struct cvmx_gpio_int_clr_s cn58xxp1;
struct cvmx_gpio_int_clr_s cn61xx;
struct cvmx_gpio_int_clr_s cn63xx;
struct cvmx_gpio_int_clr_s cn63xxp1;
struct cvmx_gpio_int_clr_s cn66xx;
struct cvmx_gpio_int_clr_s cn68xx;
struct cvmx_gpio_int_clr_s cn68xxp1;
struct cvmx_gpio_int_clr_s cnf71xx;
};
union cvmx_gpio_multi_cast {
@@ -283,8 +225,6 @@ union cvmx_gpio_multi_cast {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_gpio_multi_cast_s cn61xx;
struct cvmx_gpio_multi_cast_s cnf71xx;
};
union cvmx_gpio_pin_ena {
@@ -302,7 +242,6 @@ union cvmx_gpio_pin_ena {
uint64_t reserved_20_63:44;
#endif
} s;
struct cvmx_gpio_pin_ena_s cn66xx;
};
union cvmx_gpio_rx_dat {
@@ -316,8 +255,6 @@ union cvmx_gpio_rx_dat {
uint64_t reserved_24_63:40;
#endif
} s;
struct cvmx_gpio_rx_dat_s cn30xx;
struct cvmx_gpio_rx_dat_s cn31xx;
struct cvmx_gpio_rx_dat_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_16_63:48;
@@ -327,14 +264,6 @@ union cvmx_gpio_rx_dat {
uint64_t reserved_16_63:48;
#endif
} cn38xx;
struct cvmx_gpio_rx_dat_cn38xx cn38xxp2;
struct cvmx_gpio_rx_dat_s cn50xx;
struct cvmx_gpio_rx_dat_cn38xx cn52xx;
struct cvmx_gpio_rx_dat_cn38xx cn52xxp1;
struct cvmx_gpio_rx_dat_cn38xx cn56xx;
struct cvmx_gpio_rx_dat_cn38xx cn56xxp1;
struct cvmx_gpio_rx_dat_cn38xx cn58xx;
struct cvmx_gpio_rx_dat_cn38xx cn58xxp1;
struct cvmx_gpio_rx_dat_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44;
@@ -344,12 +273,6 @@ union cvmx_gpio_rx_dat {
uint64_t reserved_20_63:44;
#endif
} cn61xx;
struct cvmx_gpio_rx_dat_cn38xx cn63xx;
struct cvmx_gpio_rx_dat_cn38xx cn63xxp1;
struct cvmx_gpio_rx_dat_cn61xx cn66xx;
struct cvmx_gpio_rx_dat_cn38xx cn68xx;
struct cvmx_gpio_rx_dat_cn38xx cn68xxp1;
struct cvmx_gpio_rx_dat_cn61xx cnf71xx;
};
union cvmx_gpio_tim_ctl {
@@ -363,8 +286,6 @@ union cvmx_gpio_tim_ctl {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_gpio_tim_ctl_s cn68xx;
struct cvmx_gpio_tim_ctl_s cn68xxp1;
};
union cvmx_gpio_tx_clr {
@@ -378,8 +299,6 @@ union cvmx_gpio_tx_clr {
uint64_t reserved_24_63:40;
#endif
} s;
struct cvmx_gpio_tx_clr_s cn30xx;
struct cvmx_gpio_tx_clr_s cn31xx;
struct cvmx_gpio_tx_clr_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_16_63:48;
@@ -389,14 +308,6 @@ union cvmx_gpio_tx_clr {
uint64_t reserved_16_63:48;
#endif
} cn38xx;
struct cvmx_gpio_tx_clr_cn38xx cn38xxp2;
struct cvmx_gpio_tx_clr_s cn50xx;
struct cvmx_gpio_tx_clr_cn38xx cn52xx;
struct cvmx_gpio_tx_clr_cn38xx cn52xxp1;
struct cvmx_gpio_tx_clr_cn38xx cn56xx;
struct cvmx_gpio_tx_clr_cn38xx cn56xxp1;
struct cvmx_gpio_tx_clr_cn38xx cn58xx;
struct cvmx_gpio_tx_clr_cn38xx cn58xxp1;
struct cvmx_gpio_tx_clr_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44;
@@ -406,12 +317,6 @@ union cvmx_gpio_tx_clr {
uint64_t reserved_20_63:44;
#endif
} cn61xx;
struct cvmx_gpio_tx_clr_cn38xx cn63xx;
struct cvmx_gpio_tx_clr_cn38xx cn63xxp1;
struct cvmx_gpio_tx_clr_cn61xx cn66xx;
struct cvmx_gpio_tx_clr_cn38xx cn68xx;
struct cvmx_gpio_tx_clr_cn38xx cn68xxp1;
struct cvmx_gpio_tx_clr_cn61xx cnf71xx;
};
union cvmx_gpio_tx_set {
@@ -425,8 +330,6 @@ union cvmx_gpio_tx_set {
uint64_t reserved_24_63:40;
#endif
} s;
struct cvmx_gpio_tx_set_s cn30xx;
struct cvmx_gpio_tx_set_s cn31xx;
struct cvmx_gpio_tx_set_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_16_63:48;
@@ -436,14 +339,6 @@ union cvmx_gpio_tx_set {
uint64_t reserved_16_63:48;
#endif
} cn38xx;
struct cvmx_gpio_tx_set_cn38xx cn38xxp2;
struct cvmx_gpio_tx_set_s cn50xx;
struct cvmx_gpio_tx_set_cn38xx cn52xx;
struct cvmx_gpio_tx_set_cn38xx cn52xxp1;
struct cvmx_gpio_tx_set_cn38xx cn56xx;
struct cvmx_gpio_tx_set_cn38xx cn56xxp1;
struct cvmx_gpio_tx_set_cn38xx cn58xx;
struct cvmx_gpio_tx_set_cn38xx cn58xxp1;
struct cvmx_gpio_tx_set_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44;
@@ -453,12 +348,6 @@ union cvmx_gpio_tx_set {
uint64_t reserved_20_63:44;
#endif
} cn61xx;
struct cvmx_gpio_tx_set_cn38xx cn63xx;
struct cvmx_gpio_tx_set_cn38xx cn63xxp1;
struct cvmx_gpio_tx_set_cn61xx cn66xx;
struct cvmx_gpio_tx_set_cn38xx cn68xx;
struct cvmx_gpio_tx_set_cn38xx cn68xxp1;
struct cvmx_gpio_tx_set_cn61xx cnf71xx;
};
union cvmx_gpio_xbit_cfgx {
@@ -505,11 +394,6 @@ union cvmx_gpio_xbit_cfgx {
uint64_t reserved_12_63:52;
#endif
} cn30xx;
struct cvmx_gpio_xbit_cfgx_cn30xx cn31xx;
struct cvmx_gpio_xbit_cfgx_cn30xx cn50xx;
struct cvmx_gpio_xbit_cfgx_s cn61xx;
struct cvmx_gpio_xbit_cfgx_s cn66xx;
struct cvmx_gpio_xbit_cfgx_s cnf71xx;
};
#endif

17
arch/mips/include/asm/octeon/cvmx-helper-rgmii.h
View File

@@ -90,21 +90,4 @@ extern cvmx_helper_link_info_t __cvmx_helper_rgmii_link_get(int ipd_port);
extern int __cvmx_helper_rgmii_link_set(int ipd_port,
cvmx_helper_link_info_t link_info);
/**
* Configure a port for internal and/or external loopback. Internal loopback
* causes packets sent by the port to be received by Octeon. External loopback
* causes packets received from the wire to sent out again.
*
* @ipd_port: IPD/PKO port to loopback.
* @enable_internal:
* Non zero if you want internal loopback
* @enable_external:
* Non zero if you want external loopback
*
* Returns Zero on success, negative on failure.
*/
extern int __cvmx_helper_rgmii_configure_loopback(int ipd_port,
int enable_internal,
int enable_external);
#endif

17
arch/mips/include/asm/octeon/cvmx-helper-sgmii.h
View File

@@ -84,21 +84,4 @@ extern cvmx_helper_link_info_t __cvmx_helper_sgmii_link_get(int ipd_port);
extern int __cvmx_helper_sgmii_link_set(int ipd_port,
cvmx_helper_link_info_t link_info);
/**
* Configure a port for internal and/or external loopback. Internal loopback
* causes packets sent by the port to be received by Octeon. External loopback
* causes packets received from the wire to sent out again.
*
* @ipd_port: IPD/PKO port to loopback.
* @enable_internal:
* Non zero if you want internal loopback
* @enable_external:
* Non zero if you want external loopback
*
* Returns Zero on success, negative on failure.
*/
extern int __cvmx_helper_sgmii_configure_loopback(int ipd_port,
int enable_internal,
int enable_external);
#endif

23
arch/mips/include/asm/octeon/cvmx-helper-util.h
View File

@@ -44,29 +44,6 @@
extern const char
*cvmx_helper_interface_mode_to_string(cvmx_helper_interface_mode_t mode);
/**
* Debug routine to dump the packet structure to the console
*
* @work: Work queue entry containing the packet to dump
* Returns
*/
extern int cvmx_helper_dump_packet(cvmx_wqe_t *work);
/**
* Setup Random Early Drop on a specific input queue
*
* @queue: Input queue to setup RED on (0-7)
* @pass_thresh:
* Packets will begin slowly dropping when there are less than
* this many packet buffers free in FPA 0.
* @drop_thresh:
* All incoming packets will be dropped when there are less
* than this many free packet buffers in FPA 0.
* Returns Zero on success. Negative on failure
*/
extern int cvmx_helper_setup_red_queue(int queue, int pass_thresh,
int drop_thresh);
/**
* Setup Random Early Drop to automatically begin dropping packets.
*

16
arch/mips/include/asm/octeon/cvmx-helper-xaui.h
View File

@@ -84,20 +84,4 @@ extern cvmx_helper_link_info_t __cvmx_helper_xaui_link_get(int ipd_port);
extern int __cvmx_helper_xaui_link_set(int ipd_port,
cvmx_helper_link_info_t link_info);
/**
* Configure a port for internal and/or external loopback. Internal loopback
* causes packets sent by the port to be received by Octeon. External loopback
* causes packets received from the wire to sent out again.
*
* @ipd_port: IPD/PKO port to loopback.
* @enable_internal:
* Non zero if you want internal loopback
* @enable_external:
* Non zero if you want external loopback
*
* Returns Zero on success, negative on failure.
*/
extern int __cvmx_helper_xaui_configure_loopback(int ipd_port,
int enable_internal,
int enable_external);
#endif

36
arch/mips/include/asm/octeon/cvmx-helper.h
View File

@@ -70,26 +70,6 @@ typedef union {
#include <asm/octeon/cvmx-helper-util.h>
#include <asm/octeon/cvmx-helper-xaui.h>
/**
* cvmx_override_pko_queue_priority(int ipd_port, uint64_t
* priorities[16]) is a function pointer. It is meant to allow
* customization of the PKO queue priorities based on the port
* number. Users should set this pointer to a function before
* calling any cvmx-helper operations.
*/
extern void (*cvmx_override_pko_queue_priority) (int pko_port,
uint64_t priorities[16]);
/**
* cvmx_override_ipd_port_setup(int ipd_port) is a function
* pointer. It is meant to allow customization of the IPD port
* setup before packet input/output comes online. It is called
* after cvmx-helper does the default IPD configuration, but
* before IPD is enabled. Users should set this pointer to a
* function before calling any cvmx-helper operations.
*/
extern void (*cvmx_override_ipd_port_setup) (int ipd_port);
/**
* This function enables the IPD and also enables the packet interfaces.
* The packet interfaces (RGMII and SPI) must be enabled after the
@@ -195,20 +175,4 @@ extern int cvmx_helper_link_set(int ipd_port,
extern int cvmx_helper_interface_probe(int interface);
extern int cvmx_helper_interface_enumerate(int interface);
/**
* Configure a port for internal and/or external loopback. Internal loopback
* causes packets sent by the port to be received by Octeon. External loopback
* causes packets received from the wire to sent out again.
*
* @ipd_port: IPD/PKO port to loopback.
* @enable_internal:
* Non zero if you want internal loopback
* @enable_external:
* Non zero if you want external loopback
*
* Returns Zero on success, negative on failure.
*/
extern int cvmx_helper_configure_loopback(int ipd_port, int enable_internal,
int enable_external);
#endif /* __CVMX_HELPER_H__ */

375
arch/mips/include/asm/octeon/cvmx-iob-defs.h
View File

@@ -119,16 +119,6 @@ union cvmx_iob_bist_status {
uint64_t reserved_18_63:46;
#endif
} cn30xx;
struct cvmx_iob_bist_status_cn30xx cn31xx;
struct cvmx_iob_bist_status_cn30xx cn38xx;
struct cvmx_iob_bist_status_cn30xx cn38xxp2;
struct cvmx_iob_bist_status_cn30xx cn50xx;
struct cvmx_iob_bist_status_cn30xx cn52xx;
struct cvmx_iob_bist_status_cn30xx cn52xxp1;
struct cvmx_iob_bist_status_cn30xx cn56xx;
struct cvmx_iob_bist_status_cn30xx cn56xxp1;
struct cvmx_iob_bist_status_cn30xx cn58xx;
struct cvmx_iob_bist_status_cn30xx cn58xxp1;
struct cvmx_iob_bist_status_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_23_63:41;
@@ -182,9 +172,6 @@ union cvmx_iob_bist_status {
uint64_t reserved_23_63:41;
#endif
} cn61xx;
struct cvmx_iob_bist_status_cn61xx cn63xx;
struct cvmx_iob_bist_status_cn61xx cn63xxp1;
struct cvmx_iob_bist_status_cn61xx cn66xx;
struct cvmx_iob_bist_status_cn68xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_18_63:46;
@@ -228,8 +215,6 @@ union cvmx_iob_bist_status {
uint64_t reserved_18_63:46;
#endif
} cn68xx;
struct cvmx_iob_bist_status_cn68xx cn68xxp1;
struct cvmx_iob_bist_status_cn61xx cnf71xx;
};
union cvmx_iob_ctl_status {
@@ -274,10 +259,6 @@ union cvmx_iob_ctl_status {
uint64_t reserved_5_63:59;
#endif
} cn30xx;
struct cvmx_iob_ctl_status_cn30xx cn31xx;
struct cvmx_iob_ctl_status_cn30xx cn38xx;
struct cvmx_iob_ctl_status_cn30xx cn38xxp2;
struct cvmx_iob_ctl_status_cn30xx cn50xx;
struct cvmx_iob_ctl_status_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_6_63:58;
@@ -297,11 +278,6 @@ union cvmx_iob_ctl_status {
uint64_t reserved_6_63:58;
#endif
} cn52xx;
struct cvmx_iob_ctl_status_cn30xx cn52xxp1;
struct cvmx_iob_ctl_status_cn30xx cn56xx;
struct cvmx_iob_ctl_status_cn30xx cn56xxp1;
struct cvmx_iob_ctl_status_cn30xx cn58xx;
struct cvmx_iob_ctl_status_cn30xx cn58xxp1;
struct cvmx_iob_ctl_status_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_11_63:53;
@@ -346,8 +322,6 @@ union cvmx_iob_ctl_status {
uint64_t reserved_10_63:54;
#endif
} cn63xx;
struct cvmx_iob_ctl_status_cn63xx cn63xxp1;
struct cvmx_iob_ctl_status_cn61xx cn66xx;
struct cvmx_iob_ctl_status_cn68xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_11_63:53;
@@ -371,8 +345,6 @@ union cvmx_iob_ctl_status {
uint64_t reserved_11_63:53;
#endif
} cn68xx;
struct cvmx_iob_ctl_status_cn68xx cn68xxp1;
struct cvmx_iob_ctl_status_cn61xx cnf71xx;
};
union cvmx_iob_dwb_pri_cnt {
@@ -388,19 +360,6 @@ union cvmx_iob_dwb_pri_cnt {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_iob_dwb_pri_cnt_s cn38xx;
struct cvmx_iob_dwb_pri_cnt_s cn38xxp2;
struct cvmx_iob_dwb_pri_cnt_s cn52xx;
struct cvmx_iob_dwb_pri_cnt_s cn52xxp1;
struct cvmx_iob_dwb_pri_cnt_s cn56xx;
struct cvmx_iob_dwb_pri_cnt_s cn56xxp1;
struct cvmx_iob_dwb_pri_cnt_s cn58xx;
struct cvmx_iob_dwb_pri_cnt_s cn58xxp1;
struct cvmx_iob_dwb_pri_cnt_s cn61xx;
struct cvmx_iob_dwb_pri_cnt_s cn63xx;
struct cvmx_iob_dwb_pri_cnt_s cn63xxp1;
struct cvmx_iob_dwb_pri_cnt_s cn66xx;
struct cvmx_iob_dwb_pri_cnt_s cnf71xx;
};
union cvmx_iob_fau_timeout {
@@ -416,24 +375,6 @@ union cvmx_iob_fau_timeout {
uint64_t reserved_13_63:51;
#endif
} s;
struct cvmx_iob_fau_timeout_s cn30xx;
struct cvmx_iob_fau_timeout_s cn31xx;
struct cvmx_iob_fau_timeout_s cn38xx;
struct cvmx_iob_fau_timeout_s cn38xxp2;
struct cvmx_iob_fau_timeout_s cn50xx;
struct cvmx_iob_fau_timeout_s cn52xx;
struct cvmx_iob_fau_timeout_s cn52xxp1;
struct cvmx_iob_fau_timeout_s cn56xx;
struct cvmx_iob_fau_timeout_s cn56xxp1;
struct cvmx_iob_fau_timeout_s cn58xx;
struct cvmx_iob_fau_timeout_s cn58xxp1;
struct cvmx_iob_fau_timeout_s cn61xx;
struct cvmx_iob_fau_timeout_s cn63xx;
struct cvmx_iob_fau_timeout_s cn63xxp1;
struct cvmx_iob_fau_timeout_s cn66xx;
struct cvmx_iob_fau_timeout_s cn68xx;
struct cvmx_iob_fau_timeout_s cn68xxp1;
struct cvmx_iob_fau_timeout_s cnf71xx;
};
union cvmx_iob_i2c_pri_cnt {
@@ -449,19 +390,6 @@ union cvmx_iob_i2c_pri_cnt {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_iob_i2c_pri_cnt_s cn38xx;
struct cvmx_iob_i2c_pri_cnt_s cn38xxp2;
struct cvmx_iob_i2c_pri_cnt_s cn52xx;
struct cvmx_iob_i2c_pri_cnt_s cn52xxp1;
struct cvmx_iob_i2c_pri_cnt_s cn56xx;
struct cvmx_iob_i2c_pri_cnt_s cn56xxp1;
struct cvmx_iob_i2c_pri_cnt_s cn58xx;
struct cvmx_iob_i2c_pri_cnt_s cn58xxp1;
struct cvmx_iob_i2c_pri_cnt_s cn61xx;
struct cvmx_iob_i2c_pri_cnt_s cn63xx;
struct cvmx_iob_i2c_pri_cnt_s cn63xxp1;
struct cvmx_iob_i2c_pri_cnt_s cn66xx;
struct cvmx_iob_i2c_pri_cnt_s cnf71xx;
};
union cvmx_iob_inb_control_match {
@@ -481,24 +409,6 @@ union cvmx_iob_inb_control_match {
uint64_t reserved_29_63:35;
#endif
} s;
struct cvmx_iob_inb_control_match_s cn30xx;
struct cvmx_iob_inb_control_match_s cn31xx;
struct cvmx_iob_inb_control_match_s cn38xx;
struct cvmx_iob_inb_control_match_s cn38xxp2;
struct cvmx_iob_inb_control_match_s cn50xx;
struct cvmx_iob_inb_control_match_s cn52xx;
struct cvmx_iob_inb_control_match_s cn52xxp1;
struct cvmx_iob_inb_control_match_s cn56xx;
struct cvmx_iob_inb_control_match_s cn56xxp1;
struct cvmx_iob_inb_control_match_s cn58xx;
struct cvmx_iob_inb_control_match_s cn58xxp1;
struct cvmx_iob_inb_control_match_s cn61xx;
struct cvmx_iob_inb_control_match_s cn63xx;
struct cvmx_iob_inb_control_match_s cn63xxp1;
struct cvmx_iob_inb_control_match_s cn66xx;
struct cvmx_iob_inb_control_match_s cn68xx;
struct cvmx_iob_inb_control_match_s cn68xxp1;
struct cvmx_iob_inb_control_match_s cnf71xx;
};
union cvmx_iob_inb_control_match_enb {
@@ -518,24 +428,6 @@ union cvmx_iob_inb_control_match_enb {
uint64_t reserved_29_63:35;
#endif
} s;
struct cvmx_iob_inb_control_match_enb_s cn30xx;
struct cvmx_iob_inb_control_match_enb_s cn31xx;
struct cvmx_iob_inb_control_match_enb_s cn38xx;
struct cvmx_iob_inb_control_match_enb_s cn38xxp2;
struct cvmx_iob_inb_control_match_enb_s cn50xx;
struct cvmx_iob_inb_control_match_enb_s cn52xx;
struct cvmx_iob_inb_control_match_enb_s cn52xxp1;
struct cvmx_iob_inb_control_match_enb_s cn56xx;
struct cvmx_iob_inb_control_match_enb_s cn56xxp1;
struct cvmx_iob_inb_control_match_enb_s cn58xx;
struct cvmx_iob_inb_control_match_enb_s cn58xxp1;
struct cvmx_iob_inb_control_match_enb_s cn61xx;
struct cvmx_iob_inb_control_match_enb_s cn63xx;
struct cvmx_iob_inb_control_match_enb_s cn63xxp1;
struct cvmx_iob_inb_control_match_enb_s cn66xx;
struct cvmx_iob_inb_control_match_enb_s cn68xx;
struct cvmx_iob_inb_control_match_enb_s cn68xxp1;
struct cvmx_iob_inb_control_match_enb_s cnf71xx;
};
union cvmx_iob_inb_data_match {
@@ -547,24 +439,6 @@ union cvmx_iob_inb_data_match {
uint64_t data:64;
#endif
} s;
struct cvmx_iob_inb_data_match_s cn30xx;
struct cvmx_iob_inb_data_match_s cn31xx;
struct cvmx_iob_inb_data_match_s cn38xx;
struct cvmx_iob_inb_data_match_s cn38xxp2;
struct cvmx_iob_inb_data_match_s cn50xx;
struct cvmx_iob_inb_data_match_s cn52xx;
struct cvmx_iob_inb_data_match_s cn52xxp1;
struct cvmx_iob_inb_data_match_s cn56xx;
struct cvmx_iob_inb_data_match_s cn56xxp1;
struct cvmx_iob_inb_data_match_s cn58xx;
struct cvmx_iob_inb_data_match_s cn58xxp1;
struct cvmx_iob_inb_data_match_s cn61xx;
struct cvmx_iob_inb_data_match_s cn63xx;
struct cvmx_iob_inb_data_match_s cn63xxp1;
struct cvmx_iob_inb_data_match_s cn66xx;
struct cvmx_iob_inb_data_match_s cn68xx;
struct cvmx_iob_inb_data_match_s cn68xxp1;
struct cvmx_iob_inb_data_match_s cnf71xx;
};
union cvmx_iob_inb_data_match_enb {
@@ -576,24 +450,6 @@ union cvmx_iob_inb_data_match_enb {
uint64_t data:64;
#endif
} s;
struct cvmx_iob_inb_data_match_enb_s cn30xx;
struct cvmx_iob_inb_data_match_enb_s cn31xx;
struct cvmx_iob_inb_data_match_enb_s cn38xx;
struct cvmx_iob_inb_data_match_enb_s cn38xxp2;
struct cvmx_iob_inb_data_match_enb_s cn50xx;
struct cvmx_iob_inb_data_match_enb_s cn52xx;
struct cvmx_iob_inb_data_match_enb_s cn52xxp1;
struct cvmx_iob_inb_data_match_enb_s cn56xx;
struct cvmx_iob_inb_data_match_enb_s cn56xxp1;
struct cvmx_iob_inb_data_match_enb_s cn58xx;
struct cvmx_iob_inb_data_match_enb_s cn58xxp1;
struct cvmx_iob_inb_data_match_enb_s cn61xx;
struct cvmx_iob_inb_data_match_enb_s cn63xx;
struct cvmx_iob_inb_data_match_enb_s cn63xxp1;
struct cvmx_iob_inb_data_match_enb_s cn66xx;
struct cvmx_iob_inb_data_match_enb_s cn68xx;
struct cvmx_iob_inb_data_match_enb_s cn68xxp1;
struct cvmx_iob_inb_data_match_enb_s cnf71xx;
};
union cvmx_iob_int_enb {
@@ -632,20 +488,6 @@ union cvmx_iob_int_enb {
uint64_t reserved_4_63:60;
#endif
} cn30xx;
struct cvmx_iob_int_enb_cn30xx cn31xx;
struct cvmx_iob_int_enb_cn30xx cn38xx;
struct cvmx_iob_int_enb_cn30xx cn38xxp2;
struct cvmx_iob_int_enb_s cn50xx;
struct cvmx_iob_int_enb_s cn52xx;
struct cvmx_iob_int_enb_s cn52xxp1;
struct cvmx_iob_int_enb_s cn56xx;
struct cvmx_iob_int_enb_s cn56xxp1;
struct cvmx_iob_int_enb_s cn58xx;
struct cvmx_iob_int_enb_s cn58xxp1;
struct cvmx_iob_int_enb_s cn61xx;
struct cvmx_iob_int_enb_s cn63xx;
struct cvmx_iob_int_enb_s cn63xxp1;
struct cvmx_iob_int_enb_s cn66xx;
struct cvmx_iob_int_enb_cn68xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_0_63:64;
@@ -653,8 +495,6 @@ union cvmx_iob_int_enb {
uint64_t reserved_0_63:64;
#endif
} cn68xx;
struct cvmx_iob_int_enb_cn68xx cn68xxp1;
struct cvmx_iob_int_enb_s cnf71xx;
};
union cvmx_iob_int_sum {
@@ -693,20 +533,6 @@ union cvmx_iob_int_sum {
uint64_t reserved_4_63:60;
#endif
} cn30xx;
struct cvmx_iob_int_sum_cn30xx cn31xx;
struct cvmx_iob_int_sum_cn30xx cn38xx;
struct cvmx_iob_int_sum_cn30xx cn38xxp2;
struct cvmx_iob_int_sum_s cn50xx;
struct cvmx_iob_int_sum_s cn52xx;
struct cvmx_iob_int_sum_s cn52xxp1;
struct cvmx_iob_int_sum_s cn56xx;
struct cvmx_iob_int_sum_s cn56xxp1;
struct cvmx_iob_int_sum_s cn58xx;
struct cvmx_iob_int_sum_s cn58xxp1;
struct cvmx_iob_int_sum_s cn61xx;
struct cvmx_iob_int_sum_s cn63xx;
struct cvmx_iob_int_sum_s cn63xxp1;
struct cvmx_iob_int_sum_s cn66xx;
struct cvmx_iob_int_sum_cn68xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_0_63:64;
@@ -714,8 +540,6 @@ union cvmx_iob_int_sum {
uint64_t reserved_0_63:64;
#endif
} cn68xx;
struct cvmx_iob_int_sum_cn68xx cn68xxp1;
struct cvmx_iob_int_sum_s cnf71xx;
};
union cvmx_iob_n2c_l2c_pri_cnt {
@@ -731,19 +555,6 @@ union cvmx_iob_n2c_l2c_pri_cnt {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn38xx;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn38xxp2;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn52xx;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn52xxp1;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn56xx;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn56xxp1;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn58xx;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn58xxp1;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn61xx;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn63xx;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn63xxp1;
struct cvmx_iob_n2c_l2c_pri_cnt_s cn66xx;
struct cvmx_iob_n2c_l2c_pri_cnt_s cnf71xx;
};
union cvmx_iob_n2c_rsp_pri_cnt {
@@ -759,19 +570,6 @@ union cvmx_iob_n2c_rsp_pri_cnt {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn38xx;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn38xxp2;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn52xx;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn52xxp1;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn56xx;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn56xxp1;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn58xx;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn58xxp1;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn61xx;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn63xx;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn63xxp1;
struct cvmx_iob_n2c_rsp_pri_cnt_s cn66xx;
struct cvmx_iob_n2c_rsp_pri_cnt_s cnf71xx;
};
union cvmx_iob_outb_com_pri_cnt {
@@ -787,21 +585,6 @@ union cvmx_iob_outb_com_pri_cnt {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_iob_outb_com_pri_cnt_s cn38xx;
struct cvmx_iob_outb_com_pri_cnt_s cn38xxp2;
struct cvmx_iob_outb_com_pri_cnt_s cn52xx;
struct cvmx_iob_outb_com_pri_cnt_s cn52xxp1;
struct cvmx_iob_outb_com_pri_cnt_s cn56xx;
struct cvmx_iob_outb_com_pri_cnt_s cn56xxp1;
struct cvmx_iob_outb_com_pri_cnt_s cn58xx;
struct cvmx_iob_outb_com_pri_cnt_s cn58xxp1;
struct cvmx_iob_outb_com_pri_cnt_s cn61xx;
struct cvmx_iob_outb_com_pri_cnt_s cn63xx;
struct cvmx_iob_outb_com_pri_cnt_s cn63xxp1;
struct cvmx_iob_outb_com_pri_cnt_s cn66xx;
struct cvmx_iob_outb_com_pri_cnt_s cn68xx;
struct cvmx_iob_outb_com_pri_cnt_s cn68xxp1;
struct cvmx_iob_outb_com_pri_cnt_s cnf71xx;
};
union cvmx_iob_outb_control_match {
@@ -821,24 +604,6 @@ union cvmx_iob_outb_control_match {
uint64_t reserved_26_63:38;
#endif
} s;
struct cvmx_iob_outb_control_match_s cn30xx;
struct cvmx_iob_outb_control_match_s cn31xx;
struct cvmx_iob_outb_control_match_s cn38xx;
struct cvmx_iob_outb_control_match_s cn38xxp2;
struct cvmx_iob_outb_control_match_s cn50xx;
struct cvmx_iob_outb_control_match_s cn52xx;
struct cvmx_iob_outb_control_match_s cn52xxp1;
struct cvmx_iob_outb_control_match_s cn56xx;
struct cvmx_iob_outb_control_match_s cn56xxp1;
struct cvmx_iob_outb_control_match_s cn58xx;
struct cvmx_iob_outb_control_match_s cn58xxp1;
struct cvmx_iob_outb_control_match_s cn61xx;
struct cvmx_iob_outb_control_match_s cn63xx;
struct cvmx_iob_outb_control_match_s cn63xxp1;
struct cvmx_iob_outb_control_match_s cn66xx;
struct cvmx_iob_outb_control_match_s cn68xx;
struct cvmx_iob_outb_control_match_s cn68xxp1;
struct cvmx_iob_outb_control_match_s cnf71xx;
};
union cvmx_iob_outb_control_match_enb {
@@ -858,24 +623,6 @@ union cvmx_iob_outb_control_match_enb {
uint64_t reserved_26_63:38;
#endif
} s;
struct cvmx_iob_outb_control_match_enb_s cn30xx;
struct cvmx_iob_outb_control_match_enb_s cn31xx;
struct cvmx_iob_outb_control_match_enb_s cn38xx;
struct cvmx_iob_outb_control_match_enb_s cn38xxp2;
struct cvmx_iob_outb_control_match_enb_s cn50xx;
struct cvmx_iob_outb_control_match_enb_s cn52xx;
struct cvmx_iob_outb_control_match_enb_s cn52xxp1;
struct cvmx_iob_outb_control_match_enb_s cn56xx;
struct cvmx_iob_outb_control_match_enb_s cn56xxp1;
struct cvmx_iob_outb_control_match_enb_s cn58xx;
struct cvmx_iob_outb_control_match_enb_s cn58xxp1;
struct cvmx_iob_outb_control_match_enb_s cn61xx;
struct cvmx_iob_outb_control_match_enb_s cn63xx;
struct cvmx_iob_outb_control_match_enb_s cn63xxp1;
struct cvmx_iob_outb_control_match_enb_s cn66xx;
struct cvmx_iob_outb_control_match_enb_s cn68xx;
struct cvmx_iob_outb_control_match_enb_s cn68xxp1;
struct cvmx_iob_outb_control_match_enb_s cnf71xx;
};
union cvmx_iob_outb_data_match {
@@ -887,24 +634,6 @@ union cvmx_iob_outb_data_match {
uint64_t data:64;
#endif
} s;
struct cvmx_iob_outb_data_match_s cn30xx;
struct cvmx_iob_outb_data_match_s cn31xx;
struct cvmx_iob_outb_data_match_s cn38xx;
struct cvmx_iob_outb_data_match_s cn38xxp2;
struct cvmx_iob_outb_data_match_s cn50xx;
struct cvmx_iob_outb_data_match_s cn52xx;
struct cvmx_iob_outb_data_match_s cn52xxp1;
struct cvmx_iob_outb_data_match_s cn56xx;
struct cvmx_iob_outb_data_match_s cn56xxp1;
struct cvmx_iob_outb_data_match_s cn58xx;
struct cvmx_iob_outb_data_match_s cn58xxp1;
struct cvmx_iob_outb_data_match_s cn61xx;
struct cvmx_iob_outb_data_match_s cn63xx;
struct cvmx_iob_outb_data_match_s cn63xxp1;
struct cvmx_iob_outb_data_match_s cn66xx;
struct cvmx_iob_outb_data_match_s cn68xx;
struct cvmx_iob_outb_data_match_s cn68xxp1;
struct cvmx_iob_outb_data_match_s cnf71xx;
};
union cvmx_iob_outb_data_match_enb {
@@ -916,24 +645,6 @@ union cvmx_iob_outb_data_match_enb {
uint64_t data:64;
#endif
} s;
struct cvmx_iob_outb_data_match_enb_s cn30xx;
struct cvmx_iob_outb_data_match_enb_s cn31xx;
struct cvmx_iob_outb_data_match_enb_s cn38xx;
struct cvmx_iob_outb_data_match_enb_s cn38xxp2;
struct cvmx_iob_outb_data_match_enb_s cn50xx;
struct cvmx_iob_outb_data_match_enb_s cn52xx;
struct cvmx_iob_outb_data_match_enb_s cn52xxp1;
struct cvmx_iob_outb_data_match_enb_s cn56xx;
struct cvmx_iob_outb_data_match_enb_s cn56xxp1;
struct cvmx_iob_outb_data_match_enb_s cn58xx;
struct cvmx_iob_outb_data_match_enb_s cn58xxp1;
struct cvmx_iob_outb_data_match_enb_s cn61xx;
struct cvmx_iob_outb_data_match_enb_s cn63xx;
struct cvmx_iob_outb_data_match_enb_s cn63xxp1;
struct cvmx_iob_outb_data_match_enb_s cn66xx;
struct cvmx_iob_outb_data_match_enb_s cn68xx;
struct cvmx_iob_outb_data_match_enb_s cn68xxp1;
struct cvmx_iob_outb_data_match_enb_s cnf71xx;
};
union cvmx_iob_outb_fpa_pri_cnt {
@@ -949,21 +660,6 @@ union cvmx_iob_outb_fpa_pri_cnt {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_iob_outb_fpa_pri_cnt_s cn38xx;
struct cvmx_iob_outb_fpa_pri_cnt_s cn38xxp2;
struct cvmx_iob_outb_fpa_pri_cnt_s cn52xx;
struct cvmx_iob_outb_fpa_pri_cnt_s cn52xxp1;
struct cvmx_iob_outb_fpa_pri_cnt_s cn56xx;
struct cvmx_iob_outb_fpa_pri_cnt_s cn56xxp1;
struct cvmx_iob_outb_fpa_pri_cnt_s cn58xx;
struct cvmx_iob_outb_fpa_pri_cnt_s cn58xxp1;
struct cvmx_iob_outb_fpa_pri_cnt_s cn61xx;
struct cvmx_iob_outb_fpa_pri_cnt_s cn63xx;
struct cvmx_iob_outb_fpa_pri_cnt_s cn63xxp1;
struct cvmx_iob_outb_fpa_pri_cnt_s cn66xx;
struct cvmx_iob_outb_fpa_pri_cnt_s cn68xx;
struct cvmx_iob_outb_fpa_pri_cnt_s cn68xxp1;
struct cvmx_iob_outb_fpa_pri_cnt_s cnf71xx;
};
union cvmx_iob_outb_req_pri_cnt {
@@ -979,21 +675,6 @@ union cvmx_iob_outb_req_pri_cnt {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_iob_outb_req_pri_cnt_s cn38xx;
struct cvmx_iob_outb_req_pri_cnt_s cn38xxp2;
struct cvmx_iob_outb_req_pri_cnt_s cn52xx;
struct cvmx_iob_outb_req_pri_cnt_s cn52xxp1;
struct cvmx_iob_outb_req_pri_cnt_s cn56xx;
struct cvmx_iob_outb_req_pri_cnt_s cn56xxp1;
struct cvmx_iob_outb_req_pri_cnt_s cn58xx;
struct cvmx_iob_outb_req_pri_cnt_s cn58xxp1;
struct cvmx_iob_outb_req_pri_cnt_s cn61xx;
struct cvmx_iob_outb_req_pri_cnt_s cn63xx;
struct cvmx_iob_outb_req_pri_cnt_s cn63xxp1;
struct cvmx_iob_outb_req_pri_cnt_s cn66xx;
struct cvmx_iob_outb_req_pri_cnt_s cn68xx;
struct cvmx_iob_outb_req_pri_cnt_s cn68xxp1;
struct cvmx_iob_outb_req_pri_cnt_s cnf71xx;
};
union cvmx_iob_p2c_req_pri_cnt {
@@ -1009,19 +690,6 @@ union cvmx_iob_p2c_req_pri_cnt {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_iob_p2c_req_pri_cnt_s cn38xx;
struct cvmx_iob_p2c_req_pri_cnt_s cn38xxp2;
struct cvmx_iob_p2c_req_pri_cnt_s cn52xx;
struct cvmx_iob_p2c_req_pri_cnt_s cn52xxp1;
struct cvmx_iob_p2c_req_pri_cnt_s cn56xx;
struct cvmx_iob_p2c_req_pri_cnt_s cn56xxp1;
struct cvmx_iob_p2c_req_pri_cnt_s cn58xx;
struct cvmx_iob_p2c_req_pri_cnt_s cn58xxp1;
struct cvmx_iob_p2c_req_pri_cnt_s cn61xx;
struct cvmx_iob_p2c_req_pri_cnt_s cn63xx;
struct cvmx_iob_p2c_req_pri_cnt_s cn63xxp1;
struct cvmx_iob_p2c_req_pri_cnt_s cn66xx;
struct cvmx_iob_p2c_req_pri_cnt_s cnf71xx;
};
union cvmx_iob_pkt_err {
@@ -1046,21 +714,6 @@ union cvmx_iob_pkt_err {
uint64_t reserved_6_63:58;
#endif
} cn30xx;
struct cvmx_iob_pkt_err_cn30xx cn31xx;
struct cvmx_iob_pkt_err_cn30xx cn38xx;
struct cvmx_iob_pkt_err_cn30xx cn38xxp2;
struct cvmx_iob_pkt_err_cn30xx cn50xx;
struct cvmx_iob_pkt_err_cn30xx cn52xx;
struct cvmx_iob_pkt_err_cn30xx cn52xxp1;
struct cvmx_iob_pkt_err_cn30xx cn56xx;
struct cvmx_iob_pkt_err_cn30xx cn56xxp1;
struct cvmx_iob_pkt_err_cn30xx cn58xx;
struct cvmx_iob_pkt_err_cn30xx cn58xxp1;
struct cvmx_iob_pkt_err_s cn61xx;
struct cvmx_iob_pkt_err_s cn63xx;
struct cvmx_iob_pkt_err_s cn63xxp1;
struct cvmx_iob_pkt_err_s cn66xx;
struct cvmx_iob_pkt_err_s cnf71xx;
};
union cvmx_iob_to_cmb_credits {
@@ -1089,10 +742,6 @@ union cvmx_iob_to_cmb_credits {
uint64_t reserved_9_63:55;
#endif
} cn52xx;
struct cvmx_iob_to_cmb_credits_cn52xx cn61xx;
struct cvmx_iob_to_cmb_credits_cn52xx cn63xx;
struct cvmx_iob_to_cmb_credits_cn52xx cn63xxp1;
struct cvmx_iob_to_cmb_credits_cn52xx cn66xx;
struct cvmx_iob_to_cmb_credits_cn68xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_9_63:55;
@@ -1106,8 +755,6 @@ union cvmx_iob_to_cmb_credits {
uint64_t reserved_9_63:55;
#endif
} cn68xx;
struct cvmx_iob_to_cmb_credits_cn68xx cn68xxp1;
struct cvmx_iob_to_cmb_credits_cn52xx cnf71xx;
};
union cvmx_iob_to_ncb_did_00_credits {
@@ -1121,8 +768,6 @@ union cvmx_iob_to_ncb_did_00_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_00_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_00_credits_s cn68xxp1;
};
union cvmx_iob_to_ncb_did_111_credits {
@@ -1136,8 +781,6 @@ union cvmx_iob_to_ncb_did_111_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_111_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_111_credits_s cn68xxp1;
};
union cvmx_iob_to_ncb_did_223_credits {
@@ -1151,8 +794,6 @@ union cvmx_iob_to_ncb_did_223_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_223_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_223_credits_s cn68xxp1;
};
union cvmx_iob_to_ncb_did_24_credits {
@@ -1166,8 +807,6 @@ union cvmx_iob_to_ncb_did_24_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_24_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_24_credits_s cn68xxp1;
};
union cvmx_iob_to_ncb_did_32_credits {
@@ -1181,8 +820,6 @@ union cvmx_iob_to_ncb_did_32_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_32_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_32_credits_s cn68xxp1;
};
union cvmx_iob_to_ncb_did_40_credits {
@@ -1196,8 +833,6 @@ union cvmx_iob_to_ncb_did_40_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_40_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_40_credits_s cn68xxp1;
};
union cvmx_iob_to_ncb_did_55_credits {
@@ -1211,8 +846,6 @@ union cvmx_iob_to_ncb_did_55_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_55_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_55_credits_s cn68xxp1;
};
union cvmx_iob_to_ncb_did_64_credits {
@@ -1226,8 +859,6 @@ union cvmx_iob_to_ncb_did_64_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_64_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_64_credits_s cn68xxp1;
};
union cvmx_iob_to_ncb_did_79_credits {
@@ -1241,8 +872,6 @@ union cvmx_iob_to_ncb_did_79_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_79_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_79_credits_s cn68xxp1;
};
union cvmx_iob_to_ncb_did_96_credits {
@@ -1256,8 +885,6 @@ union cvmx_iob_to_ncb_did_96_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_96_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_96_credits_s cn68xxp1;
};
union cvmx_iob_to_ncb_did_98_credits {
@@ -1271,8 +898,6 @@ union cvmx_iob_to_ncb_did_98_credits {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_iob_to_ncb_did_98_credits_s cn68xx;
struct cvmx_iob_to_ncb_did_98_credits_s cn68xxp1;
};
#endif

538
arch/mips/include/asm/octeon/cvmx-ipd-defs.h
View File

@@ -108,24 +108,6 @@ union cvmx_ipd_1st_mbuff_skip {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_ipd_1st_mbuff_skip_s cn30xx;
struct cvmx_ipd_1st_mbuff_skip_s cn31xx;
struct cvmx_ipd_1st_mbuff_skip_s cn38xx;
struct cvmx_ipd_1st_mbuff_skip_s cn38xxp2;
struct cvmx_ipd_1st_mbuff_skip_s cn50xx;
struct cvmx_ipd_1st_mbuff_skip_s cn52xx;
struct cvmx_ipd_1st_mbuff_skip_s cn52xxp1;
struct cvmx_ipd_1st_mbuff_skip_s cn56xx;
struct cvmx_ipd_1st_mbuff_skip_s cn56xxp1;
struct cvmx_ipd_1st_mbuff_skip_s cn58xx;
struct cvmx_ipd_1st_mbuff_skip_s cn58xxp1;
struct cvmx_ipd_1st_mbuff_skip_s cn61xx;
struct cvmx_ipd_1st_mbuff_skip_s cn63xx;
struct cvmx_ipd_1st_mbuff_skip_s cn63xxp1;
struct cvmx_ipd_1st_mbuff_skip_s cn66xx;
struct cvmx_ipd_1st_mbuff_skip_s cn68xx;
struct cvmx_ipd_1st_mbuff_skip_s cn68xxp1;
struct cvmx_ipd_1st_mbuff_skip_s cnf71xx;
};
union cvmx_ipd_1st_next_ptr_back {
@@ -139,24 +121,6 @@ union cvmx_ipd_1st_next_ptr_back {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_ipd_1st_next_ptr_back_s cn30xx;
struct cvmx_ipd_1st_next_ptr_back_s cn31xx;
struct cvmx_ipd_1st_next_ptr_back_s cn38xx;
struct cvmx_ipd_1st_next_ptr_back_s cn38xxp2;
struct cvmx_ipd_1st_next_ptr_back_s cn50xx;
struct cvmx_ipd_1st_next_ptr_back_s cn52xx;
struct cvmx_ipd_1st_next_ptr_back_s cn52xxp1;
struct cvmx_ipd_1st_next_ptr_back_s cn56xx;
struct cvmx_ipd_1st_next_ptr_back_s cn56xxp1;
struct cvmx_ipd_1st_next_ptr_back_s cn58xx;
struct cvmx_ipd_1st_next_ptr_back_s cn58xxp1;
struct cvmx_ipd_1st_next_ptr_back_s cn61xx;
struct cvmx_ipd_1st_next_ptr_back_s cn63xx;
struct cvmx_ipd_1st_next_ptr_back_s cn63xxp1;
struct cvmx_ipd_1st_next_ptr_back_s cn66xx;
struct cvmx_ipd_1st_next_ptr_back_s cn68xx;
struct cvmx_ipd_1st_next_ptr_back_s cn68xxp1;
struct cvmx_ipd_1st_next_ptr_back_s cnf71xx;
};
union cvmx_ipd_2nd_next_ptr_back {
@@ -170,24 +134,6 @@ union cvmx_ipd_2nd_next_ptr_back {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_ipd_2nd_next_ptr_back_s cn30xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn31xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn38xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn38xxp2;
struct cvmx_ipd_2nd_next_ptr_back_s cn50xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn52xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn52xxp1;
struct cvmx_ipd_2nd_next_ptr_back_s cn56xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn56xxp1;
struct cvmx_ipd_2nd_next_ptr_back_s cn58xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn58xxp1;
struct cvmx_ipd_2nd_next_ptr_back_s cn61xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn63xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn63xxp1;
struct cvmx_ipd_2nd_next_ptr_back_s cn66xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn68xx;
struct cvmx_ipd_2nd_next_ptr_back_s cn68xxp1;
struct cvmx_ipd_2nd_next_ptr_back_s cnf71xx;
};
union cvmx_ipd_bist_status {
@@ -284,10 +230,6 @@ union cvmx_ipd_bist_status {
uint64_t reserved_16_63:48;
#endif
} cn30xx;
struct cvmx_ipd_bist_status_cn30xx cn31xx;
struct cvmx_ipd_bist_status_cn30xx cn38xx;
struct cvmx_ipd_bist_status_cn30xx cn38xxp2;
struct cvmx_ipd_bist_status_cn30xx cn50xx;
struct cvmx_ipd_bist_status_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_18_63:46;
@@ -331,18 +273,6 @@ union cvmx_ipd_bist_status {
uint64_t reserved_18_63:46;
#endif
} cn52xx;
struct cvmx_ipd_bist_status_cn52xx cn52xxp1;
struct cvmx_ipd_bist_status_cn52xx cn56xx;
struct cvmx_ipd_bist_status_cn52xx cn56xxp1;
struct cvmx_ipd_bist_status_cn30xx cn58xx;
struct cvmx_ipd_bist_status_cn30xx cn58xxp1;
struct cvmx_ipd_bist_status_cn52xx cn61xx;
struct cvmx_ipd_bist_status_cn52xx cn63xx;
struct cvmx_ipd_bist_status_cn52xx cn63xxp1;
struct cvmx_ipd_bist_status_cn52xx cn66xx;
struct cvmx_ipd_bist_status_s cn68xx;
struct cvmx_ipd_bist_status_s cn68xxp1;
struct cvmx_ipd_bist_status_cn52xx cnf71xx;
};
union cvmx_ipd_bp_prt_red_end {
@@ -365,10 +295,6 @@ union cvmx_ipd_bp_prt_red_end {
uint64_t reserved_36_63:28;
#endif
} cn30xx;
struct cvmx_ipd_bp_prt_red_end_cn30xx cn31xx;
struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xx;
struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xxp2;
struct cvmx_ipd_bp_prt_red_end_cn30xx cn50xx;
struct cvmx_ipd_bp_prt_red_end_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_40_63:24;
@@ -378,12 +304,6 @@ union cvmx_ipd_bp_prt_red_end {
uint64_t reserved_40_63:24;
#endif
} cn52xx;
struct cvmx_ipd_bp_prt_red_end_cn52xx cn52xxp1;
struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xx;
struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xxp1;
struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xx;
struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xxp1;
struct cvmx_ipd_bp_prt_red_end_s cn61xx;
struct cvmx_ipd_bp_prt_red_end_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_44_63:20;
@@ -393,9 +313,6 @@ union cvmx_ipd_bp_prt_red_end {
uint64_t reserved_44_63:20;
#endif
} cn63xx;
struct cvmx_ipd_bp_prt_red_end_cn63xx cn63xxp1;
struct cvmx_ipd_bp_prt_red_end_s cn66xx;
struct cvmx_ipd_bp_prt_red_end_s cnf71xx;
};
union cvmx_ipd_bpidx_mbuf_th {
@@ -411,8 +328,6 @@ union cvmx_ipd_bpidx_mbuf_th {
uint64_t reserved_18_63:46;
#endif
} s;
struct cvmx_ipd_bpidx_mbuf_th_s cn68xx;
struct cvmx_ipd_bpidx_mbuf_th_s cn68xxp1;
};
union cvmx_ipd_bpid_bp_counterx {
@@ -426,8 +341,6 @@ union cvmx_ipd_bpid_bp_counterx {
uint64_t reserved_25_63:39;
#endif
} s;
struct cvmx_ipd_bpid_bp_counterx_s cn68xx;
struct cvmx_ipd_bpid_bp_counterx_s cn68xxp1;
};
union cvmx_ipd_clk_count {
@@ -439,24 +352,6 @@ union cvmx_ipd_clk_count {
uint64_t clk_cnt:64;
#endif
} s;
struct cvmx_ipd_clk_count_s cn30xx;
struct cvmx_ipd_clk_count_s cn31xx;
struct cvmx_ipd_clk_count_s cn38xx;
struct cvmx_ipd_clk_count_s cn38xxp2;
struct cvmx_ipd_clk_count_s cn50xx;
struct cvmx_ipd_clk_count_s cn52xx;
struct cvmx_ipd_clk_count_s cn52xxp1;
struct cvmx_ipd_clk_count_s cn56xx;
struct cvmx_ipd_clk_count_s cn56xxp1;
struct cvmx_ipd_clk_count_s cn58xx;
struct cvmx_ipd_clk_count_s cn58xxp1;
struct cvmx_ipd_clk_count_s cn61xx;
struct cvmx_ipd_clk_count_s cn63xx;
struct cvmx_ipd_clk_count_s cn63xxp1;
struct cvmx_ipd_clk_count_s cn66xx;
struct cvmx_ipd_clk_count_s cn68xx;
struct cvmx_ipd_clk_count_s cn68xxp1;
struct cvmx_ipd_clk_count_s cnf71xx;
};
union cvmx_ipd_credits {
@@ -472,8 +367,6 @@ union cvmx_ipd_credits {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_ipd_credits_s cn68xx;
struct cvmx_ipd_credits_s cn68xxp1;
};
union cvmx_ipd_ctl_status {
@@ -544,8 +437,6 @@ union cvmx_ipd_ctl_status {
uint64_t reserved_10_63:54;
#endif
} cn30xx;
struct cvmx_ipd_ctl_status_cn30xx cn31xx;
struct cvmx_ipd_ctl_status_cn30xx cn38xx;
struct cvmx_ipd_ctl_status_cn38xxp2 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_9_63:55;
@@ -604,10 +495,6 @@ union cvmx_ipd_ctl_status {
uint64_t reserved_15_63:49;
#endif
} cn50xx;
struct cvmx_ipd_ctl_status_cn50xx cn52xx;
struct cvmx_ipd_ctl_status_cn50xx cn52xxp1;
struct cvmx_ipd_ctl_status_cn50xx cn56xx;
struct cvmx_ipd_ctl_status_cn50xx cn56xxp1;
struct cvmx_ipd_ctl_status_cn58xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_12_63:52;
@@ -637,9 +524,6 @@ union cvmx_ipd_ctl_status {
uint64_t reserved_12_63:52;
#endif
} cn58xx;
struct cvmx_ipd_ctl_status_cn58xx cn58xxp1;
struct cvmx_ipd_ctl_status_s cn61xx;
struct cvmx_ipd_ctl_status_s cn63xx;
struct cvmx_ipd_ctl_status_cn63xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_16_63:48;
@@ -677,10 +561,6 @@ union cvmx_ipd_ctl_status {
uint64_t reserved_16_63:48;
#endif
} cn63xxp1;
struct cvmx_ipd_ctl_status_s cn66xx;
struct cvmx_ipd_ctl_status_s cn68xx;
struct cvmx_ipd_ctl_status_s cn68xxp1;
struct cvmx_ipd_ctl_status_s cnf71xx;
};
union cvmx_ipd_ecc_ctl {
@@ -700,8 +580,6 @@ union cvmx_ipd_ecc_ctl {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_ipd_ecc_ctl_s cn68xx;
struct cvmx_ipd_ecc_ctl_s cn68xxp1;
};
union cvmx_ipd_free_ptr_fifo_ctl {
@@ -723,8 +601,6 @@ union cvmx_ipd_free_ptr_fifo_ctl {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xx;
struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xxp1;
};
union cvmx_ipd_free_ptr_value {
@@ -738,8 +614,6 @@ union cvmx_ipd_free_ptr_value {
uint64_t reserved_33_63:31;
#endif
} s;
struct cvmx_ipd_free_ptr_value_s cn68xx;
struct cvmx_ipd_free_ptr_value_s cn68xxp1;
};
union cvmx_ipd_hold_ptr_fifo_ctl {
@@ -761,8 +635,6 @@ union cvmx_ipd_hold_ptr_fifo_ctl {
uint64_t reserved_43_63:21;
#endif
} s;
struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xx;
struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xxp1;
};
union cvmx_ipd_int_enb {
@@ -837,7 +709,6 @@ union cvmx_ipd_int_enb {
uint64_t reserved_5_63:59;
#endif
} cn30xx;
struct cvmx_ipd_int_enb_cn30xx cn31xx;
struct cvmx_ipd_int_enb_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_10_63:54;
@@ -865,8 +736,6 @@ union cvmx_ipd_int_enb {
uint64_t reserved_10_63:54;
#endif
} cn38xx;
struct cvmx_ipd_int_enb_cn30xx cn38xxp2;
struct cvmx_ipd_int_enb_cn38xx cn50xx;
struct cvmx_ipd_int_enb_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_12_63:52;
@@ -898,18 +767,6 @@ union cvmx_ipd_int_enb {
uint64_t reserved_12_63:52;
#endif
} cn52xx;
struct cvmx_ipd_int_enb_cn52xx cn52xxp1;
struct cvmx_ipd_int_enb_cn52xx cn56xx;
struct cvmx_ipd_int_enb_cn52xx cn56xxp1;
struct cvmx_ipd_int_enb_cn38xx cn58xx;
struct cvmx_ipd_int_enb_cn38xx cn58xxp1;
struct cvmx_ipd_int_enb_cn52xx cn61xx;
struct cvmx_ipd_int_enb_cn52xx cn63xx;
struct cvmx_ipd_int_enb_cn52xx cn63xxp1;
struct cvmx_ipd_int_enb_cn52xx cn66xx;
struct cvmx_ipd_int_enb_s cn68xx;
struct cvmx_ipd_int_enb_s cn68xxp1;
struct cvmx_ipd_int_enb_cn52xx cnf71xx;
};
union cvmx_ipd_int_sum {
@@ -984,7 +841,6 @@ union cvmx_ipd_int_sum {
uint64_t reserved_5_63:59;
#endif
} cn30xx;
struct cvmx_ipd_int_sum_cn30xx cn31xx;
struct cvmx_ipd_int_sum_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_10_63:54;
@@ -1012,8 +868,6 @@ union cvmx_ipd_int_sum {
uint64_t reserved_10_63:54;
#endif
} cn38xx;
struct cvmx_ipd_int_sum_cn30xx cn38xxp2;
struct cvmx_ipd_int_sum_cn38xx cn50xx;
struct cvmx_ipd_int_sum_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_12_63:52;
@@ -1045,18 +899,6 @@ union cvmx_ipd_int_sum {
uint64_t reserved_12_63:52;
#endif
} cn52xx;
struct cvmx_ipd_int_sum_cn52xx cn52xxp1;
struct cvmx_ipd_int_sum_cn52xx cn56xx;
struct cvmx_ipd_int_sum_cn52xx cn56xxp1;
struct cvmx_ipd_int_sum_cn38xx cn58xx;
struct cvmx_ipd_int_sum_cn38xx cn58xxp1;
struct cvmx_ipd_int_sum_cn52xx cn61xx;
struct cvmx_ipd_int_sum_cn52xx cn63xx;
struct cvmx_ipd_int_sum_cn52xx cn63xxp1;
struct cvmx_ipd_int_sum_cn52xx cn66xx;
struct cvmx_ipd_int_sum_s cn68xx;
struct cvmx_ipd_int_sum_s cn68xxp1;
struct cvmx_ipd_int_sum_cn52xx cnf71xx;
};
union cvmx_ipd_next_pkt_ptr {
@@ -1070,8 +912,6 @@ union cvmx_ipd_next_pkt_ptr {
uint64_t reserved_33_63:31;
#endif
} s;
struct cvmx_ipd_next_pkt_ptr_s cn68xx;
struct cvmx_ipd_next_pkt_ptr_s cn68xxp1;
};
union cvmx_ipd_next_wqe_ptr {
@@ -1085,8 +925,6 @@ union cvmx_ipd_next_wqe_ptr {
uint64_t reserved_33_63:31;
#endif
} s;
struct cvmx_ipd_next_wqe_ptr_s cn68xx;
struct cvmx_ipd_next_wqe_ptr_s cn68xxp1;
};
union cvmx_ipd_not_1st_mbuff_skip {
@@ -1100,24 +938,6 @@ union cvmx_ipd_not_1st_mbuff_skip {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_ipd_not_1st_mbuff_skip_s cn30xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn31xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn38xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn38xxp2;
struct cvmx_ipd_not_1st_mbuff_skip_s cn50xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn52xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn52xxp1;
struct cvmx_ipd_not_1st_mbuff_skip_s cn56xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn56xxp1;
struct cvmx_ipd_not_1st_mbuff_skip_s cn58xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn58xxp1;
struct cvmx_ipd_not_1st_mbuff_skip_s cn61xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn63xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn63xxp1;
struct cvmx_ipd_not_1st_mbuff_skip_s cn66xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn68xx;
struct cvmx_ipd_not_1st_mbuff_skip_s cn68xxp1;
struct cvmx_ipd_not_1st_mbuff_skip_s cnf71xx;
};
union cvmx_ipd_on_bp_drop_pktx {
@@ -1129,8 +949,6 @@ union cvmx_ipd_on_bp_drop_pktx {
uint64_t prt_enb:64;
#endif
} s;
struct cvmx_ipd_on_bp_drop_pktx_s cn68xx;
struct cvmx_ipd_on_bp_drop_pktx_s cn68xxp1;
};
union cvmx_ipd_packet_mbuff_size {
@@ -1144,24 +962,6 @@ union cvmx_ipd_packet_mbuff_size {
uint64_t reserved_12_63:52;
#endif
} s;
struct cvmx_ipd_packet_mbuff_size_s cn30xx;
struct cvmx_ipd_packet_mbuff_size_s cn31xx;
struct cvmx_ipd_packet_mbuff_size_s cn38xx;
struct cvmx_ipd_packet_mbuff_size_s cn38xxp2;
struct cvmx_ipd_packet_mbuff_size_s cn50xx;
struct cvmx_ipd_packet_mbuff_size_s cn52xx;
struct cvmx_ipd_packet_mbuff_size_s cn52xxp1;
struct cvmx_ipd_packet_mbuff_size_s cn56xx;
struct cvmx_ipd_packet_mbuff_size_s cn56xxp1;
struct cvmx_ipd_packet_mbuff_size_s cn58xx;
struct cvmx_ipd_packet_mbuff_size_s cn58xxp1;
struct cvmx_ipd_packet_mbuff_size_s cn61xx;
struct cvmx_ipd_packet_mbuff_size_s cn63xx;
struct cvmx_ipd_packet_mbuff_size_s cn63xxp1;
struct cvmx_ipd_packet_mbuff_size_s cn66xx;
struct cvmx_ipd_packet_mbuff_size_s cn68xx;
struct cvmx_ipd_packet_mbuff_size_s cn68xxp1;
struct cvmx_ipd_packet_mbuff_size_s cnf71xx;
};
union cvmx_ipd_pkt_err {
@@ -1175,8 +975,6 @@ union cvmx_ipd_pkt_err {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_ipd_pkt_err_s cn68xx;
struct cvmx_ipd_pkt_err_s cn68xxp1;
};
union cvmx_ipd_pkt_ptr_valid {
@@ -1190,21 +988,6 @@ union cvmx_ipd_pkt_ptr_valid {
uint64_t reserved_29_63:35;
#endif
} s;
struct cvmx_ipd_pkt_ptr_valid_s cn30xx;
struct cvmx_ipd_pkt_ptr_valid_s cn31xx;
struct cvmx_ipd_pkt_ptr_valid_s cn38xx;
struct cvmx_ipd_pkt_ptr_valid_s cn50xx;
struct cvmx_ipd_pkt_ptr_valid_s cn52xx;
struct cvmx_ipd_pkt_ptr_valid_s cn52xxp1;
struct cvmx_ipd_pkt_ptr_valid_s cn56xx;
struct cvmx_ipd_pkt_ptr_valid_s cn56xxp1;
struct cvmx_ipd_pkt_ptr_valid_s cn58xx;
struct cvmx_ipd_pkt_ptr_valid_s cn58xxp1;
struct cvmx_ipd_pkt_ptr_valid_s cn61xx;
struct cvmx_ipd_pkt_ptr_valid_s cn63xx;
struct cvmx_ipd_pkt_ptr_valid_s cn63xxp1;
struct cvmx_ipd_pkt_ptr_valid_s cn66xx;
struct cvmx_ipd_pkt_ptr_valid_s cnf71xx;
};
union cvmx_ipd_portx_bp_page_cnt {
@@ -1220,22 +1003,6 @@ union cvmx_ipd_portx_bp_page_cnt {
uint64_t reserved_18_63:46;
#endif
} s;
struct cvmx_ipd_portx_bp_page_cnt_s cn30xx;
struct cvmx_ipd_portx_bp_page_cnt_s cn31xx;
struct cvmx_ipd_portx_bp_page_cnt_s cn38xx;
struct cvmx_ipd_portx_bp_page_cnt_s cn38xxp2;
struct cvmx_ipd_portx_bp_page_cnt_s cn50xx;
struct cvmx_ipd_portx_bp_page_cnt_s cn52xx;
struct cvmx_ipd_portx_bp_page_cnt_s cn52xxp1;
struct cvmx_ipd_portx_bp_page_cnt_s cn56xx;
struct cvmx_ipd_portx_bp_page_cnt_s cn56xxp1;
struct cvmx_ipd_portx_bp_page_cnt_s cn58xx;
struct cvmx_ipd_portx_bp_page_cnt_s cn58xxp1;
struct cvmx_ipd_portx_bp_page_cnt_s cn61xx;
struct cvmx_ipd_portx_bp_page_cnt_s cn63xx;
struct cvmx_ipd_portx_bp_page_cnt_s cn63xxp1;
struct cvmx_ipd_portx_bp_page_cnt_s cn66xx;
struct cvmx_ipd_portx_bp_page_cnt_s cnf71xx;
};
union cvmx_ipd_portx_bp_page_cnt2 {
@@ -1251,15 +1018,6 @@ union cvmx_ipd_portx_bp_page_cnt2 {
uint64_t reserved_18_63:46;
#endif
} s;
struct cvmx_ipd_portx_bp_page_cnt2_s cn52xx;
struct cvmx_ipd_portx_bp_page_cnt2_s cn52xxp1;
struct cvmx_ipd_portx_bp_page_cnt2_s cn56xx;
struct cvmx_ipd_portx_bp_page_cnt2_s cn56xxp1;
struct cvmx_ipd_portx_bp_page_cnt2_s cn61xx;
struct cvmx_ipd_portx_bp_page_cnt2_s cn63xx;
struct cvmx_ipd_portx_bp_page_cnt2_s cn63xxp1;
struct cvmx_ipd_portx_bp_page_cnt2_s cn66xx;
struct cvmx_ipd_portx_bp_page_cnt2_s cnf71xx;
};
union cvmx_ipd_portx_bp_page_cnt3 {
@@ -1275,11 +1033,6 @@ union cvmx_ipd_portx_bp_page_cnt3 {
uint64_t reserved_18_63:46;
#endif
} s;
struct cvmx_ipd_portx_bp_page_cnt3_s cn61xx;
struct cvmx_ipd_portx_bp_page_cnt3_s cn63xx;
struct cvmx_ipd_portx_bp_page_cnt3_s cn63xxp1;
struct cvmx_ipd_portx_bp_page_cnt3_s cn66xx;
struct cvmx_ipd_portx_bp_page_cnt3_s cnf71xx;
};
union cvmx_ipd_port_bp_counters2_pairx {
@@ -1293,15 +1046,6 @@ union cvmx_ipd_port_bp_counters2_pairx {
uint64_t reserved_25_63:39;
#endif
} s;
struct cvmx_ipd_port_bp_counters2_pairx_s cn52xx;
struct cvmx_ipd_port_bp_counters2_pairx_s cn52xxp1;
struct cvmx_ipd_port_bp_counters2_pairx_s cn56xx;
struct cvmx_ipd_port_bp_counters2_pairx_s cn56xxp1;
struct cvmx_ipd_port_bp_counters2_pairx_s cn61xx;
struct cvmx_ipd_port_bp_counters2_pairx_s cn63xx;
struct cvmx_ipd_port_bp_counters2_pairx_s cn63xxp1;
struct cvmx_ipd_port_bp_counters2_pairx_s cn66xx;
struct cvmx_ipd_port_bp_counters2_pairx_s cnf71xx;
};
union cvmx_ipd_port_bp_counters3_pairx {
@@ -1315,11 +1059,6 @@ union cvmx_ipd_port_bp_counters3_pairx {
uint64_t reserved_25_63:39;
#endif
} s;
struct cvmx_ipd_port_bp_counters3_pairx_s cn61xx;
struct cvmx_ipd_port_bp_counters3_pairx_s cn63xx;
struct cvmx_ipd_port_bp_counters3_pairx_s cn63xxp1;
struct cvmx_ipd_port_bp_counters3_pairx_s cn66xx;
struct cvmx_ipd_port_bp_counters3_pairx_s cnf71xx;
};
union cvmx_ipd_port_bp_counters4_pairx {
@@ -1333,9 +1072,6 @@ union cvmx_ipd_port_bp_counters4_pairx {
uint64_t reserved_25_63:39;
#endif
} s;
struct cvmx_ipd_port_bp_counters4_pairx_s cn61xx;
struct cvmx_ipd_port_bp_counters4_pairx_s cn66xx;
struct cvmx_ipd_port_bp_counters4_pairx_s cnf71xx;
};
union cvmx_ipd_port_bp_counters_pairx {
@@ -1349,22 +1085,6 @@ union cvmx_ipd_port_bp_counters_pairx {
uint64_t reserved_25_63:39;
#endif
} s;
struct cvmx_ipd_port_bp_counters_pairx_s cn30xx;
struct cvmx_ipd_port_bp_counters_pairx_s cn31xx;
struct cvmx_ipd_port_bp_counters_pairx_s cn38xx;
struct cvmx_ipd_port_bp_counters_pairx_s cn38xxp2;
struct cvmx_ipd_port_bp_counters_pairx_s cn50xx;
struct cvmx_ipd_port_bp_counters_pairx_s cn52xx;
struct cvmx_ipd_port_bp_counters_pairx_s cn52xxp1;
struct cvmx_ipd_port_bp_counters_pairx_s cn56xx;
struct cvmx_ipd_port_bp_counters_pairx_s cn56xxp1;
struct cvmx_ipd_port_bp_counters_pairx_s cn58xx;
struct cvmx_ipd_port_bp_counters_pairx_s cn58xxp1;
struct cvmx_ipd_port_bp_counters_pairx_s cn61xx;
struct cvmx_ipd_port_bp_counters_pairx_s cn63xx;
struct cvmx_ipd_port_bp_counters_pairx_s cn63xxp1;
struct cvmx_ipd_port_bp_counters_pairx_s cn66xx;
struct cvmx_ipd_port_bp_counters_pairx_s cnf71xx;
};
union cvmx_ipd_port_ptr_fifo_ctl {
@@ -1384,8 +1104,6 @@ union cvmx_ipd_port_ptr_fifo_ctl {
uint64_t reserved_48_63:16;
#endif
} s;
struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xx;
struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xxp1;
};
union cvmx_ipd_port_qos_x_cnt {
@@ -1399,17 +1117,6 @@ union cvmx_ipd_port_qos_x_cnt {
uint64_t wmark:32;
#endif
} s;
struct cvmx_ipd_port_qos_x_cnt_s cn52xx;
struct cvmx_ipd_port_qos_x_cnt_s cn52xxp1;
struct cvmx_ipd_port_qos_x_cnt_s cn56xx;
struct cvmx_ipd_port_qos_x_cnt_s cn56xxp1;
struct cvmx_ipd_port_qos_x_cnt_s cn61xx;
struct cvmx_ipd_port_qos_x_cnt_s cn63xx;
struct cvmx_ipd_port_qos_x_cnt_s cn63xxp1;
struct cvmx_ipd_port_qos_x_cnt_s cn66xx;
struct cvmx_ipd_port_qos_x_cnt_s cn68xx;
struct cvmx_ipd_port_qos_x_cnt_s cn68xxp1;
struct cvmx_ipd_port_qos_x_cnt_s cnf71xx;
};
union cvmx_ipd_port_qos_intx {
@@ -1421,17 +1128,6 @@ union cvmx_ipd_port_qos_intx {
uint64_t intr:64;
#endif
} s;
struct cvmx_ipd_port_qos_intx_s cn52xx;
struct cvmx_ipd_port_qos_intx_s cn52xxp1;
struct cvmx_ipd_port_qos_intx_s cn56xx;
struct cvmx_ipd_port_qos_intx_s cn56xxp1;
struct cvmx_ipd_port_qos_intx_s cn61xx;
struct cvmx_ipd_port_qos_intx_s cn63xx;
struct cvmx_ipd_port_qos_intx_s cn63xxp1;
struct cvmx_ipd_port_qos_intx_s cn66xx;
struct cvmx_ipd_port_qos_intx_s cn68xx;
struct cvmx_ipd_port_qos_intx_s cn68xxp1;
struct cvmx_ipd_port_qos_intx_s cnf71xx;
};
union cvmx_ipd_port_qos_int_enbx {
@@ -1443,17 +1139,6 @@ union cvmx_ipd_port_qos_int_enbx {
uint64_t enb:64;
#endif
} s;
struct cvmx_ipd_port_qos_int_enbx_s cn52xx;
struct cvmx_ipd_port_qos_int_enbx_s cn52xxp1;
struct cvmx_ipd_port_qos_int_enbx_s cn56xx;
struct cvmx_ipd_port_qos_int_enbx_s cn56xxp1;
struct cvmx_ipd_port_qos_int_enbx_s cn61xx;
struct cvmx_ipd_port_qos_int_enbx_s cn63xx;
struct cvmx_ipd_port_qos_int_enbx_s cn63xxp1;
struct cvmx_ipd_port_qos_int_enbx_s cn66xx;
struct cvmx_ipd_port_qos_int_enbx_s cn68xx;
struct cvmx_ipd_port_qos_int_enbx_s cn68xxp1;
struct cvmx_ipd_port_qos_int_enbx_s cnf71xx;
};
union cvmx_ipd_port_sopx {
@@ -1465,8 +1150,6 @@ union cvmx_ipd_port_sopx {
uint64_t sop:64;
#endif
} s;
struct cvmx_ipd_port_sopx_s cn68xx;
struct cvmx_ipd_port_sopx_s cn68xxp1;
};
union cvmx_ipd_prc_hold_ptr_fifo_ctl {
@@ -1488,21 +1171,6 @@ union cvmx_ipd_prc_hold_ptr_fifo_ctl {
uint64_t reserved_39_63:25;
#endif
} s;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn30xx;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn31xx;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn38xx;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn50xx;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xx;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xxp1;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xx;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xxp1;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xx;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xxp1;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn61xx;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xx;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xxp1;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn66xx;
struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cnf71xx;
};
union cvmx_ipd_prc_port_ptr_fifo_ctl {
@@ -1522,21 +1190,6 @@ union cvmx_ipd_prc_port_ptr_fifo_ctl {
uint64_t reserved_44_63:20;
#endif
} s;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn30xx;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn31xx;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn38xx;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn50xx;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xx;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xxp1;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xx;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xxp1;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xx;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xxp1;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn61xx;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xx;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xxp1;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn66xx;
struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cnf71xx;
};
union cvmx_ipd_ptr_count {
@@ -1558,24 +1211,6 @@ union cvmx_ipd_ptr_count {
uint64_t reserved_19_63:45;
#endif
} s;
struct cvmx_ipd_ptr_count_s cn30xx;
struct cvmx_ipd_ptr_count_s cn31xx;
struct cvmx_ipd_ptr_count_s cn38xx;
struct cvmx_ipd_ptr_count_s cn38xxp2;
struct cvmx_ipd_ptr_count_s cn50xx;
struct cvmx_ipd_ptr_count_s cn52xx;
struct cvmx_ipd_ptr_count_s cn52xxp1;
struct cvmx_ipd_ptr_count_s cn56xx;
struct cvmx_ipd_ptr_count_s cn56xxp1;
struct cvmx_ipd_ptr_count_s cn58xx;
struct cvmx_ipd_ptr_count_s cn58xxp1;
struct cvmx_ipd_ptr_count_s cn61xx;
struct cvmx_ipd_ptr_count_s cn63xx;
struct cvmx_ipd_ptr_count_s cn63xxp1;
struct cvmx_ipd_ptr_count_s cn66xx;
struct cvmx_ipd_ptr_count_s cn68xx;
struct cvmx_ipd_ptr_count_s cn68xxp1;
struct cvmx_ipd_ptr_count_s cnf71xx;
};
union cvmx_ipd_pwp_ptr_fifo_ctl {
@@ -1599,21 +1234,6 @@ union cvmx_ipd_pwp_ptr_fifo_ctl {
uint64_t reserved_61_63:3;
#endif
} s;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn30xx;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn31xx;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn38xx;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn50xx;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xx;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xxp1;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xx;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xxp1;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xx;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xxp1;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn61xx;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xx;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xxp1;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn66xx;
struct cvmx_ipd_pwp_ptr_fifo_ctl_s cnf71xx;
};
union cvmx_ipd_qosx_red_marks {
@@ -1627,24 +1247,6 @@ union cvmx_ipd_qosx_red_marks {
uint64_t drop:32;
#endif
} s;
struct cvmx_ipd_qosx_red_marks_s cn30xx;
struct cvmx_ipd_qosx_red_marks_s cn31xx;
struct cvmx_ipd_qosx_red_marks_s cn38xx;
struct cvmx_ipd_qosx_red_marks_s cn38xxp2;
struct cvmx_ipd_qosx_red_marks_s cn50xx;
struct cvmx_ipd_qosx_red_marks_s cn52xx;
struct cvmx_ipd_qosx_red_marks_s cn52xxp1;
struct cvmx_ipd_qosx_red_marks_s cn56xx;
struct cvmx_ipd_qosx_red_marks_s cn56xxp1;
struct cvmx_ipd_qosx_red_marks_s cn58xx;
struct cvmx_ipd_qosx_red_marks_s cn58xxp1;
struct cvmx_ipd_qosx_red_marks_s cn61xx;
struct cvmx_ipd_qosx_red_marks_s cn63xx;
struct cvmx_ipd_qosx_red_marks_s cn63xxp1;
struct cvmx_ipd_qosx_red_marks_s cn66xx;
struct cvmx_ipd_qosx_red_marks_s cn68xx;
struct cvmx_ipd_qosx_red_marks_s cn68xxp1;
struct cvmx_ipd_qosx_red_marks_s cnf71xx;
};
union cvmx_ipd_que0_free_page_cnt {
@@ -1658,24 +1260,6 @@ union cvmx_ipd_que0_free_page_cnt {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_ipd_que0_free_page_cnt_s cn30xx;
struct cvmx_ipd_que0_free_page_cnt_s cn31xx;
struct cvmx_ipd_que0_free_page_cnt_s cn38xx;
struct cvmx_ipd_que0_free_page_cnt_s cn38xxp2;
struct cvmx_ipd_que0_free_page_cnt_s cn50xx;
struct cvmx_ipd_que0_free_page_cnt_s cn52xx;
struct cvmx_ipd_que0_free_page_cnt_s cn52xxp1;
struct cvmx_ipd_que0_free_page_cnt_s cn56xx;
struct cvmx_ipd_que0_free_page_cnt_s cn56xxp1;
struct cvmx_ipd_que0_free_page_cnt_s cn58xx;
struct cvmx_ipd_que0_free_page_cnt_s cn58xxp1;
struct cvmx_ipd_que0_free_page_cnt_s cn61xx;
struct cvmx_ipd_que0_free_page_cnt_s cn63xx;
struct cvmx_ipd_que0_free_page_cnt_s cn63xxp1;
struct cvmx_ipd_que0_free_page_cnt_s cn66xx;
struct cvmx_ipd_que0_free_page_cnt_s cn68xx;
struct cvmx_ipd_que0_free_page_cnt_s cn68xxp1;
struct cvmx_ipd_que0_free_page_cnt_s cnf71xx;
};
union cvmx_ipd_red_bpid_enablex {
@@ -1687,8 +1271,6 @@ union cvmx_ipd_red_bpid_enablex {
uint64_t prt_enb:64;
#endif
} s;
struct cvmx_ipd_red_bpid_enablex_s cn68xx;
struct cvmx_ipd_red_bpid_enablex_s cn68xxp1;
};
union cvmx_ipd_red_delay {
@@ -1704,8 +1286,6 @@ union cvmx_ipd_red_delay {
uint64_t reserved_28_63:36;
#endif
} s;
struct cvmx_ipd_red_delay_s cn68xx;
struct cvmx_ipd_red_delay_s cn68xxp1;
};
union cvmx_ipd_red_port_enable {
@@ -1721,22 +1301,6 @@ union cvmx_ipd_red_port_enable {
uint64_t prb_dly:14;
#endif
} s;
struct cvmx_ipd_red_port_enable_s cn30xx;
struct cvmx_ipd_red_port_enable_s cn31xx;
struct cvmx_ipd_red_port_enable_s cn38xx;
struct cvmx_ipd_red_port_enable_s cn38xxp2;
struct cvmx_ipd_red_port_enable_s cn50xx;
struct cvmx_ipd_red_port_enable_s cn52xx;
struct cvmx_ipd_red_port_enable_s cn52xxp1;
struct cvmx_ipd_red_port_enable_s cn56xx;
struct cvmx_ipd_red_port_enable_s cn56xxp1;
struct cvmx_ipd_red_port_enable_s cn58xx;
struct cvmx_ipd_red_port_enable_s cn58xxp1;
struct cvmx_ipd_red_port_enable_s cn61xx;
struct cvmx_ipd_red_port_enable_s cn63xx;
struct cvmx_ipd_red_port_enable_s cn63xxp1;
struct cvmx_ipd_red_port_enable_s cn66xx;
struct cvmx_ipd_red_port_enable_s cnf71xx;
};
union cvmx_ipd_red_port_enable2 {
@@ -1759,10 +1323,6 @@ union cvmx_ipd_red_port_enable2 {
uint64_t reserved_4_63:60;
#endif
} cn52xx;
struct cvmx_ipd_red_port_enable2_cn52xx cn52xxp1;
struct cvmx_ipd_red_port_enable2_cn52xx cn56xx;
struct cvmx_ipd_red_port_enable2_cn52xx cn56xxp1;
struct cvmx_ipd_red_port_enable2_s cn61xx;
struct cvmx_ipd_red_port_enable2_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_8_63:56;
@@ -1772,9 +1332,6 @@ union cvmx_ipd_red_port_enable2 {
uint64_t reserved_8_63:56;
#endif
} cn63xx;
struct cvmx_ipd_red_port_enable2_cn63xx cn63xxp1;
struct cvmx_ipd_red_port_enable2_s cn66xx;
struct cvmx_ipd_red_port_enable2_s cnf71xx;
};
union cvmx_ipd_red_quex_param {
@@ -1794,24 +1351,6 @@ union cvmx_ipd_red_quex_param {
uint64_t reserved_49_63:15;
#endif
} s;
struct cvmx_ipd_red_quex_param_s cn30xx;
struct cvmx_ipd_red_quex_param_s cn31xx;
struct cvmx_ipd_red_quex_param_s cn38xx;
struct cvmx_ipd_red_quex_param_s cn38xxp2;
struct cvmx_ipd_red_quex_param_s cn50xx;
struct cvmx_ipd_red_quex_param_s cn52xx;
struct cvmx_ipd_red_quex_param_s cn52xxp1;
struct cvmx_ipd_red_quex_param_s cn56xx;
struct cvmx_ipd_red_quex_param_s cn56xxp1;
struct cvmx_ipd_red_quex_param_s cn58xx;
struct cvmx_ipd_red_quex_param_s cn58xxp1;
struct cvmx_ipd_red_quex_param_s cn61xx;
struct cvmx_ipd_red_quex_param_s cn63xx;
struct cvmx_ipd_red_quex_param_s cn63xxp1;
struct cvmx_ipd_red_quex_param_s cn66xx;
struct cvmx_ipd_red_quex_param_s cn68xx;
struct cvmx_ipd_red_quex_param_s cn68xxp1;
struct cvmx_ipd_red_quex_param_s cnf71xx;
};
union cvmx_ipd_req_wgt {
@@ -1837,7 +1376,6 @@ union cvmx_ipd_req_wgt {
uint64_t wgt7:8;
#endif
} s;
struct cvmx_ipd_req_wgt_s cn68xx;
};
union cvmx_ipd_sub_port_bp_page_cnt {
@@ -1853,24 +1391,6 @@ union cvmx_ipd_sub_port_bp_page_cnt {
uint64_t reserved_31_63:33;
#endif
} s;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn30xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn31xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xxp2;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn50xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xxp1;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xxp1;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xxp1;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn61xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xxp1;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn66xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xx;
struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xxp1;
struct cvmx_ipd_sub_port_bp_page_cnt_s cnf71xx;
};
union cvmx_ipd_sub_port_fcs {
@@ -1897,7 +1417,6 @@ union cvmx_ipd_sub_port_fcs {
uint64_t reserved_3_63:61;
#endif
} cn30xx;
struct cvmx_ipd_sub_port_fcs_cn30xx cn31xx;
struct cvmx_ipd_sub_port_fcs_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_32_63:32;
@@ -1907,19 +1426,6 @@ union cvmx_ipd_sub_port_fcs {
uint64_t reserved_32_63:32;
#endif
} cn38xx;
struct cvmx_ipd_sub_port_fcs_cn38xx cn38xxp2;
struct cvmx_ipd_sub_port_fcs_cn30xx cn50xx;
struct cvmx_ipd_sub_port_fcs_s cn52xx;
struct cvmx_ipd_sub_port_fcs_s cn52xxp1;
struct cvmx_ipd_sub_port_fcs_s cn56xx;
struct cvmx_ipd_sub_port_fcs_s cn56xxp1;
struct cvmx_ipd_sub_port_fcs_cn38xx cn58xx;
struct cvmx_ipd_sub_port_fcs_cn38xx cn58xxp1;
struct cvmx_ipd_sub_port_fcs_s cn61xx;
struct cvmx_ipd_sub_port_fcs_s cn63xx;
struct cvmx_ipd_sub_port_fcs_s cn63xxp1;
struct cvmx_ipd_sub_port_fcs_s cn66xx;
struct cvmx_ipd_sub_port_fcs_s cnf71xx;
};
union cvmx_ipd_sub_port_qos_cnt {
@@ -1935,17 +1441,6 @@ union cvmx_ipd_sub_port_qos_cnt {
uint64_t reserved_41_63:23;
#endif
} s;
struct cvmx_ipd_sub_port_qos_cnt_s cn52xx;
struct cvmx_ipd_sub_port_qos_cnt_s cn52xxp1;
struct cvmx_ipd_sub_port_qos_cnt_s cn56xx;
struct cvmx_ipd_sub_port_qos_cnt_s cn56xxp1;
struct cvmx_ipd_sub_port_qos_cnt_s cn61xx;
struct cvmx_ipd_sub_port_qos_cnt_s cn63xx;
struct cvmx_ipd_sub_port_qos_cnt_s cn63xxp1;
struct cvmx_ipd_sub_port_qos_cnt_s cn66xx;
struct cvmx_ipd_sub_port_qos_cnt_s cn68xx;
struct cvmx_ipd_sub_port_qos_cnt_s cn68xxp1;
struct cvmx_ipd_sub_port_qos_cnt_s cnf71xx;
};
union cvmx_ipd_wqe_fpa_queue {
@@ -1959,24 +1454,6 @@ union cvmx_ipd_wqe_fpa_queue {
uint64_t reserved_3_63:61;
#endif
} s;
struct cvmx_ipd_wqe_fpa_queue_s cn30xx;
struct cvmx_ipd_wqe_fpa_queue_s cn31xx;
struct cvmx_ipd_wqe_fpa_queue_s cn38xx;
struct cvmx_ipd_wqe_fpa_queue_s cn38xxp2;
struct cvmx_ipd_wqe_fpa_queue_s cn50xx;
struct cvmx_ipd_wqe_fpa_queue_s cn52xx;
struct cvmx_ipd_wqe_fpa_queue_s cn52xxp1;
struct cvmx_ipd_wqe_fpa_queue_s cn56xx;
struct cvmx_ipd_wqe_fpa_queue_s cn56xxp1;
struct cvmx_ipd_wqe_fpa_queue_s cn58xx;
struct cvmx_ipd_wqe_fpa_queue_s cn58xxp1;
struct cvmx_ipd_wqe_fpa_queue_s cn61xx;
struct cvmx_ipd_wqe_fpa_queue_s cn63xx;
struct cvmx_ipd_wqe_fpa_queue_s cn63xxp1;
struct cvmx_ipd_wqe_fpa_queue_s cn66xx;
struct cvmx_ipd_wqe_fpa_queue_s cn68xx;
struct cvmx_ipd_wqe_fpa_queue_s cn68xxp1;
struct cvmx_ipd_wqe_fpa_queue_s cnf71xx;
};
union cvmx_ipd_wqe_ptr_valid {
@@ -1990,21 +1467,6 @@ union cvmx_ipd_wqe_ptr_valid {
uint64_t reserved_29_63:35;
#endif
} s;
struct cvmx_ipd_wqe_ptr_valid_s cn30xx;
struct cvmx_ipd_wqe_ptr_valid_s cn31xx;
struct cvmx_ipd_wqe_ptr_valid_s cn38xx;
struct cvmx_ipd_wqe_ptr_valid_s cn50xx;
struct cvmx_ipd_wqe_ptr_valid_s cn52xx;
struct cvmx_ipd_wqe_ptr_valid_s cn52xxp1;
struct cvmx_ipd_wqe_ptr_valid_s cn56xx;
struct cvmx_ipd_wqe_ptr_valid_s cn56xxp1;
struct cvmx_ipd_wqe_ptr_valid_s cn58xx;
struct cvmx_ipd_wqe_ptr_valid_s cn58xxp1;
struct cvmx_ipd_wqe_ptr_valid_s cn61xx;
struct cvmx_ipd_wqe_ptr_valid_s cn63xx;
struct cvmx_ipd_wqe_ptr_valid_s cn63xxp1;
struct cvmx_ipd_wqe_ptr_valid_s cn66xx;
struct cvmx_ipd_wqe_ptr_valid_s cnf71xx;
};
#endif

6
arch/mips/include/asm/octeon/cvmx-l2t-defs.h
View File

@@ -104,7 +104,6 @@ union cvmx_l2t_err {
__BITFIELD_FIELD(uint64_t ecc_ena:1,
;)))))))))))))
} cn38xx;
struct cvmx_l2t_err_cn38xx cn38xxp2;
struct cvmx_l2t_err_cn50xx {
__BITFIELD_FIELD(uint64_t reserved_28_63:36,
__BITFIELD_FIELD(uint64_t lck_intena2:1,
@@ -139,11 +138,6 @@ union cvmx_l2t_err {
__BITFIELD_FIELD(uint64_t ecc_ena:1,
;))))))))))))))
} cn52xx;
struct cvmx_l2t_err_cn52xx cn52xxp1;
struct cvmx_l2t_err_s cn56xx;
struct cvmx_l2t_err_s cn56xxp1;
struct cvmx_l2t_err_s cn58xx;
struct cvmx_l2t_err_s cn58xxp1;
};
#endif

78
arch/mips/include/asm/octeon/cvmx-led-defs.h
View File

@@ -53,12 +53,6 @@ union cvmx_led_blink {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_led_blink_s cn38xx;
struct cvmx_led_blink_s cn38xxp2;
struct cvmx_led_blink_s cn56xx;
struct cvmx_led_blink_s cn56xxp1;
struct cvmx_led_blink_s cn58xx;
struct cvmx_led_blink_s cn58xxp1;
};
union cvmx_led_clk_phase {
@@ -72,12 +66,6 @@ union cvmx_led_clk_phase {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_led_clk_phase_s cn38xx;
struct cvmx_led_clk_phase_s cn38xxp2;
struct cvmx_led_clk_phase_s cn56xx;
struct cvmx_led_clk_phase_s cn56xxp1;
struct cvmx_led_clk_phase_s cn58xx;
struct cvmx_led_clk_phase_s cn58xxp1;
};
union cvmx_led_cylon {
@@ -91,12 +79,6 @@ union cvmx_led_cylon {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_led_cylon_s cn38xx;
struct cvmx_led_cylon_s cn38xxp2;
struct cvmx_led_cylon_s cn56xx;
struct cvmx_led_cylon_s cn56xxp1;
struct cvmx_led_cylon_s cn58xx;
struct cvmx_led_cylon_s cn58xxp1;
};
union cvmx_led_dbg {
@@ -110,12 +92,6 @@ union cvmx_led_dbg {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_led_dbg_s cn38xx;
struct cvmx_led_dbg_s cn38xxp2;
struct cvmx_led_dbg_s cn56xx;
struct cvmx_led_dbg_s cn56xxp1;
struct cvmx_led_dbg_s cn58xx;
struct cvmx_led_dbg_s cn58xxp1;
};
union cvmx_led_en {
@@ -129,12 +105,6 @@ union cvmx_led_en {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_led_en_s cn38xx;
struct cvmx_led_en_s cn38xxp2;
struct cvmx_led_en_s cn56xx;
struct cvmx_led_en_s cn56xxp1;
struct cvmx_led_en_s cn58xx;
struct cvmx_led_en_s cn58xxp1;
};
union cvmx_led_polarity {
@@ -148,12 +118,6 @@ union cvmx_led_polarity {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_led_polarity_s cn38xx;
struct cvmx_led_polarity_s cn38xxp2;
struct cvmx_led_polarity_s cn56xx;
struct cvmx_led_polarity_s cn56xxp1;
struct cvmx_led_polarity_s cn58xx;
struct cvmx_led_polarity_s cn58xxp1;
};
union cvmx_led_prt {
@@ -167,12 +131,6 @@ union cvmx_led_prt {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_led_prt_s cn38xx;
struct cvmx_led_prt_s cn38xxp2;
struct cvmx_led_prt_s cn56xx;
struct cvmx_led_prt_s cn56xxp1;
struct cvmx_led_prt_s cn58xx;
struct cvmx_led_prt_s cn58xxp1;
};
union cvmx_led_prt_fmt {
@@ -186,12 +144,6 @@ union cvmx_led_prt_fmt {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_led_prt_fmt_s cn38xx;
struct cvmx_led_prt_fmt_s cn38xxp2;
struct cvmx_led_prt_fmt_s cn56xx;
struct cvmx_led_prt_fmt_s cn56xxp1;
struct cvmx_led_prt_fmt_s cn58xx;
struct cvmx_led_prt_fmt_s cn58xxp1;
};
union cvmx_led_prt_statusx {
@@ -205,12 +157,6 @@ union cvmx_led_prt_statusx {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_led_prt_statusx_s cn38xx;
struct cvmx_led_prt_statusx_s cn38xxp2;
struct cvmx_led_prt_statusx_s cn56xx;
struct cvmx_led_prt_statusx_s cn56xxp1;
struct cvmx_led_prt_statusx_s cn58xx;
struct cvmx_led_prt_statusx_s cn58xxp1;
};
union cvmx_led_udd_cntx {
@@ -224,12 +170,6 @@ union cvmx_led_udd_cntx {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_led_udd_cntx_s cn38xx;
struct cvmx_led_udd_cntx_s cn38xxp2;
struct cvmx_led_udd_cntx_s cn56xx;
struct cvmx_led_udd_cntx_s cn56xxp1;
struct cvmx_led_udd_cntx_s cn58xx;
struct cvmx_led_udd_cntx_s cn58xxp1;
};
union cvmx_led_udd_datx {
@@ -243,12 +183,6 @@ union cvmx_led_udd_datx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_led_udd_datx_s cn38xx;
struct cvmx_led_udd_datx_s cn38xxp2;
struct cvmx_led_udd_datx_s cn56xx;
struct cvmx_led_udd_datx_s cn56xxp1;
struct cvmx_led_udd_datx_s cn58xx;
struct cvmx_led_udd_datx_s cn58xxp1;
};
union cvmx_led_udd_dat_clrx {
@@ -262,12 +196,6 @@ union cvmx_led_udd_dat_clrx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_led_udd_dat_clrx_s cn38xx;
struct cvmx_led_udd_dat_clrx_s cn38xxp2;
struct cvmx_led_udd_dat_clrx_s cn56xx;
struct cvmx_led_udd_dat_clrx_s cn56xxp1;
struct cvmx_led_udd_dat_clrx_s cn58xx;
struct cvmx_led_udd_dat_clrx_s cn58xxp1;
};
union cvmx_led_udd_dat_setx {
@@ -281,12 +209,6 @@ union cvmx_led_udd_dat_setx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_led_udd_dat_setx_s cn38xx;
struct cvmx_led_udd_dat_setx_s cn38xxp2;
struct cvmx_led_udd_dat_setx_s cn56xx;
struct cvmx_led_udd_dat_setx_s cn56xxp1;
struct cvmx_led_udd_dat_setx_s cn58xx;
struct cvmx_led_udd_dat_setx_s cn58xxp1;
};
#endif

514
arch/mips/include/asm/octeon/cvmx-lmcx-defs.h
View File

File diff suppressed because it is too large Load Diff

1197
arch/mips/include/asm/octeon/cvmx-mio-defs.h
View File

File diff suppressed because it is too large Load Diff

136
arch/mips/include/asm/octeon/cvmx-mixx-defs.h
View File

@@ -80,15 +80,6 @@ union cvmx_mixx_bist {
uint64_t reserved_4_63:60;
#endif
} cn52xx;
struct cvmx_mixx_bist_cn52xx cn52xxp1;
struct cvmx_mixx_bist_cn52xx cn56xx;
struct cvmx_mixx_bist_cn52xx cn56xxp1;
struct cvmx_mixx_bist_s cn61xx;
struct cvmx_mixx_bist_s cn63xx;
struct cvmx_mixx_bist_s cn63xxp1;
struct cvmx_mixx_bist_s cn66xx;
struct cvmx_mixx_bist_s cn68xx;
struct cvmx_mixx_bist_s cn68xxp1;
};
union cvmx_mixx_ctl {
@@ -137,15 +128,6 @@ union cvmx_mixx_ctl {
uint64_t reserved_8_63:56;
#endif
} cn52xx;
struct cvmx_mixx_ctl_cn52xx cn52xxp1;
struct cvmx_mixx_ctl_cn52xx cn56xx;
struct cvmx_mixx_ctl_cn52xx cn56xxp1;
struct cvmx_mixx_ctl_s cn61xx;
struct cvmx_mixx_ctl_s cn63xx;
struct cvmx_mixx_ctl_s cn63xxp1;
struct cvmx_mixx_ctl_s cn66xx;
struct cvmx_mixx_ctl_s cn68xx;
struct cvmx_mixx_ctl_s cn68xxp1;
};
union cvmx_mixx_intena {
@@ -194,15 +176,6 @@ union cvmx_mixx_intena {
uint64_t reserved_7_63:57;
#endif
} cn52xx;
struct cvmx_mixx_intena_cn52xx cn52xxp1;
struct cvmx_mixx_intena_cn52xx cn56xx;
struct cvmx_mixx_intena_cn52xx cn56xxp1;
struct cvmx_mixx_intena_s cn61xx;
struct cvmx_mixx_intena_s cn63xx;
struct cvmx_mixx_intena_s cn63xxp1;
struct cvmx_mixx_intena_s cn66xx;
struct cvmx_mixx_intena_s cn68xx;
struct cvmx_mixx_intena_s cn68xxp1;
};
union cvmx_mixx_ircnt {
@@ -216,16 +189,6 @@ union cvmx_mixx_ircnt {
uint64_t reserved_20_63:44;
#endif
} s;
struct cvmx_mixx_ircnt_s cn52xx;
struct cvmx_mixx_ircnt_s cn52xxp1;
struct cvmx_mixx_ircnt_s cn56xx;
struct cvmx_mixx_ircnt_s cn56xxp1;
struct cvmx_mixx_ircnt_s cn61xx;
struct cvmx_mixx_ircnt_s cn63xx;
struct cvmx_mixx_ircnt_s cn63xxp1;
struct cvmx_mixx_ircnt_s cn66xx;
struct cvmx_mixx_ircnt_s cn68xx;
struct cvmx_mixx_ircnt_s cn68xxp1;
};
union cvmx_mixx_irhwm {
@@ -241,16 +204,6 @@ union cvmx_mixx_irhwm {
uint64_t reserved_40_63:24;
#endif
} s;
struct cvmx_mixx_irhwm_s cn52xx;
struct cvmx_mixx_irhwm_s cn52xxp1;
struct cvmx_mixx_irhwm_s cn56xx;
struct cvmx_mixx_irhwm_s cn56xxp1;
struct cvmx_mixx_irhwm_s cn61xx;
struct cvmx_mixx_irhwm_s cn63xx;
struct cvmx_mixx_irhwm_s cn63xxp1;
struct cvmx_mixx_irhwm_s cn66xx;
struct cvmx_mixx_irhwm_s cn68xx;
struct cvmx_mixx_irhwm_s cn68xxp1;
};
union cvmx_mixx_iring1 {
@@ -283,15 +236,6 @@ union cvmx_mixx_iring1 {
uint64_t reserved_60_63:4;
#endif
} cn52xx;
struct cvmx_mixx_iring1_cn52xx cn52xxp1;
struct cvmx_mixx_iring1_cn52xx cn56xx;
struct cvmx_mixx_iring1_cn52xx cn56xxp1;
struct cvmx_mixx_iring1_s cn61xx;
struct cvmx_mixx_iring1_s cn63xx;
struct cvmx_mixx_iring1_s cn63xxp1;
struct cvmx_mixx_iring1_s cn66xx;
struct cvmx_mixx_iring1_s cn68xx;
struct cvmx_mixx_iring1_s cn68xxp1;
};
union cvmx_mixx_iring2 {
@@ -309,16 +253,6 @@ union cvmx_mixx_iring2 {
uint64_t reserved_52_63:12;
#endif
} s;
struct cvmx_mixx_iring2_s cn52xx;
struct cvmx_mixx_iring2_s cn52xxp1;
struct cvmx_mixx_iring2_s cn56xx;
struct cvmx_mixx_iring2_s cn56xxp1;
struct cvmx_mixx_iring2_s cn61xx;
struct cvmx_mixx_iring2_s cn63xx;
struct cvmx_mixx_iring2_s cn63xxp1;
struct cvmx_mixx_iring2_s cn66xx;
struct cvmx_mixx_iring2_s cn68xx;
struct cvmx_mixx_iring2_s cn68xxp1;
};
union cvmx_mixx_isr {
@@ -367,15 +301,6 @@ union cvmx_mixx_isr {
uint64_t reserved_7_63:57;
#endif
} cn52xx;
struct cvmx_mixx_isr_cn52xx cn52xxp1;
struct cvmx_mixx_isr_cn52xx cn56xx;
struct cvmx_mixx_isr_cn52xx cn56xxp1;
struct cvmx_mixx_isr_s cn61xx;
struct cvmx_mixx_isr_s cn63xx;
struct cvmx_mixx_isr_s cn63xxp1;
struct cvmx_mixx_isr_s cn66xx;
struct cvmx_mixx_isr_s cn68xx;
struct cvmx_mixx_isr_s cn68xxp1;
};
union cvmx_mixx_orcnt {
@@ -389,16 +314,6 @@ union cvmx_mixx_orcnt {
uint64_t reserved_20_63:44;
#endif
} s;
struct cvmx_mixx_orcnt_s cn52xx;
struct cvmx_mixx_orcnt_s cn52xxp1;
struct cvmx_mixx_orcnt_s cn56xx;
struct cvmx_mixx_orcnt_s cn56xxp1;
struct cvmx_mixx_orcnt_s cn61xx;
struct cvmx_mixx_orcnt_s cn63xx;
struct cvmx_mixx_orcnt_s cn63xxp1;
struct cvmx_mixx_orcnt_s cn66xx;
struct cvmx_mixx_orcnt_s cn68xx;
struct cvmx_mixx_orcnt_s cn68xxp1;
};
union cvmx_mixx_orhwm {
@@ -412,16 +327,6 @@ union cvmx_mixx_orhwm {
uint64_t reserved_20_63:44;
#endif
} s;
struct cvmx_mixx_orhwm_s cn52xx;
struct cvmx_mixx_orhwm_s cn52xxp1;
struct cvmx_mixx_orhwm_s cn56xx;
struct cvmx_mixx_orhwm_s cn56xxp1;
struct cvmx_mixx_orhwm_s cn61xx;
struct cvmx_mixx_orhwm_s cn63xx;
struct cvmx_mixx_orhwm_s cn63xxp1;
struct cvmx_mixx_orhwm_s cn66xx;
struct cvmx_mixx_orhwm_s cn68xx;
struct cvmx_mixx_orhwm_s cn68xxp1;
};
union cvmx_mixx_oring1 {
@@ -454,15 +359,6 @@ union cvmx_mixx_oring1 {
uint64_t reserved_60_63:4;
#endif
} cn52xx;
struct cvmx_mixx_oring1_cn52xx cn52xxp1;
struct cvmx_mixx_oring1_cn52xx cn56xx;
struct cvmx_mixx_oring1_cn52xx cn56xxp1;
struct cvmx_mixx_oring1_s cn61xx;
struct cvmx_mixx_oring1_s cn63xx;
struct cvmx_mixx_oring1_s cn63xxp1;
struct cvmx_mixx_oring1_s cn66xx;
struct cvmx_mixx_oring1_s cn68xx;
struct cvmx_mixx_oring1_s cn68xxp1;
};
union cvmx_mixx_oring2 {
@@ -480,16 +376,6 @@ union cvmx_mixx_oring2 {
uint64_t reserved_52_63:12;
#endif
} s;
struct cvmx_mixx_oring2_s cn52xx;
struct cvmx_mixx_oring2_s cn52xxp1;
struct cvmx_mixx_oring2_s cn56xx;
struct cvmx_mixx_oring2_s cn56xxp1;
struct cvmx_mixx_oring2_s cn61xx;
struct cvmx_mixx_oring2_s cn63xx;
struct cvmx_mixx_oring2_s cn63xxp1;
struct cvmx_mixx_oring2_s cn66xx;
struct cvmx_mixx_oring2_s cn68xx;
struct cvmx_mixx_oring2_s cn68xxp1;
};
union cvmx_mixx_remcnt {
@@ -507,16 +393,6 @@ union cvmx_mixx_remcnt {
uint64_t reserved_52_63:12;
#endif
} s;
struct cvmx_mixx_remcnt_s cn52xx;
struct cvmx_mixx_remcnt_s cn52xxp1;
struct cvmx_mixx_remcnt_s cn56xx;
struct cvmx_mixx_remcnt_s cn56xxp1;
struct cvmx_mixx_remcnt_s cn61xx;
struct cvmx_mixx_remcnt_s cn63xx;
struct cvmx_mixx_remcnt_s cn63xxp1;
struct cvmx_mixx_remcnt_s cn66xx;
struct cvmx_mixx_remcnt_s cn68xx;
struct cvmx_mixx_remcnt_s cn68xxp1;
};
union cvmx_mixx_tsctl {
@@ -538,12 +414,6 @@ union cvmx_mixx_tsctl {
uint64_t reserved_21_63:43;
#endif
} s;
struct cvmx_mixx_tsctl_s cn61xx;
struct cvmx_mixx_tsctl_s cn63xx;
struct cvmx_mixx_tsctl_s cn63xxp1;
struct cvmx_mixx_tsctl_s cn66xx;
struct cvmx_mixx_tsctl_s cn68xx;
struct cvmx_mixx_tsctl_s cn68xxp1;
};
union cvmx_mixx_tstamp {
@@ -555,12 +425,6 @@ union cvmx_mixx_tstamp {
uint64_t tstamp:64;
#endif
} s;
struct cvmx_mixx_tstamp_s cn61xx;
struct cvmx_mixx_tstamp_s cn63xx;
struct cvmx_mixx_tstamp_s cn63xxp1;
struct cvmx_mixx_tstamp_s cn66xx;
struct cvmx_mixx_tstamp_s cn68xx;
struct cvmx_mixx_tstamp_s cn68xxp1;
};
#endif

295
arch/mips/include/asm/octeon/cvmx-npei-defs.h
View File

File diff suppressed because it is too large Load Diff

235
arch/mips/include/asm/octeon/cvmx-npi-defs.h
View File

@@ -160,13 +160,6 @@ union cvmx_npi_base_addr_inputx {
uint64_t baddr:61;
#endif
} s;
struct cvmx_npi_base_addr_inputx_s cn30xx;
struct cvmx_npi_base_addr_inputx_s cn31xx;
struct cvmx_npi_base_addr_inputx_s cn38xx;
struct cvmx_npi_base_addr_inputx_s cn38xxp2;
struct cvmx_npi_base_addr_inputx_s cn50xx;
struct cvmx_npi_base_addr_inputx_s cn58xx;
struct cvmx_npi_base_addr_inputx_s cn58xxp1;
};
union cvmx_npi_base_addr_outputx {
@@ -180,13 +173,6 @@ union cvmx_npi_base_addr_outputx {
uint64_t baddr:61;
#endif
} s;
struct cvmx_npi_base_addr_outputx_s cn30xx;
struct cvmx_npi_base_addr_outputx_s cn31xx;
struct cvmx_npi_base_addr_outputx_s cn38xx;
struct cvmx_npi_base_addr_outputx_s cn38xxp2;
struct cvmx_npi_base_addr_outputx_s cn50xx;
struct cvmx_npi_base_addr_outputx_s cn58xx;
struct cvmx_npi_base_addr_outputx_s cn58xxp1;
};
union cvmx_npi_bist_status {
@@ -281,9 +267,6 @@ union cvmx_npi_bist_status {
uint64_t reserved_20_63:44;
#endif
} cn30xx;
struct cvmx_npi_bist_status_s cn31xx;
struct cvmx_npi_bist_status_s cn38xx;
struct cvmx_npi_bist_status_s cn38xxp2;
struct cvmx_npi_bist_status_cn50xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44;
@@ -329,8 +312,6 @@ union cvmx_npi_bist_status {
uint64_t reserved_20_63:44;
#endif
} cn50xx;
struct cvmx_npi_bist_status_s cn58xx;
struct cvmx_npi_bist_status_s cn58xxp1;
};
union cvmx_npi_buff_size_outputx {
@@ -346,13 +327,6 @@ union cvmx_npi_buff_size_outputx {
uint64_t reserved_23_63:41;
#endif
} s;
struct cvmx_npi_buff_size_outputx_s cn30xx;
struct cvmx_npi_buff_size_outputx_s cn31xx;
struct cvmx_npi_buff_size_outputx_s cn38xx;
struct cvmx_npi_buff_size_outputx_s cn38xxp2;
struct cvmx_npi_buff_size_outputx_s cn50xx;
struct cvmx_npi_buff_size_outputx_s cn58xx;
struct cvmx_npi_buff_size_outputx_s cn58xxp1;
};
union cvmx_npi_comp_ctl {
@@ -368,9 +342,6 @@ union cvmx_npi_comp_ctl {
uint64_t reserved_10_63:54;
#endif
} s;
struct cvmx_npi_comp_ctl_s cn50xx;
struct cvmx_npi_comp_ctl_s cn58xx;
struct cvmx_npi_comp_ctl_s cn58xxp1;
};
union cvmx_npi_ctl_status {
@@ -498,11 +469,6 @@ union cvmx_npi_ctl_status {
uint64_t reserved_63_63:1;
#endif
} cn31xx;
struct cvmx_npi_ctl_status_s cn38xx;
struct cvmx_npi_ctl_status_s cn38xxp2;
struct cvmx_npi_ctl_status_cn31xx cn50xx;
struct cvmx_npi_ctl_status_s cn58xx;
struct cvmx_npi_ctl_status_s cn58xxp1;
};
union cvmx_npi_dbg_select {
@@ -516,13 +482,6 @@ union cvmx_npi_dbg_select {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_npi_dbg_select_s cn30xx;
struct cvmx_npi_dbg_select_s cn31xx;
struct cvmx_npi_dbg_select_s cn38xx;
struct cvmx_npi_dbg_select_s cn38xxp2;
struct cvmx_npi_dbg_select_s cn50xx;
struct cvmx_npi_dbg_select_s cn58xx;
struct cvmx_npi_dbg_select_s cn58xxp1;
};
union cvmx_npi_dma_control {
@@ -558,13 +517,6 @@ union cvmx_npi_dma_control {
uint64_t reserved_36_63:28;
#endif
} s;
struct cvmx_npi_dma_control_s cn30xx;
struct cvmx_npi_dma_control_s cn31xx;
struct cvmx_npi_dma_control_s cn38xx;
struct cvmx_npi_dma_control_s cn38xxp2;
struct cvmx_npi_dma_control_s cn50xx;
struct cvmx_npi_dma_control_s cn58xx;
struct cvmx_npi_dma_control_s cn58xxp1;
};
union cvmx_npi_dma_highp_counts {
@@ -580,13 +532,6 @@ union cvmx_npi_dma_highp_counts {
uint64_t reserved_39_63:25;
#endif
} s;
struct cvmx_npi_dma_highp_counts_s cn30xx;
struct cvmx_npi_dma_highp_counts_s cn31xx;
struct cvmx_npi_dma_highp_counts_s cn38xx;
struct cvmx_npi_dma_highp_counts_s cn38xxp2;
struct cvmx_npi_dma_highp_counts_s cn50xx;
struct cvmx_npi_dma_highp_counts_s cn58xx;
struct cvmx_npi_dma_highp_counts_s cn58xxp1;
};
union cvmx_npi_dma_highp_naddr {
@@ -602,13 +547,6 @@ union cvmx_npi_dma_highp_naddr {
uint64_t reserved_40_63:24;
#endif
} s;
struct cvmx_npi_dma_highp_naddr_s cn30xx;
struct cvmx_npi_dma_highp_naddr_s cn31xx;
struct cvmx_npi_dma_highp_naddr_s cn38xx;
struct cvmx_npi_dma_highp_naddr_s cn38xxp2;
struct cvmx_npi_dma_highp_naddr_s cn50xx;
struct cvmx_npi_dma_highp_naddr_s cn58xx;
struct cvmx_npi_dma_highp_naddr_s cn58xxp1;
};
union cvmx_npi_dma_lowp_counts {
@@ -624,13 +562,6 @@ union cvmx_npi_dma_lowp_counts {
uint64_t reserved_39_63:25;
#endif
} s;
struct cvmx_npi_dma_lowp_counts_s cn30xx;
struct cvmx_npi_dma_lowp_counts_s cn31xx;
struct cvmx_npi_dma_lowp_counts_s cn38xx;
struct cvmx_npi_dma_lowp_counts_s cn38xxp2;
struct cvmx_npi_dma_lowp_counts_s cn50xx;
struct cvmx_npi_dma_lowp_counts_s cn58xx;
struct cvmx_npi_dma_lowp_counts_s cn58xxp1;
};
union cvmx_npi_dma_lowp_naddr {
@@ -646,13 +577,6 @@ union cvmx_npi_dma_lowp_naddr {
uint64_t reserved_40_63:24;
#endif
} s;
struct cvmx_npi_dma_lowp_naddr_s cn30xx;
struct cvmx_npi_dma_lowp_naddr_s cn31xx;
struct cvmx_npi_dma_lowp_naddr_s cn38xx;
struct cvmx_npi_dma_lowp_naddr_s cn38xxp2;
struct cvmx_npi_dma_lowp_naddr_s cn50xx;
struct cvmx_npi_dma_lowp_naddr_s cn58xx;
struct cvmx_npi_dma_lowp_naddr_s cn58xxp1;
};
union cvmx_npi_highp_dbell {
@@ -666,13 +590,6 @@ union cvmx_npi_highp_dbell {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_npi_highp_dbell_s cn30xx;
struct cvmx_npi_highp_dbell_s cn31xx;
struct cvmx_npi_highp_dbell_s cn38xx;
struct cvmx_npi_highp_dbell_s cn38xxp2;
struct cvmx_npi_highp_dbell_s cn50xx;
struct cvmx_npi_highp_dbell_s cn58xx;
struct cvmx_npi_highp_dbell_s cn58xxp1;
};
union cvmx_npi_highp_ibuff_saddr {
@@ -686,13 +603,6 @@ union cvmx_npi_highp_ibuff_saddr {
uint64_t reserved_36_63:28;
#endif
} s;
struct cvmx_npi_highp_ibuff_saddr_s cn30xx;
struct cvmx_npi_highp_ibuff_saddr_s cn31xx;
struct cvmx_npi_highp_ibuff_saddr_s cn38xx;
struct cvmx_npi_highp_ibuff_saddr_s cn38xxp2;
struct cvmx_npi_highp_ibuff_saddr_s cn50xx;
struct cvmx_npi_highp_ibuff_saddr_s cn58xx;
struct cvmx_npi_highp_ibuff_saddr_s cn58xxp1;
};
union cvmx_npi_input_control {
@@ -745,12 +655,6 @@ union cvmx_npi_input_control {
uint64_t reserved_22_63:42;
#endif
} cn30xx;
struct cvmx_npi_input_control_cn30xx cn31xx;
struct cvmx_npi_input_control_s cn38xx;
struct cvmx_npi_input_control_cn30xx cn38xxp2;
struct cvmx_npi_input_control_s cn50xx;
struct cvmx_npi_input_control_s cn58xx;
struct cvmx_npi_input_control_s cn58xxp1;
};
union cvmx_npi_int_enb {
@@ -1094,7 +998,6 @@ union cvmx_npi_int_enb {
uint64_t reserved_62_63:2;
#endif
} cn31xx;
struct cvmx_npi_int_enb_s cn38xx;
struct cvmx_npi_int_enb_cn38xxp2 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_42_63:22;
@@ -1186,9 +1089,6 @@ union cvmx_npi_int_enb {
uint64_t reserved_42_63:22;
#endif
} cn38xxp2;
struct cvmx_npi_int_enb_cn31xx cn50xx;
struct cvmx_npi_int_enb_s cn58xx;
struct cvmx_npi_int_enb_s cn58xxp1;
};
union cvmx_npi_int_sum {
@@ -1532,7 +1432,6 @@ union cvmx_npi_int_sum {
uint64_t reserved_62_63:2;
#endif
} cn31xx;
struct cvmx_npi_int_sum_s cn38xx;
struct cvmx_npi_int_sum_cn38xxp2 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_42_63:22;
@@ -1624,9 +1523,6 @@ union cvmx_npi_int_sum {
uint64_t reserved_42_63:22;
#endif
} cn38xxp2;
struct cvmx_npi_int_sum_cn31xx cn50xx;
struct cvmx_npi_int_sum_s cn58xx;
struct cvmx_npi_int_sum_s cn58xxp1;
};
union cvmx_npi_lowp_dbell {
@@ -1640,13 +1536,6 @@ union cvmx_npi_lowp_dbell {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_npi_lowp_dbell_s cn30xx;
struct cvmx_npi_lowp_dbell_s cn31xx;
struct cvmx_npi_lowp_dbell_s cn38xx;
struct cvmx_npi_lowp_dbell_s cn38xxp2;
struct cvmx_npi_lowp_dbell_s cn50xx;
struct cvmx_npi_lowp_dbell_s cn58xx;
struct cvmx_npi_lowp_dbell_s cn58xxp1;
};
union cvmx_npi_lowp_ibuff_saddr {
@@ -1660,13 +1549,6 @@ union cvmx_npi_lowp_ibuff_saddr {
uint64_t reserved_36_63:28;
#endif
} s;
struct cvmx_npi_lowp_ibuff_saddr_s cn30xx;
struct cvmx_npi_lowp_ibuff_saddr_s cn31xx;
struct cvmx_npi_lowp_ibuff_saddr_s cn38xx;
struct cvmx_npi_lowp_ibuff_saddr_s cn38xxp2;
struct cvmx_npi_lowp_ibuff_saddr_s cn50xx;
struct cvmx_npi_lowp_ibuff_saddr_s cn58xx;
struct cvmx_npi_lowp_ibuff_saddr_s cn58xxp1;
};
union cvmx_npi_mem_access_subidx {
@@ -1696,7 +1578,6 @@ union cvmx_npi_mem_access_subidx {
uint64_t reserved_38_63:26;
#endif
} s;
struct cvmx_npi_mem_access_subidx_s cn30xx;
struct cvmx_npi_mem_access_subidx_cn31xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_36_63:28;
@@ -1718,11 +1599,6 @@ union cvmx_npi_mem_access_subidx {
uint64_t reserved_36_63:28;
#endif
} cn31xx;
struct cvmx_npi_mem_access_subidx_s cn38xx;
struct cvmx_npi_mem_access_subidx_cn31xx cn38xxp2;
struct cvmx_npi_mem_access_subidx_s cn50xx;
struct cvmx_npi_mem_access_subidx_s cn58xx;
struct cvmx_npi_mem_access_subidx_s cn58xxp1;
};
union cvmx_npi_msi_rcv {
@@ -1734,13 +1610,6 @@ union cvmx_npi_msi_rcv {
uint64_t int_vec:64;
#endif
} s;
struct cvmx_npi_msi_rcv_s cn30xx;
struct cvmx_npi_msi_rcv_s cn31xx;
struct cvmx_npi_msi_rcv_s cn38xx;
struct cvmx_npi_msi_rcv_s cn38xxp2;
struct cvmx_npi_msi_rcv_s cn50xx;
struct cvmx_npi_msi_rcv_s cn58xx;
struct cvmx_npi_msi_rcv_s cn58xxp1;
};
union cvmx_npi_num_desc_outputx {
@@ -1754,13 +1623,6 @@ union cvmx_npi_num_desc_outputx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_npi_num_desc_outputx_s cn30xx;
struct cvmx_npi_num_desc_outputx_s cn31xx;
struct cvmx_npi_num_desc_outputx_s cn38xx;
struct cvmx_npi_num_desc_outputx_s cn38xxp2;
struct cvmx_npi_num_desc_outputx_s cn50xx;
struct cvmx_npi_num_desc_outputx_s cn58xx;
struct cvmx_npi_num_desc_outputx_s cn58xxp1;
};
union cvmx_npi_output_control {
@@ -1932,7 +1794,6 @@ union cvmx_npi_output_control {
uint64_t reserved_46_63:18;
#endif
} cn31xx;
struct cvmx_npi_output_control_s cn38xx;
struct cvmx_npi_output_control_cn38xxp2 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_48_63:16;
@@ -2069,8 +1930,6 @@ union cvmx_npi_output_control {
uint64_t reserved_49_63:15;
#endif
} cn50xx;
struct cvmx_npi_output_control_s cn58xx;
struct cvmx_npi_output_control_s cn58xxp1;
};
union cvmx_npi_px_dbpair_addr {
@@ -2086,13 +1945,6 @@ union cvmx_npi_px_dbpair_addr {
uint64_t reserved_63_63:1;
#endif
} s;
struct cvmx_npi_px_dbpair_addr_s cn30xx;
struct cvmx_npi_px_dbpair_addr_s cn31xx;
struct cvmx_npi_px_dbpair_addr_s cn38xx;
struct cvmx_npi_px_dbpair_addr_s cn38xxp2;
struct cvmx_npi_px_dbpair_addr_s cn50xx;
struct cvmx_npi_px_dbpair_addr_s cn58xx;
struct cvmx_npi_px_dbpair_addr_s cn58xxp1;
};
union cvmx_npi_px_instr_addr {
@@ -2106,13 +1958,6 @@ union cvmx_npi_px_instr_addr {
uint64_t state:3;
#endif
} s;
struct cvmx_npi_px_instr_addr_s cn30xx;
struct cvmx_npi_px_instr_addr_s cn31xx;
struct cvmx_npi_px_instr_addr_s cn38xx;
struct cvmx_npi_px_instr_addr_s cn38xxp2;
struct cvmx_npi_px_instr_addr_s cn50xx;
struct cvmx_npi_px_instr_addr_s cn58xx;
struct cvmx_npi_px_instr_addr_s cn58xxp1;
};
union cvmx_npi_px_instr_cnts {
@@ -2128,13 +1973,6 @@ union cvmx_npi_px_instr_cnts {
uint64_t reserved_38_63:26;
#endif
} s;
struct cvmx_npi_px_instr_cnts_s cn30xx;
struct cvmx_npi_px_instr_cnts_s cn31xx;
struct cvmx_npi_px_instr_cnts_s cn38xx;
struct cvmx_npi_px_instr_cnts_s cn38xxp2;
struct cvmx_npi_px_instr_cnts_s cn50xx;
struct cvmx_npi_px_instr_cnts_s cn58xx;
struct cvmx_npi_px_instr_cnts_s cn58xxp1;
};
union cvmx_npi_px_pair_cnts {
@@ -2150,13 +1988,6 @@ union cvmx_npi_px_pair_cnts {
uint64_t reserved_37_63:27;
#endif
} s;
struct cvmx_npi_px_pair_cnts_s cn30xx;
struct cvmx_npi_px_pair_cnts_s cn31xx;
struct cvmx_npi_px_pair_cnts_s cn38xx;
struct cvmx_npi_px_pair_cnts_s cn38xxp2;
struct cvmx_npi_px_pair_cnts_s cn50xx;
struct cvmx_npi_px_pair_cnts_s cn58xx;
struct cvmx_npi_px_pair_cnts_s cn58xxp1;
};
union cvmx_npi_pci_burst_size {
@@ -2172,13 +2003,6 @@ union cvmx_npi_pci_burst_size {
uint64_t reserved_14_63:50;
#endif
} s;
struct cvmx_npi_pci_burst_size_s cn30xx;
struct cvmx_npi_pci_burst_size_s cn31xx;
struct cvmx_npi_pci_burst_size_s cn38xx;
struct cvmx_npi_pci_burst_size_s cn38xxp2;
struct cvmx_npi_pci_burst_size_s cn50xx;
struct cvmx_npi_pci_burst_size_s cn58xx;
struct cvmx_npi_pci_burst_size_s cn58xxp1;
};
union cvmx_npi_pci_int_arb_cfg {
@@ -2215,12 +2039,6 @@ union cvmx_npi_pci_int_arb_cfg {
uint64_t reserved_5_63:59;
#endif
} cn30xx;
struct cvmx_npi_pci_int_arb_cfg_cn30xx cn31xx;
struct cvmx_npi_pci_int_arb_cfg_cn30xx cn38xx;
struct cvmx_npi_pci_int_arb_cfg_cn30xx cn38xxp2;
struct cvmx_npi_pci_int_arb_cfg_s cn50xx;
struct cvmx_npi_pci_int_arb_cfg_s cn58xx;
struct cvmx_npi_pci_int_arb_cfg_s cn58xxp1;
};
union cvmx_npi_pci_read_cmd {
@@ -2234,13 +2052,6 @@ union cvmx_npi_pci_read_cmd {
uint64_t reserved_11_63:53;
#endif
} s;
struct cvmx_npi_pci_read_cmd_s cn30xx;
struct cvmx_npi_pci_read_cmd_s cn31xx;
struct cvmx_npi_pci_read_cmd_s cn38xx;
struct cvmx_npi_pci_read_cmd_s cn38xxp2;
struct cvmx_npi_pci_read_cmd_s cn50xx;
struct cvmx_npi_pci_read_cmd_s cn58xx;
struct cvmx_npi_pci_read_cmd_s cn58xxp1;
};
union cvmx_npi_port32_instr_hdr {
@@ -2276,13 +2087,6 @@ union cvmx_npi_port32_instr_hdr {
uint64_t reserved_44_63:20;
#endif
} s;
struct cvmx_npi_port32_instr_hdr_s cn30xx;
struct cvmx_npi_port32_instr_hdr_s cn31xx;
struct cvmx_npi_port32_instr_hdr_s cn38xx;
struct cvmx_npi_port32_instr_hdr_s cn38xxp2;
struct cvmx_npi_port32_instr_hdr_s cn50xx;
struct cvmx_npi_port32_instr_hdr_s cn58xx;
struct cvmx_npi_port32_instr_hdr_s cn58xxp1;
};
union cvmx_npi_port33_instr_hdr {
@@ -2318,12 +2122,6 @@ union cvmx_npi_port33_instr_hdr {
uint64_t reserved_44_63:20;
#endif
} s;
struct cvmx_npi_port33_instr_hdr_s cn31xx;
struct cvmx_npi_port33_instr_hdr_s cn38xx;
struct cvmx_npi_port33_instr_hdr_s cn38xxp2;
struct cvmx_npi_port33_instr_hdr_s cn50xx;
struct cvmx_npi_port33_instr_hdr_s cn58xx;
struct cvmx_npi_port33_instr_hdr_s cn58xxp1;
};
union cvmx_npi_port34_instr_hdr {
@@ -2359,10 +2157,6 @@ union cvmx_npi_port34_instr_hdr {
uint64_t reserved_44_63:20;
#endif
} s;
struct cvmx_npi_port34_instr_hdr_s cn38xx;
struct cvmx_npi_port34_instr_hdr_s cn38xxp2;
struct cvmx_npi_port34_instr_hdr_s cn58xx;
struct cvmx_npi_port34_instr_hdr_s cn58xxp1;
};
union cvmx_npi_port35_instr_hdr {
@@ -2398,10 +2192,6 @@ union cvmx_npi_port35_instr_hdr {
uint64_t reserved_44_63:20;
#endif
} s;
struct cvmx_npi_port35_instr_hdr_s cn38xx;
struct cvmx_npi_port35_instr_hdr_s cn38xxp2;
struct cvmx_npi_port35_instr_hdr_s cn58xx;
struct cvmx_npi_port35_instr_hdr_s cn58xxp1;
};
union cvmx_npi_port_bp_control {
@@ -2417,13 +2207,6 @@ union cvmx_npi_port_bp_control {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_npi_port_bp_control_s cn30xx;
struct cvmx_npi_port_bp_control_s cn31xx;
struct cvmx_npi_port_bp_control_s cn38xx;
struct cvmx_npi_port_bp_control_s cn38xxp2;
struct cvmx_npi_port_bp_control_s cn50xx;
struct cvmx_npi_port_bp_control_s cn58xx;
struct cvmx_npi_port_bp_control_s cn58xxp1;
};
union cvmx_npi_rsl_int_blocks {
@@ -2566,7 +2349,6 @@ union cvmx_npi_rsl_int_blocks {
uint64_t reserved_32_63:32;
#endif
} cn30xx;
struct cvmx_npi_rsl_int_blocks_cn30xx cn31xx;
struct cvmx_npi_rsl_int_blocks_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_32_63:32;
@@ -2638,7 +2420,6 @@ union cvmx_npi_rsl_int_blocks {
uint64_t reserved_32_63:32;
#endif
} cn38xx;
struct cvmx_npi_rsl_int_blocks_cn38xx cn38xxp2;
struct cvmx_npi_rsl_int_blocks_cn50xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_31_63:33;
@@ -2702,8 +2483,6 @@ union cvmx_npi_rsl_int_blocks {
uint64_t reserved_31_63:33;
#endif
} cn50xx;
struct cvmx_npi_rsl_int_blocks_cn38xx cn58xx;
struct cvmx_npi_rsl_int_blocks_cn38xx cn58xxp1;
};
union cvmx_npi_size_inputx {
@@ -2717,13 +2496,6 @@ union cvmx_npi_size_inputx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_npi_size_inputx_s cn30xx;
struct cvmx_npi_size_inputx_s cn31xx;
struct cvmx_npi_size_inputx_s cn38xx;
struct cvmx_npi_size_inputx_s cn38xxp2;
struct cvmx_npi_size_inputx_s cn50xx;
struct cvmx_npi_size_inputx_s cn58xx;
struct cvmx_npi_size_inputx_s cn58xxp1;
};
union cvmx_npi_win_read_to {
@@ -2737,13 +2509,6 @@ union cvmx_npi_win_read_to {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_npi_win_read_to_s cn30xx;
struct cvmx_npi_win_read_to_s cn31xx;
struct cvmx_npi_win_read_to_s cn38xx;
struct cvmx_npi_win_read_to_s cn38xxp2;
struct cvmx_npi_win_read_to_s cn50xx;
struct cvmx_npi_win_read_to_s cn58xx;
struct cvmx_npi_win_read_to_s cn58xxp1;
};
#endif

392
arch/mips/include/asm/octeon/cvmx-pci-defs.h
View File

@@ -131,13 +131,6 @@ union cvmx_pci_bar1_indexx {
uint32_t reserved_18_31:14;
#endif
} s;
struct cvmx_pci_bar1_indexx_s cn30xx;
struct cvmx_pci_bar1_indexx_s cn31xx;
struct cvmx_pci_bar1_indexx_s cn38xx;
struct cvmx_pci_bar1_indexx_s cn38xxp2;
struct cvmx_pci_bar1_indexx_s cn50xx;
struct cvmx_pci_bar1_indexx_s cn58xx;
struct cvmx_pci_bar1_indexx_s cn58xxp1;
};
union cvmx_pci_bist_reg {
@@ -169,7 +162,6 @@ union cvmx_pci_bist_reg {
uint64_t reserved_10_63:54;
#endif
} s;
struct cvmx_pci_bist_reg_s cn50xx;
};
union cvmx_pci_cfg00 {
@@ -183,13 +175,6 @@ union cvmx_pci_cfg00 {
uint32_t devid:16;
#endif
} s;
struct cvmx_pci_cfg00_s cn30xx;
struct cvmx_pci_cfg00_s cn31xx;
struct cvmx_pci_cfg00_s cn38xx;
struct cvmx_pci_cfg00_s cn38xxp2;
struct cvmx_pci_cfg00_s cn50xx;
struct cvmx_pci_cfg00_s cn58xx;
struct cvmx_pci_cfg00_s cn58xxp1;
};
union cvmx_pci_cfg01 {
@@ -247,13 +232,6 @@ union cvmx_pci_cfg01 {
uint32_t dpe:1;
#endif
} s;
struct cvmx_pci_cfg01_s cn30xx;
struct cvmx_pci_cfg01_s cn31xx;
struct cvmx_pci_cfg01_s cn38xx;
struct cvmx_pci_cfg01_s cn38xxp2;
struct cvmx_pci_cfg01_s cn50xx;
struct cvmx_pci_cfg01_s cn58xx;
struct cvmx_pci_cfg01_s cn58xxp1;
};
union cvmx_pci_cfg02 {
@@ -267,13 +245,6 @@ union cvmx_pci_cfg02 {
uint32_t cc:24;
#endif
} s;
struct cvmx_pci_cfg02_s cn30xx;
struct cvmx_pci_cfg02_s cn31xx;
struct cvmx_pci_cfg02_s cn38xx;
struct cvmx_pci_cfg02_s cn38xxp2;
struct cvmx_pci_cfg02_s cn50xx;
struct cvmx_pci_cfg02_s cn58xx;
struct cvmx_pci_cfg02_s cn58xxp1;
};
union cvmx_pci_cfg03 {
@@ -297,13 +268,6 @@ union cvmx_pci_cfg03 {
uint32_t bcap:1;
#endif
} s;
struct cvmx_pci_cfg03_s cn30xx;
struct cvmx_pci_cfg03_s cn31xx;
struct cvmx_pci_cfg03_s cn38xx;
struct cvmx_pci_cfg03_s cn38xxp2;
struct cvmx_pci_cfg03_s cn50xx;
struct cvmx_pci_cfg03_s cn58xx;
struct cvmx_pci_cfg03_s cn58xxp1;
};
union cvmx_pci_cfg04 {
@@ -323,13 +287,6 @@ union cvmx_pci_cfg04 {
uint32_t lbase:20;
#endif
} s;
struct cvmx_pci_cfg04_s cn30xx;
struct cvmx_pci_cfg04_s cn31xx;
struct cvmx_pci_cfg04_s cn38xx;
struct cvmx_pci_cfg04_s cn38xxp2;
struct cvmx_pci_cfg04_s cn50xx;
struct cvmx_pci_cfg04_s cn58xx;
struct cvmx_pci_cfg04_s cn58xxp1;
};
union cvmx_pci_cfg05 {
@@ -341,13 +298,6 @@ union cvmx_pci_cfg05 {
uint32_t hbase:32;
#endif
} s;
struct cvmx_pci_cfg05_s cn30xx;
struct cvmx_pci_cfg05_s cn31xx;
struct cvmx_pci_cfg05_s cn38xx;
struct cvmx_pci_cfg05_s cn38xxp2;
struct cvmx_pci_cfg05_s cn50xx;
struct cvmx_pci_cfg05_s cn58xx;
struct cvmx_pci_cfg05_s cn58xxp1;
};
union cvmx_pci_cfg06 {
@@ -367,13 +317,6 @@ union cvmx_pci_cfg06 {
uint32_t lbase:5;
#endif
} s;
struct cvmx_pci_cfg06_s cn30xx;
struct cvmx_pci_cfg06_s cn31xx;
struct cvmx_pci_cfg06_s cn38xx;
struct cvmx_pci_cfg06_s cn38xxp2;
struct cvmx_pci_cfg06_s cn50xx;
struct cvmx_pci_cfg06_s cn58xx;
struct cvmx_pci_cfg06_s cn58xxp1;
};
union cvmx_pci_cfg07 {
@@ -385,13 +328,6 @@ union cvmx_pci_cfg07 {
uint32_t hbase:32;
#endif
} s;
struct cvmx_pci_cfg07_s cn30xx;
struct cvmx_pci_cfg07_s cn31xx;
struct cvmx_pci_cfg07_s cn38xx;
struct cvmx_pci_cfg07_s cn38xxp2;
struct cvmx_pci_cfg07_s cn50xx;
struct cvmx_pci_cfg07_s cn58xx;
struct cvmx_pci_cfg07_s cn58xxp1;
};
union cvmx_pci_cfg08 {
@@ -409,13 +345,6 @@ union cvmx_pci_cfg08 {
uint32_t lbasez:28;
#endif
} s;
struct cvmx_pci_cfg08_s cn30xx;
struct cvmx_pci_cfg08_s cn31xx;
struct cvmx_pci_cfg08_s cn38xx;
struct cvmx_pci_cfg08_s cn38xxp2;
struct cvmx_pci_cfg08_s cn50xx;
struct cvmx_pci_cfg08_s cn58xx;
struct cvmx_pci_cfg08_s cn58xxp1;
};
union cvmx_pci_cfg09 {
@@ -429,13 +358,6 @@ union cvmx_pci_cfg09 {
uint32_t hbase:25;
#endif
} s;
struct cvmx_pci_cfg09_s cn30xx;
struct cvmx_pci_cfg09_s cn31xx;
struct cvmx_pci_cfg09_s cn38xx;
struct cvmx_pci_cfg09_s cn38xxp2;
struct cvmx_pci_cfg09_s cn50xx;
struct cvmx_pci_cfg09_s cn58xx;
struct cvmx_pci_cfg09_s cn58xxp1;
};
union cvmx_pci_cfg10 {
@@ -447,13 +369,6 @@ union cvmx_pci_cfg10 {
uint32_t cisp:32;
#endif
} s;
struct cvmx_pci_cfg10_s cn30xx;
struct cvmx_pci_cfg10_s cn31xx;
struct cvmx_pci_cfg10_s cn38xx;
struct cvmx_pci_cfg10_s cn38xxp2;
struct cvmx_pci_cfg10_s cn50xx;
struct cvmx_pci_cfg10_s cn58xx;
struct cvmx_pci_cfg10_s cn58xxp1;
};
union cvmx_pci_cfg11 {
@@ -467,13 +382,6 @@ union cvmx_pci_cfg11 {
uint32_t ssid:16;
#endif
} s;
struct cvmx_pci_cfg11_s cn30xx;
struct cvmx_pci_cfg11_s cn31xx;
struct cvmx_pci_cfg11_s cn38xx;
struct cvmx_pci_cfg11_s cn38xxp2;
struct cvmx_pci_cfg11_s cn50xx;
struct cvmx_pci_cfg11_s cn58xx;
struct cvmx_pci_cfg11_s cn58xxp1;
};
union cvmx_pci_cfg12 {
@@ -491,13 +399,6 @@ union cvmx_pci_cfg12 {
uint32_t erbar:16;
#endif
} s;
struct cvmx_pci_cfg12_s cn30xx;
struct cvmx_pci_cfg12_s cn31xx;
struct cvmx_pci_cfg12_s cn38xx;
struct cvmx_pci_cfg12_s cn38xxp2;
struct cvmx_pci_cfg12_s cn50xx;
struct cvmx_pci_cfg12_s cn58xx;
struct cvmx_pci_cfg12_s cn58xxp1;
};
union cvmx_pci_cfg13 {
@@ -511,13 +412,6 @@ union cvmx_pci_cfg13 {
uint32_t reserved_8_31:24;
#endif
} s;
struct cvmx_pci_cfg13_s cn30xx;
struct cvmx_pci_cfg13_s cn31xx;
struct cvmx_pci_cfg13_s cn38xx;
struct cvmx_pci_cfg13_s cn38xxp2;
struct cvmx_pci_cfg13_s cn50xx;
struct cvmx_pci_cfg13_s cn58xx;
struct cvmx_pci_cfg13_s cn58xxp1;
};
union cvmx_pci_cfg15 {
@@ -535,13 +429,6 @@ union cvmx_pci_cfg15 {
uint32_t ml:8;
#endif
} s;
struct cvmx_pci_cfg15_s cn30xx;
struct cvmx_pci_cfg15_s cn31xx;
struct cvmx_pci_cfg15_s cn38xx;
struct cvmx_pci_cfg15_s cn38xxp2;
struct cvmx_pci_cfg15_s cn50xx;
struct cvmx_pci_cfg15_s cn58xx;
struct cvmx_pci_cfg15_s cn58xxp1;
};
union cvmx_pci_cfg16 {
@@ -583,13 +470,6 @@ union cvmx_pci_cfg16 {
uint32_t trdnpr:1;
#endif
} s;
struct cvmx_pci_cfg16_s cn30xx;
struct cvmx_pci_cfg16_s cn31xx;
struct cvmx_pci_cfg16_s cn38xx;
struct cvmx_pci_cfg16_s cn38xxp2;
struct cvmx_pci_cfg16_s cn50xx;
struct cvmx_pci_cfg16_s cn58xx;
struct cvmx_pci_cfg16_s cn58xxp1;
};
union cvmx_pci_cfg17 {
@@ -601,13 +481,6 @@ union cvmx_pci_cfg17 {
uint32_t tscme:32;
#endif
} s;
struct cvmx_pci_cfg17_s cn30xx;
struct cvmx_pci_cfg17_s cn31xx;
struct cvmx_pci_cfg17_s cn38xx;
struct cvmx_pci_cfg17_s cn38xxp2;
struct cvmx_pci_cfg17_s cn50xx;
struct cvmx_pci_cfg17_s cn58xx;
struct cvmx_pci_cfg17_s cn58xxp1;
};
union cvmx_pci_cfg18 {
@@ -619,13 +492,6 @@ union cvmx_pci_cfg18 {
uint32_t tdsrps:32;
#endif
} s;
struct cvmx_pci_cfg18_s cn30xx;
struct cvmx_pci_cfg18_s cn31xx;
struct cvmx_pci_cfg18_s cn38xx;
struct cvmx_pci_cfg18_s cn38xxp2;
struct cvmx_pci_cfg18_s cn50xx;
struct cvmx_pci_cfg18_s cn58xx;
struct cvmx_pci_cfg18_s cn58xxp1;
};
union cvmx_pci_cfg19 {
@@ -671,13 +537,6 @@ union cvmx_pci_cfg19 {
uint32_t mrbcm:1;
#endif
} s;
struct cvmx_pci_cfg19_s cn30xx;
struct cvmx_pci_cfg19_s cn31xx;
struct cvmx_pci_cfg19_s cn38xx;
struct cvmx_pci_cfg19_s cn38xxp2;
struct cvmx_pci_cfg19_s cn50xx;
struct cvmx_pci_cfg19_s cn58xx;
struct cvmx_pci_cfg19_s cn58xxp1;
};
union cvmx_pci_cfg20 {
@@ -689,13 +548,6 @@ union cvmx_pci_cfg20 {
uint32_t mdsp:32;
#endif
} s;
struct cvmx_pci_cfg20_s cn30xx;
struct cvmx_pci_cfg20_s cn31xx;
struct cvmx_pci_cfg20_s cn38xx;
struct cvmx_pci_cfg20_s cn38xxp2;
struct cvmx_pci_cfg20_s cn50xx;
struct cvmx_pci_cfg20_s cn58xx;
struct cvmx_pci_cfg20_s cn58xxp1;
};
union cvmx_pci_cfg21 {
@@ -707,13 +559,6 @@ union cvmx_pci_cfg21 {
uint32_t scmre:32;
#endif
} s;
struct cvmx_pci_cfg21_s cn30xx;
struct cvmx_pci_cfg21_s cn31xx;
struct cvmx_pci_cfg21_s cn38xx;
struct cvmx_pci_cfg21_s cn38xxp2;
struct cvmx_pci_cfg21_s cn50xx;
struct cvmx_pci_cfg21_s cn58xx;
struct cvmx_pci_cfg21_s cn58xxp1;
};
union cvmx_pci_cfg22 {
@@ -737,13 +582,6 @@ union cvmx_pci_cfg22 {
uint32_t mac:7;
#endif
} s;
struct cvmx_pci_cfg22_s cn30xx;
struct cvmx_pci_cfg22_s cn31xx;
struct cvmx_pci_cfg22_s cn38xx;
struct cvmx_pci_cfg22_s cn38xxp2;
struct cvmx_pci_cfg22_s cn50xx;
struct cvmx_pci_cfg22_s cn58xx;
struct cvmx_pci_cfg22_s cn58xxp1;
};
union cvmx_pci_cfg56 {
@@ -767,13 +605,6 @@ union cvmx_pci_cfg56 {
uint32_t reserved_23_31:9;
#endif
} s;
struct cvmx_pci_cfg56_s cn30xx;
struct cvmx_pci_cfg56_s cn31xx;
struct cvmx_pci_cfg56_s cn38xx;
struct cvmx_pci_cfg56_s cn38xxp2;
struct cvmx_pci_cfg56_s cn50xx;
struct cvmx_pci_cfg56_s cn58xx;
struct cvmx_pci_cfg56_s cn58xxp1;
};
union cvmx_pci_cfg57 {
@@ -809,13 +640,6 @@ union cvmx_pci_cfg57 {
uint32_t reserved_30_31:2;
#endif
} s;
struct cvmx_pci_cfg57_s cn30xx;
struct cvmx_pci_cfg57_s cn31xx;
struct cvmx_pci_cfg57_s cn38xx;
struct cvmx_pci_cfg57_s cn38xxp2;
struct cvmx_pci_cfg57_s cn50xx;
struct cvmx_pci_cfg57_s cn58xx;
struct cvmx_pci_cfg57_s cn58xxp1;
};
union cvmx_pci_cfg58 {
@@ -845,13 +669,6 @@ union cvmx_pci_cfg58 {
uint32_t pmes:5;
#endif
} s;
struct cvmx_pci_cfg58_s cn30xx;
struct cvmx_pci_cfg58_s cn31xx;
struct cvmx_pci_cfg58_s cn38xx;
struct cvmx_pci_cfg58_s cn38xxp2;
struct cvmx_pci_cfg58_s cn50xx;
struct cvmx_pci_cfg58_s cn58xx;
struct cvmx_pci_cfg58_s cn58xxp1;
};
union cvmx_pci_cfg59 {
@@ -881,13 +698,6 @@ union cvmx_pci_cfg59 {
uint32_t pmdia:8;
#endif
} s;
struct cvmx_pci_cfg59_s cn30xx;
struct cvmx_pci_cfg59_s cn31xx;
struct cvmx_pci_cfg59_s cn38xx;
struct cvmx_pci_cfg59_s cn38xxp2;
struct cvmx_pci_cfg59_s cn50xx;
struct cvmx_pci_cfg59_s cn58xx;
struct cvmx_pci_cfg59_s cn58xxp1;
};
union cvmx_pci_cfg60 {
@@ -911,13 +721,6 @@ union cvmx_pci_cfg60 {
uint32_t reserved_24_31:8;
#endif
} s;
struct cvmx_pci_cfg60_s cn30xx;
struct cvmx_pci_cfg60_s cn31xx;
struct cvmx_pci_cfg60_s cn38xx;
struct cvmx_pci_cfg60_s cn38xxp2;
struct cvmx_pci_cfg60_s cn50xx;
struct cvmx_pci_cfg60_s cn58xx;
struct cvmx_pci_cfg60_s cn58xxp1;
};
union cvmx_pci_cfg61 {
@@ -931,13 +734,6 @@ union cvmx_pci_cfg61 {
uint32_t msi31t2:30;
#endif
} s;
struct cvmx_pci_cfg61_s cn30xx;
struct cvmx_pci_cfg61_s cn31xx;
struct cvmx_pci_cfg61_s cn38xx;
struct cvmx_pci_cfg61_s cn38xxp2;
struct cvmx_pci_cfg61_s cn50xx;
struct cvmx_pci_cfg61_s cn58xx;
struct cvmx_pci_cfg61_s cn58xxp1;
};
union cvmx_pci_cfg62 {
@@ -949,13 +745,6 @@ union cvmx_pci_cfg62 {
uint32_t msi:32;
#endif
} s;
struct cvmx_pci_cfg62_s cn30xx;
struct cvmx_pci_cfg62_s cn31xx;
struct cvmx_pci_cfg62_s cn38xx;
struct cvmx_pci_cfg62_s cn38xxp2;
struct cvmx_pci_cfg62_s cn50xx;
struct cvmx_pci_cfg62_s cn58xx;
struct cvmx_pci_cfg62_s cn58xxp1;
};
union cvmx_pci_cfg63 {
@@ -969,13 +758,6 @@ union cvmx_pci_cfg63 {
uint32_t reserved_16_31:16;
#endif
} s;
struct cvmx_pci_cfg63_s cn30xx;
struct cvmx_pci_cfg63_s cn31xx;
struct cvmx_pci_cfg63_s cn38xx;
struct cvmx_pci_cfg63_s cn38xxp2;
struct cvmx_pci_cfg63_s cn50xx;
struct cvmx_pci_cfg63_s cn58xx;
struct cvmx_pci_cfg63_s cn58xxp1;
};
union cvmx_pci_cnt_reg {
@@ -997,9 +779,6 @@ union cvmx_pci_cnt_reg {
uint64_t reserved_38_63:26;
#endif
} s;
struct cvmx_pci_cnt_reg_s cn50xx;
struct cvmx_pci_cnt_reg_s cn58xx;
struct cvmx_pci_cnt_reg_s cn58xxp1;
};
union cvmx_pci_ctl_status_2 {
@@ -1053,7 +832,6 @@ union cvmx_pci_ctl_status_2 {
uint32_t reserved_29_31:3;
#endif
} s;
struct cvmx_pci_ctl_status_2_s cn30xx;
struct cvmx_pci_ctl_status_2_cn31xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint32_t reserved_20_31:12;
@@ -1091,11 +869,6 @@ union cvmx_pci_ctl_status_2 {
uint32_t reserved_20_31:12;
#endif
} cn31xx;
struct cvmx_pci_ctl_status_2_s cn38xx;
struct cvmx_pci_ctl_status_2_cn31xx cn38xxp2;
struct cvmx_pci_ctl_status_2_s cn50xx;
struct cvmx_pci_ctl_status_2_s cn58xx;
struct cvmx_pci_ctl_status_2_s cn58xxp1;
};
union cvmx_pci_dbellx {
@@ -1109,13 +882,6 @@ union cvmx_pci_dbellx {
uint32_t reserved_16_31:16;
#endif
} s;
struct cvmx_pci_dbellx_s cn30xx;
struct cvmx_pci_dbellx_s cn31xx;
struct cvmx_pci_dbellx_s cn38xx;
struct cvmx_pci_dbellx_s cn38xxp2;
struct cvmx_pci_dbellx_s cn50xx;
struct cvmx_pci_dbellx_s cn58xx;
struct cvmx_pci_dbellx_s cn58xxp1;
};
union cvmx_pci_dma_cntx {
@@ -1127,13 +893,6 @@ union cvmx_pci_dma_cntx {
uint32_t dma_cnt:32;
#endif
} s;
struct cvmx_pci_dma_cntx_s cn30xx;
struct cvmx_pci_dma_cntx_s cn31xx;
struct cvmx_pci_dma_cntx_s cn38xx;
struct cvmx_pci_dma_cntx_s cn38xxp2;
struct cvmx_pci_dma_cntx_s cn50xx;
struct cvmx_pci_dma_cntx_s cn58xx;
struct cvmx_pci_dma_cntx_s cn58xxp1;
};
union cvmx_pci_dma_int_levx {
@@ -1145,13 +904,6 @@ union cvmx_pci_dma_int_levx {
uint32_t pkt_cnt:32;
#endif
} s;
struct cvmx_pci_dma_int_levx_s cn30xx;
struct cvmx_pci_dma_int_levx_s cn31xx;
struct cvmx_pci_dma_int_levx_s cn38xx;
struct cvmx_pci_dma_int_levx_s cn38xxp2;
struct cvmx_pci_dma_int_levx_s cn50xx;
struct cvmx_pci_dma_int_levx_s cn58xx;
struct cvmx_pci_dma_int_levx_s cn58xxp1;
};
union cvmx_pci_dma_timex {
@@ -1163,13 +915,6 @@ union cvmx_pci_dma_timex {
uint32_t dma_time:32;
#endif
} s;
struct cvmx_pci_dma_timex_s cn30xx;
struct cvmx_pci_dma_timex_s cn31xx;
struct cvmx_pci_dma_timex_s cn38xx;
struct cvmx_pci_dma_timex_s cn38xxp2;
struct cvmx_pci_dma_timex_s cn50xx;
struct cvmx_pci_dma_timex_s cn58xx;
struct cvmx_pci_dma_timex_s cn58xxp1;
};
union cvmx_pci_instr_countx {
@@ -1181,13 +926,6 @@ union cvmx_pci_instr_countx {
uint32_t icnt:32;
#endif
} s;
struct cvmx_pci_instr_countx_s cn30xx;
struct cvmx_pci_instr_countx_s cn31xx;
struct cvmx_pci_instr_countx_s cn38xx;
struct cvmx_pci_instr_countx_s cn38xxp2;
struct cvmx_pci_instr_countx_s cn50xx;
struct cvmx_pci_instr_countx_s cn58xx;
struct cvmx_pci_instr_countx_s cn58xxp1;
};
union cvmx_pci_int_enb {
@@ -1405,11 +1143,6 @@ union cvmx_pci_int_enb {
uint64_t reserved_34_63:30;
#endif
} cn31xx;
struct cvmx_pci_int_enb_s cn38xx;
struct cvmx_pci_int_enb_s cn38xxp2;
struct cvmx_pci_int_enb_cn31xx cn50xx;
struct cvmx_pci_int_enb_s cn58xx;
struct cvmx_pci_int_enb_s cn58xxp1;
};
union cvmx_pci_int_enb2 {
@@ -1627,11 +1360,6 @@ union cvmx_pci_int_enb2 {
uint64_t reserved_34_63:30;
#endif
} cn31xx;
struct cvmx_pci_int_enb2_s cn38xx;
struct cvmx_pci_int_enb2_s cn38xxp2;
struct cvmx_pci_int_enb2_cn31xx cn50xx;
struct cvmx_pci_int_enb2_s cn58xx;
struct cvmx_pci_int_enb2_s cn58xxp1;
};
union cvmx_pci_int_sum {
@@ -1849,11 +1577,6 @@ union cvmx_pci_int_sum {
uint64_t reserved_34_63:30;
#endif
} cn31xx;
struct cvmx_pci_int_sum_s cn38xx;
struct cvmx_pci_int_sum_s cn38xxp2;
struct cvmx_pci_int_sum_cn31xx cn50xx;
struct cvmx_pci_int_sum_s cn58xx;
struct cvmx_pci_int_sum_s cn58xxp1;
};
union cvmx_pci_int_sum2 {
@@ -2071,11 +1794,6 @@ union cvmx_pci_int_sum2 {
uint64_t reserved_34_63:30;
#endif
} cn31xx;
struct cvmx_pci_int_sum2_s cn38xx;
struct cvmx_pci_int_sum2_s cn38xxp2;
struct cvmx_pci_int_sum2_cn31xx cn50xx;
struct cvmx_pci_int_sum2_s cn58xx;
struct cvmx_pci_int_sum2_s cn58xxp1;
};
union cvmx_pci_msi_rcv {
@@ -2089,13 +1807,6 @@ union cvmx_pci_msi_rcv {
uint32_t reserved_6_31:26;
#endif
} s;
struct cvmx_pci_msi_rcv_s cn30xx;
struct cvmx_pci_msi_rcv_s cn31xx;
struct cvmx_pci_msi_rcv_s cn38xx;
struct cvmx_pci_msi_rcv_s cn38xxp2;
struct cvmx_pci_msi_rcv_s cn50xx;
struct cvmx_pci_msi_rcv_s cn58xx;
struct cvmx_pci_msi_rcv_s cn58xxp1;
};
union cvmx_pci_pkt_creditsx {
@@ -2109,13 +1820,6 @@ union cvmx_pci_pkt_creditsx {
uint32_t pkt_cnt:16;
#endif
} s;
struct cvmx_pci_pkt_creditsx_s cn30xx;
struct cvmx_pci_pkt_creditsx_s cn31xx;
struct cvmx_pci_pkt_creditsx_s cn38xx;
struct cvmx_pci_pkt_creditsx_s cn38xxp2;
struct cvmx_pci_pkt_creditsx_s cn50xx;
struct cvmx_pci_pkt_creditsx_s cn58xx;
struct cvmx_pci_pkt_creditsx_s cn58xxp1;
};
union cvmx_pci_pkts_sentx {
@@ -2127,13 +1831,6 @@ union cvmx_pci_pkts_sentx {
uint32_t pkt_cnt:32;
#endif
} s;
struct cvmx_pci_pkts_sentx_s cn30xx;
struct cvmx_pci_pkts_sentx_s cn31xx;
struct cvmx_pci_pkts_sentx_s cn38xx;
struct cvmx_pci_pkts_sentx_s cn38xxp2;
struct cvmx_pci_pkts_sentx_s cn50xx;
struct cvmx_pci_pkts_sentx_s cn58xx;
struct cvmx_pci_pkts_sentx_s cn58xxp1;
};
union cvmx_pci_pkts_sent_int_levx {
@@ -2145,13 +1842,6 @@ union cvmx_pci_pkts_sent_int_levx {
uint32_t pkt_cnt:32;
#endif
} s;
struct cvmx_pci_pkts_sent_int_levx_s cn30xx;
struct cvmx_pci_pkts_sent_int_levx_s cn31xx;
struct cvmx_pci_pkts_sent_int_levx_s cn38xx;
struct cvmx_pci_pkts_sent_int_levx_s cn38xxp2;
struct cvmx_pci_pkts_sent_int_levx_s cn50xx;
struct cvmx_pci_pkts_sent_int_levx_s cn58xx;
struct cvmx_pci_pkts_sent_int_levx_s cn58xxp1;
};
union cvmx_pci_pkts_sent_timex {
@@ -2163,13 +1853,6 @@ union cvmx_pci_pkts_sent_timex {
uint32_t pkt_time:32;
#endif
} s;
struct cvmx_pci_pkts_sent_timex_s cn30xx;
struct cvmx_pci_pkts_sent_timex_s cn31xx;
struct cvmx_pci_pkts_sent_timex_s cn38xx;
struct cvmx_pci_pkts_sent_timex_s cn38xxp2;
struct cvmx_pci_pkts_sent_timex_s cn50xx;
struct cvmx_pci_pkts_sent_timex_s cn58xx;
struct cvmx_pci_pkts_sent_timex_s cn58xxp1;
};
union cvmx_pci_read_cmd_6 {
@@ -2185,13 +1868,6 @@ union cvmx_pci_read_cmd_6 {
uint32_t reserved_9_31:23;
#endif
} s;
struct cvmx_pci_read_cmd_6_s cn30xx;
struct cvmx_pci_read_cmd_6_s cn31xx;
struct cvmx_pci_read_cmd_6_s cn38xx;
struct cvmx_pci_read_cmd_6_s cn38xxp2;
struct cvmx_pci_read_cmd_6_s cn50xx;
struct cvmx_pci_read_cmd_6_s cn58xx;
struct cvmx_pci_read_cmd_6_s cn58xxp1;
};
union cvmx_pci_read_cmd_c {
@@ -2207,13 +1883,6 @@ union cvmx_pci_read_cmd_c {
uint32_t reserved_9_31:23;
#endif
} s;
struct cvmx_pci_read_cmd_c_s cn30xx;
struct cvmx_pci_read_cmd_c_s cn31xx;
struct cvmx_pci_read_cmd_c_s cn38xx;
struct cvmx_pci_read_cmd_c_s cn38xxp2;
struct cvmx_pci_read_cmd_c_s cn50xx;
struct cvmx_pci_read_cmd_c_s cn58xx;
struct cvmx_pci_read_cmd_c_s cn58xxp1;
};
union cvmx_pci_read_cmd_e {
@@ -2229,13 +1898,6 @@ union cvmx_pci_read_cmd_e {
uint32_t reserved_9_31:23;
#endif
} s;
struct cvmx_pci_read_cmd_e_s cn30xx;
struct cvmx_pci_read_cmd_e_s cn31xx;
struct cvmx_pci_read_cmd_e_s cn38xx;
struct cvmx_pci_read_cmd_e_s cn38xxp2;
struct cvmx_pci_read_cmd_e_s cn50xx;
struct cvmx_pci_read_cmd_e_s cn58xx;
struct cvmx_pci_read_cmd_e_s cn58xxp1;
};
union cvmx_pci_read_timeout {
@@ -2251,13 +1913,6 @@ union cvmx_pci_read_timeout {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pci_read_timeout_s cn30xx;
struct cvmx_pci_read_timeout_s cn31xx;
struct cvmx_pci_read_timeout_s cn38xx;
struct cvmx_pci_read_timeout_s cn38xxp2;
struct cvmx_pci_read_timeout_s cn50xx;
struct cvmx_pci_read_timeout_s cn58xx;
struct cvmx_pci_read_timeout_s cn58xxp1;
};
union cvmx_pci_scm_reg {
@@ -2271,13 +1926,6 @@ union cvmx_pci_scm_reg {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pci_scm_reg_s cn30xx;
struct cvmx_pci_scm_reg_s cn31xx;
struct cvmx_pci_scm_reg_s cn38xx;
struct cvmx_pci_scm_reg_s cn38xxp2;
struct cvmx_pci_scm_reg_s cn50xx;
struct cvmx_pci_scm_reg_s cn58xx;
struct cvmx_pci_scm_reg_s cn58xxp1;
};
union cvmx_pci_tsr_reg {
@@ -2291,13 +1939,6 @@ union cvmx_pci_tsr_reg {
uint64_t reserved_36_63:28;
#endif
} s;
struct cvmx_pci_tsr_reg_s cn30xx;
struct cvmx_pci_tsr_reg_s cn31xx;
struct cvmx_pci_tsr_reg_s cn38xx;
struct cvmx_pci_tsr_reg_s cn38xxp2;
struct cvmx_pci_tsr_reg_s cn50xx;
struct cvmx_pci_tsr_reg_s cn58xx;
struct cvmx_pci_tsr_reg_s cn58xxp1;
};
union cvmx_pci_win_rd_addr {
@@ -2326,7 +1967,6 @@ union cvmx_pci_win_rd_addr {
uint64_t reserved_49_63:15;
#endif
} cn30xx;
struct cvmx_pci_win_rd_addr_cn30xx cn31xx;
struct cvmx_pci_win_rd_addr_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_49_63:15;
@@ -2340,10 +1980,6 @@ union cvmx_pci_win_rd_addr {
uint64_t reserved_49_63:15;
#endif
} cn38xx;
struct cvmx_pci_win_rd_addr_cn38xx cn38xxp2;
struct cvmx_pci_win_rd_addr_cn30xx cn50xx;
struct cvmx_pci_win_rd_addr_cn38xx cn58xx;
struct cvmx_pci_win_rd_addr_cn38xx cn58xxp1;
};
union cvmx_pci_win_rd_data {
@@ -2355,13 +1991,6 @@ union cvmx_pci_win_rd_data {
uint64_t rd_data:64;
#endif
} s;
struct cvmx_pci_win_rd_data_s cn30xx;
struct cvmx_pci_win_rd_data_s cn31xx;
struct cvmx_pci_win_rd_data_s cn38xx;
struct cvmx_pci_win_rd_data_s cn38xxp2;
struct cvmx_pci_win_rd_data_s cn50xx;
struct cvmx_pci_win_rd_data_s cn58xx;
struct cvmx_pci_win_rd_data_s cn58xxp1;
};
union cvmx_pci_win_wr_addr {
@@ -2379,13 +2008,6 @@ union cvmx_pci_win_wr_addr {
uint64_t reserved_49_63:15;
#endif
} s;
struct cvmx_pci_win_wr_addr_s cn30xx;
struct cvmx_pci_win_wr_addr_s cn31xx;
struct cvmx_pci_win_wr_addr_s cn38xx;
struct cvmx_pci_win_wr_addr_s cn38xxp2;
struct cvmx_pci_win_wr_addr_s cn50xx;
struct cvmx_pci_win_wr_addr_s cn58xx;
struct cvmx_pci_win_wr_addr_s cn58xxp1;
};
union cvmx_pci_win_wr_data {
@@ -2397,13 +2019,6 @@ union cvmx_pci_win_wr_data {
uint64_t wr_data:64;
#endif
} s;
struct cvmx_pci_win_wr_data_s cn30xx;
struct cvmx_pci_win_wr_data_s cn31xx;
struct cvmx_pci_win_wr_data_s cn38xx;
struct cvmx_pci_win_wr_data_s cn38xxp2;
struct cvmx_pci_win_wr_data_s cn50xx;
struct cvmx_pci_win_wr_data_s cn58xx;
struct cvmx_pci_win_wr_data_s cn58xxp1;
};
union cvmx_pci_win_wr_mask {
@@ -2417,13 +2032,6 @@ union cvmx_pci_win_wr_mask {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_pci_win_wr_mask_s cn30xx;
struct cvmx_pci_win_wr_mask_s cn31xx;
struct cvmx_pci_win_wr_mask_s cn38xx;
struct cvmx_pci_win_wr_mask_s cn38xxp2;
struct cvmx_pci_win_wr_mask_s cn50xx;
struct cvmx_pci_win_wr_mask_s cn58xx;
struct cvmx_pci_win_wr_mask_s cn58xxp1;
};
#endif

185
arch/mips/include/asm/octeon/cvmx-pcsx-defs.h
View File

@@ -361,17 +361,6 @@ union cvmx_pcsx_anx_adv_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsx_anx_adv_reg_s cn52xx;
struct cvmx_pcsx_anx_adv_reg_s cn52xxp1;
struct cvmx_pcsx_anx_adv_reg_s cn56xx;
struct cvmx_pcsx_anx_adv_reg_s cn56xxp1;
struct cvmx_pcsx_anx_adv_reg_s cn61xx;
struct cvmx_pcsx_anx_adv_reg_s cn63xx;
struct cvmx_pcsx_anx_adv_reg_s cn63xxp1;
struct cvmx_pcsx_anx_adv_reg_s cn66xx;
struct cvmx_pcsx_anx_adv_reg_s cn68xx;
struct cvmx_pcsx_anx_adv_reg_s cn68xxp1;
struct cvmx_pcsx_anx_adv_reg_s cnf71xx;
};
union cvmx_pcsx_anx_ext_st_reg {
@@ -393,17 +382,6 @@ union cvmx_pcsx_anx_ext_st_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsx_anx_ext_st_reg_s cn52xx;
struct cvmx_pcsx_anx_ext_st_reg_s cn52xxp1;
struct cvmx_pcsx_anx_ext_st_reg_s cn56xx;
struct cvmx_pcsx_anx_ext_st_reg_s cn56xxp1;
struct cvmx_pcsx_anx_ext_st_reg_s cn61xx;
struct cvmx_pcsx_anx_ext_st_reg_s cn63xx;
struct cvmx_pcsx_anx_ext_st_reg_s cn63xxp1;
struct cvmx_pcsx_anx_ext_st_reg_s cn66xx;
struct cvmx_pcsx_anx_ext_st_reg_s cn68xx;
struct cvmx_pcsx_anx_ext_st_reg_s cn68xxp1;
struct cvmx_pcsx_anx_ext_st_reg_s cnf71xx;
};
union cvmx_pcsx_anx_lp_abil_reg {
@@ -431,17 +409,6 @@ union cvmx_pcsx_anx_lp_abil_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsx_anx_lp_abil_reg_s cn52xx;
struct cvmx_pcsx_anx_lp_abil_reg_s cn52xxp1;
struct cvmx_pcsx_anx_lp_abil_reg_s cn56xx;
struct cvmx_pcsx_anx_lp_abil_reg_s cn56xxp1;
struct cvmx_pcsx_anx_lp_abil_reg_s cn61xx;
struct cvmx_pcsx_anx_lp_abil_reg_s cn63xx;
struct cvmx_pcsx_anx_lp_abil_reg_s cn63xxp1;
struct cvmx_pcsx_anx_lp_abil_reg_s cn66xx;
struct cvmx_pcsx_anx_lp_abil_reg_s cn68xx;
struct cvmx_pcsx_anx_lp_abil_reg_s cn68xxp1;
struct cvmx_pcsx_anx_lp_abil_reg_s cnf71xx;
};
union cvmx_pcsx_anx_results_reg {
@@ -463,17 +430,6 @@ union cvmx_pcsx_anx_results_reg {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_pcsx_anx_results_reg_s cn52xx;
struct cvmx_pcsx_anx_results_reg_s cn52xxp1;
struct cvmx_pcsx_anx_results_reg_s cn56xx;
struct cvmx_pcsx_anx_results_reg_s cn56xxp1;
struct cvmx_pcsx_anx_results_reg_s cn61xx;
struct cvmx_pcsx_anx_results_reg_s cn63xx;
struct cvmx_pcsx_anx_results_reg_s cn63xxp1;
struct cvmx_pcsx_anx_results_reg_s cn66xx;
struct cvmx_pcsx_anx_results_reg_s cn68xx;
struct cvmx_pcsx_anx_results_reg_s cn68xxp1;
struct cvmx_pcsx_anx_results_reg_s cnf71xx;
};
union cvmx_pcsx_intx_en_reg {
@@ -542,16 +498,6 @@ union cvmx_pcsx_intx_en_reg {
uint64_t reserved_12_63:52;
#endif
} cn52xx;
struct cvmx_pcsx_intx_en_reg_cn52xx cn52xxp1;
struct cvmx_pcsx_intx_en_reg_cn52xx cn56xx;
struct cvmx_pcsx_intx_en_reg_cn52xx cn56xxp1;
struct cvmx_pcsx_intx_en_reg_s cn61xx;
struct cvmx_pcsx_intx_en_reg_s cn63xx;
struct cvmx_pcsx_intx_en_reg_s cn63xxp1;
struct cvmx_pcsx_intx_en_reg_s cn66xx;
struct cvmx_pcsx_intx_en_reg_s cn68xx;
struct cvmx_pcsx_intx_en_reg_s cn68xxp1;
struct cvmx_pcsx_intx_en_reg_s cnf71xx;
};
union cvmx_pcsx_intx_reg {
@@ -620,16 +566,6 @@ union cvmx_pcsx_intx_reg {
uint64_t reserved_12_63:52;
#endif
} cn52xx;
struct cvmx_pcsx_intx_reg_cn52xx cn52xxp1;
struct cvmx_pcsx_intx_reg_cn52xx cn56xx;
struct cvmx_pcsx_intx_reg_cn52xx cn56xxp1;
struct cvmx_pcsx_intx_reg_s cn61xx;
struct cvmx_pcsx_intx_reg_s cn63xx;
struct cvmx_pcsx_intx_reg_s cn63xxp1;
struct cvmx_pcsx_intx_reg_s cn66xx;
struct cvmx_pcsx_intx_reg_s cn68xx;
struct cvmx_pcsx_intx_reg_s cn68xxp1;
struct cvmx_pcsx_intx_reg_s cnf71xx;
};
union cvmx_pcsx_linkx_timer_count_reg {
@@ -643,17 +579,6 @@ union cvmx_pcsx_linkx_timer_count_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsx_linkx_timer_count_reg_s cn52xx;
struct cvmx_pcsx_linkx_timer_count_reg_s cn52xxp1;
struct cvmx_pcsx_linkx_timer_count_reg_s cn56xx;
struct cvmx_pcsx_linkx_timer_count_reg_s cn56xxp1;
struct cvmx_pcsx_linkx_timer_count_reg_s cn61xx;
struct cvmx_pcsx_linkx_timer_count_reg_s cn63xx;
struct cvmx_pcsx_linkx_timer_count_reg_s cn63xxp1;
struct cvmx_pcsx_linkx_timer_count_reg_s cn66xx;
struct cvmx_pcsx_linkx_timer_count_reg_s cn68xx;
struct cvmx_pcsx_linkx_timer_count_reg_s cn68xxp1;
struct cvmx_pcsx_linkx_timer_count_reg_s cnf71xx;
};
union cvmx_pcsx_log_anlx_reg {
@@ -671,17 +596,6 @@ union cvmx_pcsx_log_anlx_reg {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_pcsx_log_anlx_reg_s cn52xx;
struct cvmx_pcsx_log_anlx_reg_s cn52xxp1;
struct cvmx_pcsx_log_anlx_reg_s cn56xx;
struct cvmx_pcsx_log_anlx_reg_s cn56xxp1;
struct cvmx_pcsx_log_anlx_reg_s cn61xx;
struct cvmx_pcsx_log_anlx_reg_s cn63xx;
struct cvmx_pcsx_log_anlx_reg_s cn63xxp1;
struct cvmx_pcsx_log_anlx_reg_s cn66xx;
struct cvmx_pcsx_log_anlx_reg_s cn68xx;
struct cvmx_pcsx_log_anlx_reg_s cn68xxp1;
struct cvmx_pcsx_log_anlx_reg_s cnf71xx;
};
union cvmx_pcsx_miscx_ctl_reg {
@@ -707,17 +621,6 @@ union cvmx_pcsx_miscx_ctl_reg {
uint64_t reserved_13_63:51;
#endif
} s;
struct cvmx_pcsx_miscx_ctl_reg_s cn52xx;
struct cvmx_pcsx_miscx_ctl_reg_s cn52xxp1;
struct cvmx_pcsx_miscx_ctl_reg_s cn56xx;
struct cvmx_pcsx_miscx_ctl_reg_s cn56xxp1;
struct cvmx_pcsx_miscx_ctl_reg_s cn61xx;
struct cvmx_pcsx_miscx_ctl_reg_s cn63xx;
struct cvmx_pcsx_miscx_ctl_reg_s cn63xxp1;
struct cvmx_pcsx_miscx_ctl_reg_s cn66xx;
struct cvmx_pcsx_miscx_ctl_reg_s cn68xx;
struct cvmx_pcsx_miscx_ctl_reg_s cn68xxp1;
struct cvmx_pcsx_miscx_ctl_reg_s cnf71xx;
};
union cvmx_pcsx_mrx_control_reg {
@@ -753,17 +656,6 @@ union cvmx_pcsx_mrx_control_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsx_mrx_control_reg_s cn52xx;
struct cvmx_pcsx_mrx_control_reg_s cn52xxp1;
struct cvmx_pcsx_mrx_control_reg_s cn56xx;
struct cvmx_pcsx_mrx_control_reg_s cn56xxp1;
struct cvmx_pcsx_mrx_control_reg_s cn61xx;
struct cvmx_pcsx_mrx_control_reg_s cn63xx;
struct cvmx_pcsx_mrx_control_reg_s cn63xxp1;
struct cvmx_pcsx_mrx_control_reg_s cn66xx;
struct cvmx_pcsx_mrx_control_reg_s cn68xx;
struct cvmx_pcsx_mrx_control_reg_s cn68xxp1;
struct cvmx_pcsx_mrx_control_reg_s cnf71xx;
};
union cvmx_pcsx_mrx_status_reg {
@@ -807,17 +699,6 @@ union cvmx_pcsx_mrx_status_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsx_mrx_status_reg_s cn52xx;
struct cvmx_pcsx_mrx_status_reg_s cn52xxp1;
struct cvmx_pcsx_mrx_status_reg_s cn56xx;
struct cvmx_pcsx_mrx_status_reg_s cn56xxp1;
struct cvmx_pcsx_mrx_status_reg_s cn61xx;
struct cvmx_pcsx_mrx_status_reg_s cn63xx;
struct cvmx_pcsx_mrx_status_reg_s cn63xxp1;
struct cvmx_pcsx_mrx_status_reg_s cn66xx;
struct cvmx_pcsx_mrx_status_reg_s cn68xx;
struct cvmx_pcsx_mrx_status_reg_s cn68xxp1;
struct cvmx_pcsx_mrx_status_reg_s cnf71xx;
};
union cvmx_pcsx_rxx_states_reg {
@@ -841,17 +722,6 @@ union cvmx_pcsx_rxx_states_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsx_rxx_states_reg_s cn52xx;
struct cvmx_pcsx_rxx_states_reg_s cn52xxp1;
struct cvmx_pcsx_rxx_states_reg_s cn56xx;
struct cvmx_pcsx_rxx_states_reg_s cn56xxp1;
struct cvmx_pcsx_rxx_states_reg_s cn61xx;
struct cvmx_pcsx_rxx_states_reg_s cn63xx;
struct cvmx_pcsx_rxx_states_reg_s cn63xxp1;
struct cvmx_pcsx_rxx_states_reg_s cn66xx;
struct cvmx_pcsx_rxx_states_reg_s cn68xx;
struct cvmx_pcsx_rxx_states_reg_s cn68xxp1;
struct cvmx_pcsx_rxx_states_reg_s cnf71xx;
};
union cvmx_pcsx_rxx_sync_reg {
@@ -867,17 +737,6 @@ union cvmx_pcsx_rxx_sync_reg {
uint64_t reserved_2_63:62;
#endif
} s;
struct cvmx_pcsx_rxx_sync_reg_s cn52xx;
struct cvmx_pcsx_rxx_sync_reg_s cn52xxp1;
struct cvmx_pcsx_rxx_sync_reg_s cn56xx;
struct cvmx_pcsx_rxx_sync_reg_s cn56xxp1;
struct cvmx_pcsx_rxx_sync_reg_s cn61xx;
struct cvmx_pcsx_rxx_sync_reg_s cn63xx;
struct cvmx_pcsx_rxx_sync_reg_s cn63xxp1;
struct cvmx_pcsx_rxx_sync_reg_s cn66xx;
struct cvmx_pcsx_rxx_sync_reg_s cn68xx;
struct cvmx_pcsx_rxx_sync_reg_s cn68xxp1;
struct cvmx_pcsx_rxx_sync_reg_s cnf71xx;
};
union cvmx_pcsx_sgmx_an_adv_reg {
@@ -903,17 +762,6 @@ union cvmx_pcsx_sgmx_an_adv_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsx_sgmx_an_adv_reg_s cn52xx;
struct cvmx_pcsx_sgmx_an_adv_reg_s cn52xxp1;
struct cvmx_pcsx_sgmx_an_adv_reg_s cn56xx;
struct cvmx_pcsx_sgmx_an_adv_reg_s cn56xxp1;
struct cvmx_pcsx_sgmx_an_adv_reg_s cn61xx;
struct cvmx_pcsx_sgmx_an_adv_reg_s cn63xx;
struct cvmx_pcsx_sgmx_an_adv_reg_s cn63xxp1;
struct cvmx_pcsx_sgmx_an_adv_reg_s cn66xx;
struct cvmx_pcsx_sgmx_an_adv_reg_s cn68xx;
struct cvmx_pcsx_sgmx_an_adv_reg_s cn68xxp1;
struct cvmx_pcsx_sgmx_an_adv_reg_s cnf71xx;
};
union cvmx_pcsx_sgmx_lp_adv_reg {
@@ -937,17 +785,6 @@ union cvmx_pcsx_sgmx_lp_adv_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cn52xx;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cn52xxp1;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cn56xx;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cn56xxp1;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cn61xx;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cn63xx;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cn63xxp1;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cn66xx;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cn68xx;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cn68xxp1;
struct cvmx_pcsx_sgmx_lp_adv_reg_s cnf71xx;
};
union cvmx_pcsx_txx_states_reg {
@@ -965,17 +802,6 @@ union cvmx_pcsx_txx_states_reg {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_pcsx_txx_states_reg_s cn52xx;
struct cvmx_pcsx_txx_states_reg_s cn52xxp1;
struct cvmx_pcsx_txx_states_reg_s cn56xx;
struct cvmx_pcsx_txx_states_reg_s cn56xxp1;
struct cvmx_pcsx_txx_states_reg_s cn61xx;
struct cvmx_pcsx_txx_states_reg_s cn63xx;
struct cvmx_pcsx_txx_states_reg_s cn63xxp1;
struct cvmx_pcsx_txx_states_reg_s cn66xx;
struct cvmx_pcsx_txx_states_reg_s cn68xx;
struct cvmx_pcsx_txx_states_reg_s cn68xxp1;
struct cvmx_pcsx_txx_states_reg_s cnf71xx;
};
union cvmx_pcsx_tx_rxx_polarity_reg {
@@ -995,17 +821,6 @@ union cvmx_pcsx_tx_rxx_polarity_reg {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cn52xx;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cn52xxp1;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cn56xx;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cn56xxp1;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cn61xx;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cn63xx;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cn63xxp1;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cn66xx;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cn68xx;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cn68xxp1;
struct cvmx_pcsx_tx_rxx_polarity_reg_s cnf71xx;
};
#endif

146
arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h
View File

@@ -293,16 +293,6 @@ union cvmx_pcsxx_10gbx_status_reg {
uint64_t reserved_13_63:51;
#endif
} s;
struct cvmx_pcsxx_10gbx_status_reg_s cn52xx;
struct cvmx_pcsxx_10gbx_status_reg_s cn52xxp1;
struct cvmx_pcsxx_10gbx_status_reg_s cn56xx;
struct cvmx_pcsxx_10gbx_status_reg_s cn56xxp1;
struct cvmx_pcsxx_10gbx_status_reg_s cn61xx;
struct cvmx_pcsxx_10gbx_status_reg_s cn63xx;
struct cvmx_pcsxx_10gbx_status_reg_s cn63xxp1;
struct cvmx_pcsxx_10gbx_status_reg_s cn66xx;
struct cvmx_pcsxx_10gbx_status_reg_s cn68xx;
struct cvmx_pcsxx_10gbx_status_reg_s cn68xxp1;
};
union cvmx_pcsxx_bist_status_reg {
@@ -316,16 +306,6 @@ union cvmx_pcsxx_bist_status_reg {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_pcsxx_bist_status_reg_s cn52xx;
struct cvmx_pcsxx_bist_status_reg_s cn52xxp1;
struct cvmx_pcsxx_bist_status_reg_s cn56xx;
struct cvmx_pcsxx_bist_status_reg_s cn56xxp1;
struct cvmx_pcsxx_bist_status_reg_s cn61xx;
struct cvmx_pcsxx_bist_status_reg_s cn63xx;
struct cvmx_pcsxx_bist_status_reg_s cn63xxp1;
struct cvmx_pcsxx_bist_status_reg_s cn66xx;
struct cvmx_pcsxx_bist_status_reg_s cn68xx;
struct cvmx_pcsxx_bist_status_reg_s cn68xxp1;
};
union cvmx_pcsxx_bit_lock_status_reg {
@@ -345,16 +325,6 @@ union cvmx_pcsxx_bit_lock_status_reg {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_pcsxx_bit_lock_status_reg_s cn52xx;
struct cvmx_pcsxx_bit_lock_status_reg_s cn52xxp1;
struct cvmx_pcsxx_bit_lock_status_reg_s cn56xx;
struct cvmx_pcsxx_bit_lock_status_reg_s cn56xxp1;
struct cvmx_pcsxx_bit_lock_status_reg_s cn61xx;
struct cvmx_pcsxx_bit_lock_status_reg_s cn63xx;
struct cvmx_pcsxx_bit_lock_status_reg_s cn63xxp1;
struct cvmx_pcsxx_bit_lock_status_reg_s cn66xx;
struct cvmx_pcsxx_bit_lock_status_reg_s cn68xx;
struct cvmx_pcsxx_bit_lock_status_reg_s cn68xxp1;
};
union cvmx_pcsxx_control1_reg {
@@ -384,16 +354,6 @@ union cvmx_pcsxx_control1_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsxx_control1_reg_s cn52xx;
struct cvmx_pcsxx_control1_reg_s cn52xxp1;
struct cvmx_pcsxx_control1_reg_s cn56xx;
struct cvmx_pcsxx_control1_reg_s cn56xxp1;
struct cvmx_pcsxx_control1_reg_s cn61xx;
struct cvmx_pcsxx_control1_reg_s cn63xx;
struct cvmx_pcsxx_control1_reg_s cn63xxp1;
struct cvmx_pcsxx_control1_reg_s cn66xx;
struct cvmx_pcsxx_control1_reg_s cn68xx;
struct cvmx_pcsxx_control1_reg_s cn68xxp1;
};
union cvmx_pcsxx_control2_reg {
@@ -407,16 +367,6 @@ union cvmx_pcsxx_control2_reg {
uint64_t reserved_2_63:62;
#endif
} s;
struct cvmx_pcsxx_control2_reg_s cn52xx;
struct cvmx_pcsxx_control2_reg_s cn52xxp1;
struct cvmx_pcsxx_control2_reg_s cn56xx;
struct cvmx_pcsxx_control2_reg_s cn56xxp1;
struct cvmx_pcsxx_control2_reg_s cn61xx;
struct cvmx_pcsxx_control2_reg_s cn63xx;
struct cvmx_pcsxx_control2_reg_s cn63xxp1;
struct cvmx_pcsxx_control2_reg_s cn66xx;
struct cvmx_pcsxx_control2_reg_s cn68xx;
struct cvmx_pcsxx_control2_reg_s cn68xxp1;
};
union cvmx_pcsxx_int_en_reg {
@@ -461,15 +411,6 @@ union cvmx_pcsxx_int_en_reg {
uint64_t reserved_6_63:58;
#endif
} cn52xx;
struct cvmx_pcsxx_int_en_reg_cn52xx cn52xxp1;
struct cvmx_pcsxx_int_en_reg_cn52xx cn56xx;
struct cvmx_pcsxx_int_en_reg_cn52xx cn56xxp1;
struct cvmx_pcsxx_int_en_reg_s cn61xx;
struct cvmx_pcsxx_int_en_reg_s cn63xx;
struct cvmx_pcsxx_int_en_reg_s cn63xxp1;
struct cvmx_pcsxx_int_en_reg_s cn66xx;
struct cvmx_pcsxx_int_en_reg_s cn68xx;
struct cvmx_pcsxx_int_en_reg_s cn68xxp1;
};
union cvmx_pcsxx_int_reg {
@@ -514,15 +455,6 @@ union cvmx_pcsxx_int_reg {
uint64_t reserved_6_63:58;
#endif
} cn52xx;
struct cvmx_pcsxx_int_reg_cn52xx cn52xxp1;
struct cvmx_pcsxx_int_reg_cn52xx cn56xx;
struct cvmx_pcsxx_int_reg_cn52xx cn56xxp1;
struct cvmx_pcsxx_int_reg_s cn61xx;
struct cvmx_pcsxx_int_reg_s cn63xx;
struct cvmx_pcsxx_int_reg_s cn63xxp1;
struct cvmx_pcsxx_int_reg_s cn66xx;
struct cvmx_pcsxx_int_reg_s cn68xx;
struct cvmx_pcsxx_int_reg_s cn68xxp1;
};
union cvmx_pcsxx_log_anl_reg {
@@ -544,16 +476,6 @@ union cvmx_pcsxx_log_anl_reg {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_pcsxx_log_anl_reg_s cn52xx;
struct cvmx_pcsxx_log_anl_reg_s cn52xxp1;
struct cvmx_pcsxx_log_anl_reg_s cn56xx;
struct cvmx_pcsxx_log_anl_reg_s cn56xxp1;
struct cvmx_pcsxx_log_anl_reg_s cn61xx;
struct cvmx_pcsxx_log_anl_reg_s cn63xx;
struct cvmx_pcsxx_log_anl_reg_s cn63xxp1;
struct cvmx_pcsxx_log_anl_reg_s cn66xx;
struct cvmx_pcsxx_log_anl_reg_s cn68xx;
struct cvmx_pcsxx_log_anl_reg_s cn68xxp1;
};
union cvmx_pcsxx_misc_ctl_reg {
@@ -573,16 +495,6 @@ union cvmx_pcsxx_misc_ctl_reg {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_pcsxx_misc_ctl_reg_s cn52xx;
struct cvmx_pcsxx_misc_ctl_reg_s cn52xxp1;
struct cvmx_pcsxx_misc_ctl_reg_s cn56xx;
struct cvmx_pcsxx_misc_ctl_reg_s cn56xxp1;
struct cvmx_pcsxx_misc_ctl_reg_s cn61xx;
struct cvmx_pcsxx_misc_ctl_reg_s cn63xx;
struct cvmx_pcsxx_misc_ctl_reg_s cn63xxp1;
struct cvmx_pcsxx_misc_ctl_reg_s cn66xx;
struct cvmx_pcsxx_misc_ctl_reg_s cn68xx;
struct cvmx_pcsxx_misc_ctl_reg_s cn68xxp1;
};
union cvmx_pcsxx_rx_sync_states_reg {
@@ -602,16 +514,6 @@ union cvmx_pcsxx_rx_sync_states_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsxx_rx_sync_states_reg_s cn52xx;
struct cvmx_pcsxx_rx_sync_states_reg_s cn52xxp1;
struct cvmx_pcsxx_rx_sync_states_reg_s cn56xx;
struct cvmx_pcsxx_rx_sync_states_reg_s cn56xxp1;
struct cvmx_pcsxx_rx_sync_states_reg_s cn61xx;
struct cvmx_pcsxx_rx_sync_states_reg_s cn63xx;
struct cvmx_pcsxx_rx_sync_states_reg_s cn63xxp1;
struct cvmx_pcsxx_rx_sync_states_reg_s cn66xx;
struct cvmx_pcsxx_rx_sync_states_reg_s cn68xx;
struct cvmx_pcsxx_rx_sync_states_reg_s cn68xxp1;
};
union cvmx_pcsxx_spd_abil_reg {
@@ -627,16 +529,6 @@ union cvmx_pcsxx_spd_abil_reg {
uint64_t reserved_2_63:62;
#endif
} s;
struct cvmx_pcsxx_spd_abil_reg_s cn52xx;
struct cvmx_pcsxx_spd_abil_reg_s cn52xxp1;
struct cvmx_pcsxx_spd_abil_reg_s cn56xx;
struct cvmx_pcsxx_spd_abil_reg_s cn56xxp1;
struct cvmx_pcsxx_spd_abil_reg_s cn61xx;
struct cvmx_pcsxx_spd_abil_reg_s cn63xx;
struct cvmx_pcsxx_spd_abil_reg_s cn63xxp1;
struct cvmx_pcsxx_spd_abil_reg_s cn66xx;
struct cvmx_pcsxx_spd_abil_reg_s cn68xx;
struct cvmx_pcsxx_spd_abil_reg_s cn68xxp1;
};
union cvmx_pcsxx_status1_reg {
@@ -658,16 +550,6 @@ union cvmx_pcsxx_status1_reg {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_pcsxx_status1_reg_s cn52xx;
struct cvmx_pcsxx_status1_reg_s cn52xxp1;
struct cvmx_pcsxx_status1_reg_s cn56xx;
struct cvmx_pcsxx_status1_reg_s cn56xxp1;
struct cvmx_pcsxx_status1_reg_s cn61xx;
struct cvmx_pcsxx_status1_reg_s cn63xx;
struct cvmx_pcsxx_status1_reg_s cn63xxp1;
struct cvmx_pcsxx_status1_reg_s cn66xx;
struct cvmx_pcsxx_status1_reg_s cn68xx;
struct cvmx_pcsxx_status1_reg_s cn68xxp1;
};
union cvmx_pcsxx_status2_reg {
@@ -695,16 +577,6 @@ union cvmx_pcsxx_status2_reg {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_pcsxx_status2_reg_s cn52xx;
struct cvmx_pcsxx_status2_reg_s cn52xxp1;
struct cvmx_pcsxx_status2_reg_s cn56xx;
struct cvmx_pcsxx_status2_reg_s cn56xxp1;
struct cvmx_pcsxx_status2_reg_s cn61xx;
struct cvmx_pcsxx_status2_reg_s cn63xx;
struct cvmx_pcsxx_status2_reg_s cn63xxp1;
struct cvmx_pcsxx_status2_reg_s cn66xx;
struct cvmx_pcsxx_status2_reg_s cn68xx;
struct cvmx_pcsxx_status2_reg_s cn68xxp1;
};
union cvmx_pcsxx_tx_rx_polarity_reg {
@@ -724,7 +596,6 @@ union cvmx_pcsxx_tx_rx_polarity_reg {
uint64_t reserved_10_63:54;
#endif
} s;
struct cvmx_pcsxx_tx_rx_polarity_reg_s cn52xx;
struct cvmx_pcsxx_tx_rx_polarity_reg_cn52xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_2_63:62;
@@ -736,14 +607,6 @@ union cvmx_pcsxx_tx_rx_polarity_reg {
uint64_t reserved_2_63:62;
#endif
} cn52xxp1;
struct cvmx_pcsxx_tx_rx_polarity_reg_s cn56xx;
struct cvmx_pcsxx_tx_rx_polarity_reg_cn52xxp1 cn56xxp1;
struct cvmx_pcsxx_tx_rx_polarity_reg_s cn61xx;
struct cvmx_pcsxx_tx_rx_polarity_reg_s cn63xx;
struct cvmx_pcsxx_tx_rx_polarity_reg_s cn63xxp1;
struct cvmx_pcsxx_tx_rx_polarity_reg_s cn66xx;
struct cvmx_pcsxx_tx_rx_polarity_reg_s cn68xx;
struct cvmx_pcsxx_tx_rx_polarity_reg_s cn68xxp1;
};
union cvmx_pcsxx_tx_rx_states_reg {
@@ -773,7 +636,6 @@ union cvmx_pcsxx_tx_rx_states_reg {
uint64_t reserved_14_63:50;
#endif
} s;
struct cvmx_pcsxx_tx_rx_states_reg_s cn52xx;
struct cvmx_pcsxx_tx_rx_states_reg_cn52xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_13_63:51;
@@ -797,14 +659,6 @@ union cvmx_pcsxx_tx_rx_states_reg {
uint64_t reserved_13_63:51;
#endif
} cn52xxp1;
struct cvmx_pcsxx_tx_rx_states_reg_s cn56xx;
struct cvmx_pcsxx_tx_rx_states_reg_cn52xxp1 cn56xxp1;
struct cvmx_pcsxx_tx_rx_states_reg_s cn61xx;
struct cvmx_pcsxx_tx_rx_states_reg_s cn63xx;
struct cvmx_pcsxx_tx_rx_states_reg_s cn63xxp1;
struct cvmx_pcsxx_tx_rx_states_reg_s cn66xx;
struct cvmx_pcsxx_tx_rx_states_reg_s cn68xx;
struct cvmx_pcsxx_tx_rx_states_reg_s cn68xxp1;
};
#endif

144
arch/mips/include/asm/octeon/cvmx-pemx-defs.h
View File

@@ -68,13 +68,6 @@ union cvmx_pemx_bar1_indexx {
uint64_t reserved_20_63:44;
#endif
} s;
struct cvmx_pemx_bar1_indexx_s cn61xx;
struct cvmx_pemx_bar1_indexx_s cn63xx;
struct cvmx_pemx_bar1_indexx_s cn63xxp1;
struct cvmx_pemx_bar1_indexx_s cn66xx;
struct cvmx_pemx_bar1_indexx_s cn68xx;
struct cvmx_pemx_bar1_indexx_s cn68xxp1;
struct cvmx_pemx_bar1_indexx_s cnf71xx;
};
union cvmx_pemx_bar2_mask {
@@ -90,11 +83,6 @@ union cvmx_pemx_bar2_mask {
uint64_t reserved_38_63:26;
#endif
} s;
struct cvmx_pemx_bar2_mask_s cn61xx;
struct cvmx_pemx_bar2_mask_s cn66xx;
struct cvmx_pemx_bar2_mask_s cn68xx;
struct cvmx_pemx_bar2_mask_s cn68xxp1;
struct cvmx_pemx_bar2_mask_s cnf71xx;
};
union cvmx_pemx_bar_ctl {
@@ -114,13 +102,6 @@ union cvmx_pemx_bar_ctl {
uint64_t reserved_7_63:57;
#endif
} s;
struct cvmx_pemx_bar_ctl_s cn61xx;
struct cvmx_pemx_bar_ctl_s cn63xx;
struct cvmx_pemx_bar_ctl_s cn63xxp1;
struct cvmx_pemx_bar_ctl_s cn66xx;
struct cvmx_pemx_bar_ctl_s cn68xx;
struct cvmx_pemx_bar_ctl_s cn68xxp1;
struct cvmx_pemx_bar_ctl_s cnf71xx;
};
union cvmx_pemx_bist_status {
@@ -148,13 +129,6 @@ union cvmx_pemx_bist_status {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_pemx_bist_status_s cn61xx;
struct cvmx_pemx_bist_status_s cn63xx;
struct cvmx_pemx_bist_status_s cn63xxp1;
struct cvmx_pemx_bist_status_s cn66xx;
struct cvmx_pemx_bist_status_s cn68xx;
struct cvmx_pemx_bist_status_s cn68xxp1;
struct cvmx_pemx_bist_status_s cnf71xx;
};
union cvmx_pemx_bist_status2 {
@@ -186,13 +160,6 @@ union cvmx_pemx_bist_status2 {
uint64_t reserved_10_63:54;
#endif
} s;
struct cvmx_pemx_bist_status2_s cn61xx;
struct cvmx_pemx_bist_status2_s cn63xx;
struct cvmx_pemx_bist_status2_s cn63xxp1;
struct cvmx_pemx_bist_status2_s cn66xx;
struct cvmx_pemx_bist_status2_s cn68xx;
struct cvmx_pemx_bist_status2_s cn68xxp1;
struct cvmx_pemx_bist_status2_s cnf71xx;
};
union cvmx_pemx_cfg_rd {
@@ -206,13 +173,6 @@ union cvmx_pemx_cfg_rd {
uint64_t data:32;
#endif
} s;
struct cvmx_pemx_cfg_rd_s cn61xx;
struct cvmx_pemx_cfg_rd_s cn63xx;
struct cvmx_pemx_cfg_rd_s cn63xxp1;
struct cvmx_pemx_cfg_rd_s cn66xx;
struct cvmx_pemx_cfg_rd_s cn68xx;
struct cvmx_pemx_cfg_rd_s cn68xxp1;
struct cvmx_pemx_cfg_rd_s cnf71xx;
};
union cvmx_pemx_cfg_wr {
@@ -226,13 +186,6 @@ union cvmx_pemx_cfg_wr {
uint64_t data:32;
#endif
} s;
struct cvmx_pemx_cfg_wr_s cn61xx;
struct cvmx_pemx_cfg_wr_s cn63xx;
struct cvmx_pemx_cfg_wr_s cn63xxp1;
struct cvmx_pemx_cfg_wr_s cn66xx;
struct cvmx_pemx_cfg_wr_s cn68xx;
struct cvmx_pemx_cfg_wr_s cn68xxp1;
struct cvmx_pemx_cfg_wr_s cnf71xx;
};
union cvmx_pemx_cpl_lut_valid {
@@ -246,13 +199,6 @@ union cvmx_pemx_cpl_lut_valid {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pemx_cpl_lut_valid_s cn61xx;
struct cvmx_pemx_cpl_lut_valid_s cn63xx;
struct cvmx_pemx_cpl_lut_valid_s cn63xxp1;
struct cvmx_pemx_cpl_lut_valid_s cn66xx;
struct cvmx_pemx_cpl_lut_valid_s cn68xx;
struct cvmx_pemx_cpl_lut_valid_s cn68xxp1;
struct cvmx_pemx_cpl_lut_valid_s cnf71xx;
};
union cvmx_pemx_ctl_status {
@@ -298,13 +244,6 @@ union cvmx_pemx_ctl_status {
uint64_t reserved_48_63:16;
#endif
} s;
struct cvmx_pemx_ctl_status_s cn61xx;
struct cvmx_pemx_ctl_status_s cn63xx;
struct cvmx_pemx_ctl_status_s cn63xxp1;
struct cvmx_pemx_ctl_status_s cn66xx;
struct cvmx_pemx_ctl_status_s cn68xx;
struct cvmx_pemx_ctl_status_s cn68xxp1;
struct cvmx_pemx_ctl_status_s cnf71xx;
};
union cvmx_pemx_dbg_info {
@@ -378,13 +317,6 @@ union cvmx_pemx_dbg_info {
uint64_t reserved_31_63:33;
#endif
} s;
struct cvmx_pemx_dbg_info_s cn61xx;
struct cvmx_pemx_dbg_info_s cn63xx;
struct cvmx_pemx_dbg_info_s cn63xxp1;
struct cvmx_pemx_dbg_info_s cn66xx;
struct cvmx_pemx_dbg_info_s cn68xx;
struct cvmx_pemx_dbg_info_s cn68xxp1;
struct cvmx_pemx_dbg_info_s cnf71xx;
};
union cvmx_pemx_dbg_info_en {
@@ -458,13 +390,6 @@ union cvmx_pemx_dbg_info_en {
uint64_t reserved_31_63:33;
#endif
} s;
struct cvmx_pemx_dbg_info_en_s cn61xx;
struct cvmx_pemx_dbg_info_en_s cn63xx;
struct cvmx_pemx_dbg_info_en_s cn63xxp1;
struct cvmx_pemx_dbg_info_en_s cn66xx;
struct cvmx_pemx_dbg_info_en_s cn68xx;
struct cvmx_pemx_dbg_info_en_s cn68xxp1;
struct cvmx_pemx_dbg_info_en_s cnf71xx;
};
union cvmx_pemx_diag_status {
@@ -484,13 +409,6 @@ union cvmx_pemx_diag_status {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_pemx_diag_status_s cn61xx;
struct cvmx_pemx_diag_status_s cn63xx;
struct cvmx_pemx_diag_status_s cn63xxp1;
struct cvmx_pemx_diag_status_s cn66xx;
struct cvmx_pemx_diag_status_s cn68xx;
struct cvmx_pemx_diag_status_s cn68xxp1;
struct cvmx_pemx_diag_status_s cnf71xx;
};
union cvmx_pemx_inb_read_credits {
@@ -504,10 +422,6 @@ union cvmx_pemx_inb_read_credits {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_pemx_inb_read_credits_s cn61xx;
struct cvmx_pemx_inb_read_credits_s cn66xx;
struct cvmx_pemx_inb_read_credits_s cn68xx;
struct cvmx_pemx_inb_read_credits_s cnf71xx;
};
union cvmx_pemx_int_enb {
@@ -547,13 +461,6 @@ union cvmx_pemx_int_enb {
uint64_t reserved_14_63:50;
#endif
} s;
struct cvmx_pemx_int_enb_s cn61xx;
struct cvmx_pemx_int_enb_s cn63xx;
struct cvmx_pemx_int_enb_s cn63xxp1;
struct cvmx_pemx_int_enb_s cn66xx;
struct cvmx_pemx_int_enb_s cn68xx;
struct cvmx_pemx_int_enb_s cn68xxp1;
struct cvmx_pemx_int_enb_s cnf71xx;
};
union cvmx_pemx_int_enb_int {
@@ -593,13 +500,6 @@ union cvmx_pemx_int_enb_int {
uint64_t reserved_14_63:50;
#endif
} s;
struct cvmx_pemx_int_enb_int_s cn61xx;
struct cvmx_pemx_int_enb_int_s cn63xx;
struct cvmx_pemx_int_enb_int_s cn63xxp1;
struct cvmx_pemx_int_enb_int_s cn66xx;
struct cvmx_pemx_int_enb_int_s cn68xx;
struct cvmx_pemx_int_enb_int_s cn68xxp1;
struct cvmx_pemx_int_enb_int_s cnf71xx;
};
union cvmx_pemx_int_sum {
@@ -639,13 +539,6 @@ union cvmx_pemx_int_sum {
uint64_t reserved_14_63:50;
#endif
} s;
struct cvmx_pemx_int_sum_s cn61xx;
struct cvmx_pemx_int_sum_s cn63xx;
struct cvmx_pemx_int_sum_s cn63xxp1;
struct cvmx_pemx_int_sum_s cn66xx;
struct cvmx_pemx_int_sum_s cn68xx;
struct cvmx_pemx_int_sum_s cn68xxp1;
struct cvmx_pemx_int_sum_s cnf71xx;
};
union cvmx_pemx_p2n_bar0_start {
@@ -659,13 +552,6 @@ union cvmx_pemx_p2n_bar0_start {
uint64_t addr:50;
#endif
} s;
struct cvmx_pemx_p2n_bar0_start_s cn61xx;
struct cvmx_pemx_p2n_bar0_start_s cn63xx;
struct cvmx_pemx_p2n_bar0_start_s cn63xxp1;
struct cvmx_pemx_p2n_bar0_start_s cn66xx;
struct cvmx_pemx_p2n_bar0_start_s cn68xx;
struct cvmx_pemx_p2n_bar0_start_s cn68xxp1;
struct cvmx_pemx_p2n_bar0_start_s cnf71xx;
};
union cvmx_pemx_p2n_bar1_start {
@@ -679,13 +565,6 @@ union cvmx_pemx_p2n_bar1_start {
uint64_t addr:38;
#endif
} s;
struct cvmx_pemx_p2n_bar1_start_s cn61xx;
struct cvmx_pemx_p2n_bar1_start_s cn63xx;
struct cvmx_pemx_p2n_bar1_start_s cn63xxp1;
struct cvmx_pemx_p2n_bar1_start_s cn66xx;
struct cvmx_pemx_p2n_bar1_start_s cn68xx;
struct cvmx_pemx_p2n_bar1_start_s cn68xxp1;
struct cvmx_pemx_p2n_bar1_start_s cnf71xx;
};
union cvmx_pemx_p2n_bar2_start {
@@ -699,13 +578,6 @@ union cvmx_pemx_p2n_bar2_start {
uint64_t addr:23;
#endif
} s;
struct cvmx_pemx_p2n_bar2_start_s cn61xx;
struct cvmx_pemx_p2n_bar2_start_s cn63xx;
struct cvmx_pemx_p2n_bar2_start_s cn63xxp1;
struct cvmx_pemx_p2n_bar2_start_s cn66xx;
struct cvmx_pemx_p2n_bar2_start_s cn68xx;
struct cvmx_pemx_p2n_bar2_start_s cn68xxp1;
struct cvmx_pemx_p2n_bar2_start_s cnf71xx;
};
union cvmx_pemx_p2p_barx_end {
@@ -719,11 +591,6 @@ union cvmx_pemx_p2p_barx_end {
uint64_t addr:52;
#endif
} s;
struct cvmx_pemx_p2p_barx_end_s cn63xx;
struct cvmx_pemx_p2p_barx_end_s cn63xxp1;
struct cvmx_pemx_p2p_barx_end_s cn66xx;
struct cvmx_pemx_p2p_barx_end_s cn68xx;
struct cvmx_pemx_p2p_barx_end_s cn68xxp1;
};
union cvmx_pemx_p2p_barx_start {
@@ -737,11 +604,6 @@ union cvmx_pemx_p2p_barx_start {
uint64_t addr:52;
#endif
} s;
struct cvmx_pemx_p2p_barx_start_s cn63xx;
struct cvmx_pemx_p2p_barx_start_s cn63xxp1;
struct cvmx_pemx_p2p_barx_start_s cn66xx;
struct cvmx_pemx_p2p_barx_start_s cn68xx;
struct cvmx_pemx_p2p_barx_start_s cn68xxp1;
};
union cvmx_pemx_tlp_credits {
@@ -784,12 +646,6 @@ union cvmx_pemx_tlp_credits {
uint64_t reserved_56_63:8;
#endif
} cn61xx;
struct cvmx_pemx_tlp_credits_s cn63xx;
struct cvmx_pemx_tlp_credits_s cn63xxp1;
struct cvmx_pemx_tlp_credits_s cn66xx;
struct cvmx_pemx_tlp_credits_s cn68xx;
struct cvmx_pemx_tlp_credits_s cn68xxp1;
struct cvmx_pemx_tlp_credits_cn61xx cnf71xx;
};
#endif

59
arch/mips/include/asm/octeon/cvmx-pescx-defs.h
View File

@@ -80,7 +80,6 @@ union cvmx_pescx_bist_status {
uint64_t reserved_13_63:51;
#endif
} s;
struct cvmx_pescx_bist_status_s cn52xx;
struct cvmx_pescx_bist_status_cn52xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_12_63:52;
@@ -112,8 +111,6 @@ union cvmx_pescx_bist_status {
uint64_t reserved_12_63:52;
#endif
} cn52xxp1;
struct cvmx_pescx_bist_status_s cn56xx;
struct cvmx_pescx_bist_status_cn52xxp1 cn56xxp1;
};
union cvmx_pescx_bist_status2 {
@@ -153,10 +150,6 @@ union cvmx_pescx_bist_status2 {
uint64_t reserved_14_63:50;
#endif
} s;
struct cvmx_pescx_bist_status2_s cn52xx;
struct cvmx_pescx_bist_status2_s cn52xxp1;
struct cvmx_pescx_bist_status2_s cn56xx;
struct cvmx_pescx_bist_status2_s cn56xxp1;
};
union cvmx_pescx_cfg_rd {
@@ -170,10 +163,6 @@ union cvmx_pescx_cfg_rd {
uint64_t data:32;
#endif
} s;
struct cvmx_pescx_cfg_rd_s cn52xx;
struct cvmx_pescx_cfg_rd_s cn52xxp1;
struct cvmx_pescx_cfg_rd_s cn56xx;
struct cvmx_pescx_cfg_rd_s cn56xxp1;
};
union cvmx_pescx_cfg_wr {
@@ -187,10 +176,6 @@ union cvmx_pescx_cfg_wr {
uint64_t data:32;
#endif
} s;
struct cvmx_pescx_cfg_wr_s cn52xx;
struct cvmx_pescx_cfg_wr_s cn52xxp1;
struct cvmx_pescx_cfg_wr_s cn56xx;
struct cvmx_pescx_cfg_wr_s cn56xxp1;
};
union cvmx_pescx_cpl_lut_valid {
@@ -204,10 +189,6 @@ union cvmx_pescx_cpl_lut_valid {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pescx_cpl_lut_valid_s cn52xx;
struct cvmx_pescx_cpl_lut_valid_s cn52xxp1;
struct cvmx_pescx_cpl_lut_valid_s cn56xx;
struct cvmx_pescx_cpl_lut_valid_s cn56xxp1;
};
union cvmx_pescx_ctl_status {
@@ -249,8 +230,6 @@ union cvmx_pescx_ctl_status {
uint64_t reserved_28_63:36;
#endif
} s;
struct cvmx_pescx_ctl_status_s cn52xx;
struct cvmx_pescx_ctl_status_s cn52xxp1;
struct cvmx_pescx_ctl_status_cn56xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_28_63:36;
@@ -288,7 +267,6 @@ union cvmx_pescx_ctl_status {
uint64_t reserved_28_63:36;
#endif
} cn56xx;
struct cvmx_pescx_ctl_status_cn56xx cn56xxp1;
};
union cvmx_pescx_ctl_status2 {
@@ -304,7 +282,6 @@ union cvmx_pescx_ctl_status2 {
uint64_t reserved_2_63:62;
#endif
} s;
struct cvmx_pescx_ctl_status2_s cn52xx;
struct cvmx_pescx_ctl_status2_cn52xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_1_63:63;
@@ -314,8 +291,6 @@ union cvmx_pescx_ctl_status2 {
uint64_t reserved_1_63:63;
#endif
} cn52xxp1;
struct cvmx_pescx_ctl_status2_s cn56xx;
struct cvmx_pescx_ctl_status2_cn52xxp1 cn56xxp1;
};
union cvmx_pescx_dbg_info {
@@ -389,10 +364,6 @@ union cvmx_pescx_dbg_info {
uint64_t reserved_31_63:33;
#endif
} s;
struct cvmx_pescx_dbg_info_s cn52xx;
struct cvmx_pescx_dbg_info_s cn52xxp1;
struct cvmx_pescx_dbg_info_s cn56xx;
struct cvmx_pescx_dbg_info_s cn56xxp1;
};
union cvmx_pescx_dbg_info_en {
@@ -466,10 +437,6 @@ union cvmx_pescx_dbg_info_en {
uint64_t reserved_31_63:33;
#endif
} s;
struct cvmx_pescx_dbg_info_en_s cn52xx;
struct cvmx_pescx_dbg_info_en_s cn52xxp1;
struct cvmx_pescx_dbg_info_en_s cn56xx;
struct cvmx_pescx_dbg_info_en_s cn56xxp1;
};
union cvmx_pescx_diag_status {
@@ -489,10 +456,6 @@ union cvmx_pescx_diag_status {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_pescx_diag_status_s cn52xx;
struct cvmx_pescx_diag_status_s cn52xxp1;
struct cvmx_pescx_diag_status_s cn56xx;
struct cvmx_pescx_diag_status_s cn56xxp1;
};
union cvmx_pescx_p2n_bar0_start {
@@ -506,10 +469,6 @@ union cvmx_pescx_p2n_bar0_start {
uint64_t addr:50;
#endif
} s;
struct cvmx_pescx_p2n_bar0_start_s cn52xx;
struct cvmx_pescx_p2n_bar0_start_s cn52xxp1;
struct cvmx_pescx_p2n_bar0_start_s cn56xx;
struct cvmx_pescx_p2n_bar0_start_s cn56xxp1;
};
union cvmx_pescx_p2n_bar1_start {
@@ -523,10 +482,6 @@ union cvmx_pescx_p2n_bar1_start {
uint64_t addr:38;
#endif
} s;
struct cvmx_pescx_p2n_bar1_start_s cn52xx;
struct cvmx_pescx_p2n_bar1_start_s cn52xxp1;
struct cvmx_pescx_p2n_bar1_start_s cn56xx;
struct cvmx_pescx_p2n_bar1_start_s cn56xxp1;
};
union cvmx_pescx_p2n_bar2_start {
@@ -540,10 +495,6 @@ union cvmx_pescx_p2n_bar2_start {
uint64_t addr:25;
#endif
} s;
struct cvmx_pescx_p2n_bar2_start_s cn52xx;
struct cvmx_pescx_p2n_bar2_start_s cn52xxp1;
struct cvmx_pescx_p2n_bar2_start_s cn56xx;
struct cvmx_pescx_p2n_bar2_start_s cn56xxp1;
};
union cvmx_pescx_p2p_barx_end {
@@ -557,10 +508,6 @@ union cvmx_pescx_p2p_barx_end {
uint64_t addr:52;
#endif
} s;
struct cvmx_pescx_p2p_barx_end_s cn52xx;
struct cvmx_pescx_p2p_barx_end_s cn52xxp1;
struct cvmx_pescx_p2p_barx_end_s cn56xx;
struct cvmx_pescx_p2p_barx_end_s cn56xxp1;
};
union cvmx_pescx_p2p_barx_start {
@@ -574,10 +521,6 @@ union cvmx_pescx_p2p_barx_start {
uint64_t addr:52;
#endif
} s;
struct cvmx_pescx_p2p_barx_start_s cn52xx;
struct cvmx_pescx_p2p_barx_start_s cn52xxp1;
struct cvmx_pescx_p2p_barx_start_s cn56xx;
struct cvmx_pescx_p2p_barx_start_s cn56xxp1;
};
union cvmx_pescx_tlp_credits {
@@ -631,8 +574,6 @@ union cvmx_pescx_tlp_credits {
uint64_t reserved_38_63:26;
#endif
} cn52xxp1;
struct cvmx_pescx_tlp_credits_cn52xx cn56xx;
struct cvmx_pescx_tlp_credits_cn52xxp1 cn56xxp1;
};
#endif

688
arch/mips/include/asm/octeon/cvmx-pip-defs.h
View File

File diff suppressed because it is too large Load Diff

619
arch/mips/include/asm/octeon/cvmx-pko-defs.h
View File

File diff suppressed because it is too large Load Diff

2
arch/mips/include/asm/octeon/cvmx-pko.h
View File

@@ -611,7 +611,7 @@ static inline void cvmx_pko_get_port_status(uint64_t port_num, uint64_t clear,
pko_reg_read_idx.s.index = cvmx_pko_get_base_queue(port_num);
cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64);
debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8);
status->doorbell = debug8.cn58xx.doorbell;
status->doorbell = debug8.cn50xx.doorbell;
}
}

317
arch/mips/include/asm/octeon/cvmx-pow-defs.h
View File

@@ -160,8 +160,6 @@ union cvmx_pow_bist_stat {
uint64_t reserved_32_63:32;
#endif
} cn38xx;
struct cvmx_pow_bist_stat_cn38xx cn38xxp2;
struct cvmx_pow_bist_stat_cn31xx cn50xx;
struct cvmx_pow_bist_stat_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44;
@@ -191,7 +189,6 @@ union cvmx_pow_bist_stat {
uint64_t reserved_20_63:44;
#endif
} cn52xx;
struct cvmx_pow_bist_stat_cn52xx cn52xxp1;
struct cvmx_pow_bist_stat_cn56xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_28_63:36;
@@ -223,9 +220,6 @@ union cvmx_pow_bist_stat {
uint64_t reserved_28_63:36;
#endif
} cn56xx;
struct cvmx_pow_bist_stat_cn56xx cn56xxp1;
struct cvmx_pow_bist_stat_cn38xx cn58xx;
struct cvmx_pow_bist_stat_cn38xx cn58xxp1;
struct cvmx_pow_bist_stat_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44;
@@ -276,7 +270,6 @@ union cvmx_pow_bist_stat {
uint64_t reserved_22_63:42;
#endif
} cn63xx;
struct cvmx_pow_bist_stat_cn63xx cn63xxp1;
struct cvmx_pow_bist_stat_cn66xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_26_63:38;
@@ -302,7 +295,6 @@ union cvmx_pow_bist_stat {
uint64_t reserved_26_63:38;
#endif
} cn66xx;
struct cvmx_pow_bist_stat_cn61xx cnf71xx;
};
union cvmx_pow_ds_pc {
@@ -316,22 +308,6 @@ union cvmx_pow_ds_pc {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pow_ds_pc_s cn30xx;
struct cvmx_pow_ds_pc_s cn31xx;
struct cvmx_pow_ds_pc_s cn38xx;
struct cvmx_pow_ds_pc_s cn38xxp2;
struct cvmx_pow_ds_pc_s cn50xx;
struct cvmx_pow_ds_pc_s cn52xx;
struct cvmx_pow_ds_pc_s cn52xxp1;
struct cvmx_pow_ds_pc_s cn56xx;
struct cvmx_pow_ds_pc_s cn56xxp1;
struct cvmx_pow_ds_pc_s cn58xx;
struct cvmx_pow_ds_pc_s cn58xxp1;
struct cvmx_pow_ds_pc_s cn61xx;
struct cvmx_pow_ds_pc_s cn63xx;
struct cvmx_pow_ds_pc_s cn63xxp1;
struct cvmx_pow_ds_pc_s cn66xx;
struct cvmx_pow_ds_pc_s cnf71xx;
};
union cvmx_pow_ecc_err {
@@ -367,7 +343,6 @@ union cvmx_pow_ecc_err {
uint64_t reserved_45_63:19;
#endif
} s;
struct cvmx_pow_ecc_err_s cn30xx;
struct cvmx_pow_ecc_err_cn31xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_14_63:50;
@@ -391,20 +366,6 @@ union cvmx_pow_ecc_err {
uint64_t reserved_14_63:50;
#endif
} cn31xx;
struct cvmx_pow_ecc_err_s cn38xx;
struct cvmx_pow_ecc_err_cn31xx cn38xxp2;
struct cvmx_pow_ecc_err_s cn50xx;
struct cvmx_pow_ecc_err_s cn52xx;
struct cvmx_pow_ecc_err_s cn52xxp1;
struct cvmx_pow_ecc_err_s cn56xx;
struct cvmx_pow_ecc_err_s cn56xxp1;
struct cvmx_pow_ecc_err_s cn58xx;
struct cvmx_pow_ecc_err_s cn58xxp1;
struct cvmx_pow_ecc_err_s cn61xx;
struct cvmx_pow_ecc_err_s cn63xx;
struct cvmx_pow_ecc_err_s cn63xxp1;
struct cvmx_pow_ecc_err_s cn66xx;
struct cvmx_pow_ecc_err_s cnf71xx;
};
union cvmx_pow_int_ctl {
@@ -420,22 +381,6 @@ union cvmx_pow_int_ctl {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_pow_int_ctl_s cn30xx;
struct cvmx_pow_int_ctl_s cn31xx;
struct cvmx_pow_int_ctl_s cn38xx;
struct cvmx_pow_int_ctl_s cn38xxp2;
struct cvmx_pow_int_ctl_s cn50xx;
struct cvmx_pow_int_ctl_s cn52xx;
struct cvmx_pow_int_ctl_s cn52xxp1;
struct cvmx_pow_int_ctl_s cn56xx;
struct cvmx_pow_int_ctl_s cn56xxp1;
struct cvmx_pow_int_ctl_s cn58xx;
struct cvmx_pow_int_ctl_s cn58xxp1;
struct cvmx_pow_int_ctl_s cn61xx;
struct cvmx_pow_int_ctl_s cn63xx;
struct cvmx_pow_int_ctl_s cn63xxp1;
struct cvmx_pow_int_ctl_s cn66xx;
struct cvmx_pow_int_ctl_s cnf71xx;
};
union cvmx_pow_iq_cntx {
@@ -449,22 +394,6 @@ union cvmx_pow_iq_cntx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pow_iq_cntx_s cn30xx;
struct cvmx_pow_iq_cntx_s cn31xx;
struct cvmx_pow_iq_cntx_s cn38xx;
struct cvmx_pow_iq_cntx_s cn38xxp2;
struct cvmx_pow_iq_cntx_s cn50xx;
struct cvmx_pow_iq_cntx_s cn52xx;
struct cvmx_pow_iq_cntx_s cn52xxp1;
struct cvmx_pow_iq_cntx_s cn56xx;
struct cvmx_pow_iq_cntx_s cn56xxp1;
struct cvmx_pow_iq_cntx_s cn58xx;
struct cvmx_pow_iq_cntx_s cn58xxp1;
struct cvmx_pow_iq_cntx_s cn61xx;
struct cvmx_pow_iq_cntx_s cn63xx;
struct cvmx_pow_iq_cntx_s cn63xxp1;
struct cvmx_pow_iq_cntx_s cn66xx;
struct cvmx_pow_iq_cntx_s cnf71xx;
};
union cvmx_pow_iq_com_cnt {
@@ -478,22 +407,6 @@ union cvmx_pow_iq_com_cnt {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pow_iq_com_cnt_s cn30xx;
struct cvmx_pow_iq_com_cnt_s cn31xx;
struct cvmx_pow_iq_com_cnt_s cn38xx;
struct cvmx_pow_iq_com_cnt_s cn38xxp2;
struct cvmx_pow_iq_com_cnt_s cn50xx;
struct cvmx_pow_iq_com_cnt_s cn52xx;
struct cvmx_pow_iq_com_cnt_s cn52xxp1;
struct cvmx_pow_iq_com_cnt_s cn56xx;
struct cvmx_pow_iq_com_cnt_s cn56xxp1;
struct cvmx_pow_iq_com_cnt_s cn58xx;
struct cvmx_pow_iq_com_cnt_s cn58xxp1;
struct cvmx_pow_iq_com_cnt_s cn61xx;
struct cvmx_pow_iq_com_cnt_s cn63xx;
struct cvmx_pow_iq_com_cnt_s cn63xxp1;
struct cvmx_pow_iq_com_cnt_s cn66xx;
struct cvmx_pow_iq_com_cnt_s cnf71xx;
};
union cvmx_pow_iq_int {
@@ -507,15 +420,6 @@ union cvmx_pow_iq_int {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_pow_iq_int_s cn52xx;
struct cvmx_pow_iq_int_s cn52xxp1;
struct cvmx_pow_iq_int_s cn56xx;
struct cvmx_pow_iq_int_s cn56xxp1;
struct cvmx_pow_iq_int_s cn61xx;
struct cvmx_pow_iq_int_s cn63xx;
struct cvmx_pow_iq_int_s cn63xxp1;
struct cvmx_pow_iq_int_s cn66xx;
struct cvmx_pow_iq_int_s cnf71xx;
};
union cvmx_pow_iq_int_en {
@@ -529,15 +433,6 @@ union cvmx_pow_iq_int_en {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_pow_iq_int_en_s cn52xx;
struct cvmx_pow_iq_int_en_s cn52xxp1;
struct cvmx_pow_iq_int_en_s cn56xx;
struct cvmx_pow_iq_int_en_s cn56xxp1;
struct cvmx_pow_iq_int_en_s cn61xx;
struct cvmx_pow_iq_int_en_s cn63xx;
struct cvmx_pow_iq_int_en_s cn63xxp1;
struct cvmx_pow_iq_int_en_s cn66xx;
struct cvmx_pow_iq_int_en_s cnf71xx;
};
union cvmx_pow_iq_thrx {
@@ -551,15 +446,6 @@ union cvmx_pow_iq_thrx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pow_iq_thrx_s cn52xx;
struct cvmx_pow_iq_thrx_s cn52xxp1;
struct cvmx_pow_iq_thrx_s cn56xx;
struct cvmx_pow_iq_thrx_s cn56xxp1;
struct cvmx_pow_iq_thrx_s cn61xx;
struct cvmx_pow_iq_thrx_s cn63xx;
struct cvmx_pow_iq_thrx_s cn63xxp1;
struct cvmx_pow_iq_thrx_s cn66xx;
struct cvmx_pow_iq_thrx_s cnf71xx;
};
union cvmx_pow_nos_cnt {
@@ -591,9 +477,6 @@ union cvmx_pow_nos_cnt {
uint64_t reserved_9_63:55;
#endif
} cn31xx;
struct cvmx_pow_nos_cnt_s cn38xx;
struct cvmx_pow_nos_cnt_s cn38xxp2;
struct cvmx_pow_nos_cnt_cn31xx cn50xx;
struct cvmx_pow_nos_cnt_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_10_63:54;
@@ -603,12 +486,6 @@ union cvmx_pow_nos_cnt {
uint64_t reserved_10_63:54;
#endif
} cn52xx;
struct cvmx_pow_nos_cnt_cn52xx cn52xxp1;
struct cvmx_pow_nos_cnt_s cn56xx;
struct cvmx_pow_nos_cnt_s cn56xxp1;
struct cvmx_pow_nos_cnt_s cn58xx;
struct cvmx_pow_nos_cnt_s cn58xxp1;
struct cvmx_pow_nos_cnt_cn52xx cn61xx;
struct cvmx_pow_nos_cnt_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_11_63:53;
@@ -618,9 +495,6 @@ union cvmx_pow_nos_cnt {
uint64_t reserved_11_63:53;
#endif
} cn63xx;
struct cvmx_pow_nos_cnt_cn63xx cn63xxp1;
struct cvmx_pow_nos_cnt_cn63xx cn66xx;
struct cvmx_pow_nos_cnt_cn52xx cnf71xx;
};
union cvmx_pow_nw_tim {
@@ -634,22 +508,6 @@ union cvmx_pow_nw_tim {
uint64_t reserved_10_63:54;
#endif
} s;
struct cvmx_pow_nw_tim_s cn30xx;
struct cvmx_pow_nw_tim_s cn31xx;
struct cvmx_pow_nw_tim_s cn38xx;
struct cvmx_pow_nw_tim_s cn38xxp2;
struct cvmx_pow_nw_tim_s cn50xx;
struct cvmx_pow_nw_tim_s cn52xx;
struct cvmx_pow_nw_tim_s cn52xxp1;
struct cvmx_pow_nw_tim_s cn56xx;
struct cvmx_pow_nw_tim_s cn56xxp1;
struct cvmx_pow_nw_tim_s cn58xx;
struct cvmx_pow_nw_tim_s cn58xxp1;
struct cvmx_pow_nw_tim_s cn61xx;
struct cvmx_pow_nw_tim_s cn63xx;
struct cvmx_pow_nw_tim_s cn63xxp1;
struct cvmx_pow_nw_tim_s cn66xx;
struct cvmx_pow_nw_tim_s cnf71xx;
};
union cvmx_pow_pf_rst_msk {
@@ -663,18 +521,6 @@ union cvmx_pow_pf_rst_msk {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_pow_pf_rst_msk_s cn50xx;
struct cvmx_pow_pf_rst_msk_s cn52xx;
struct cvmx_pow_pf_rst_msk_s cn52xxp1;
struct cvmx_pow_pf_rst_msk_s cn56xx;
struct cvmx_pow_pf_rst_msk_s cn56xxp1;
struct cvmx_pow_pf_rst_msk_s cn58xx;
struct cvmx_pow_pf_rst_msk_s cn58xxp1;
struct cvmx_pow_pf_rst_msk_s cn61xx;
struct cvmx_pow_pf_rst_msk_s cn63xx;
struct cvmx_pow_pf_rst_msk_s cn63xxp1;
struct cvmx_pow_pf_rst_msk_s cn66xx;
struct cvmx_pow_pf_rst_msk_s cnf71xx;
};
union cvmx_pow_pp_grp_mskx {
@@ -713,21 +559,6 @@ union cvmx_pow_pp_grp_mskx {
uint64_t reserved_16_63:48;
#endif
} cn30xx;
struct cvmx_pow_pp_grp_mskx_cn30xx cn31xx;
struct cvmx_pow_pp_grp_mskx_cn30xx cn38xx;
struct cvmx_pow_pp_grp_mskx_cn30xx cn38xxp2;
struct cvmx_pow_pp_grp_mskx_s cn50xx;
struct cvmx_pow_pp_grp_mskx_s cn52xx;
struct cvmx_pow_pp_grp_mskx_s cn52xxp1;
struct cvmx_pow_pp_grp_mskx_s cn56xx;
struct cvmx_pow_pp_grp_mskx_s cn56xxp1;
struct cvmx_pow_pp_grp_mskx_s cn58xx;
struct cvmx_pow_pp_grp_mskx_s cn58xxp1;
struct cvmx_pow_pp_grp_mskx_s cn61xx;
struct cvmx_pow_pp_grp_mskx_s cn63xx;
struct cvmx_pow_pp_grp_mskx_s cn63xxp1;
struct cvmx_pow_pp_grp_mskx_s cn66xx;
struct cvmx_pow_pp_grp_mskx_s cnf71xx;
};
union cvmx_pow_qos_rndx {
@@ -747,22 +578,6 @@ union cvmx_pow_qos_rndx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pow_qos_rndx_s cn30xx;
struct cvmx_pow_qos_rndx_s cn31xx;
struct cvmx_pow_qos_rndx_s cn38xx;
struct cvmx_pow_qos_rndx_s cn38xxp2;
struct cvmx_pow_qos_rndx_s cn50xx;
struct cvmx_pow_qos_rndx_s cn52xx;
struct cvmx_pow_qos_rndx_s cn52xxp1;
struct cvmx_pow_qos_rndx_s cn56xx;
struct cvmx_pow_qos_rndx_s cn56xxp1;
struct cvmx_pow_qos_rndx_s cn58xx;
struct cvmx_pow_qos_rndx_s cn58xxp1;
struct cvmx_pow_qos_rndx_s cn61xx;
struct cvmx_pow_qos_rndx_s cn63xx;
struct cvmx_pow_qos_rndx_s cn63xxp1;
struct cvmx_pow_qos_rndx_s cn66xx;
struct cvmx_pow_qos_rndx_s cnf71xx;
};
union cvmx_pow_qos_thrx {
@@ -838,9 +653,6 @@ union cvmx_pow_qos_thrx {
uint64_t reserved_57_63:7;
#endif
} cn31xx;
struct cvmx_pow_qos_thrx_s cn38xx;
struct cvmx_pow_qos_thrx_s cn38xxp2;
struct cvmx_pow_qos_thrx_cn31xx cn50xx;
struct cvmx_pow_qos_thrx_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_58_63:6;
@@ -866,12 +678,6 @@ union cvmx_pow_qos_thrx {
uint64_t reserved_58_63:6;
#endif
} cn52xx;
struct cvmx_pow_qos_thrx_cn52xx cn52xxp1;
struct cvmx_pow_qos_thrx_s cn56xx;
struct cvmx_pow_qos_thrx_s cn56xxp1;
struct cvmx_pow_qos_thrx_s cn58xx;
struct cvmx_pow_qos_thrx_s cn58xxp1;
struct cvmx_pow_qos_thrx_cn52xx cn61xx;
struct cvmx_pow_qos_thrx_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_59_63:5;
@@ -897,9 +703,6 @@ union cvmx_pow_qos_thrx {
uint64_t reserved_59_63:5;
#endif
} cn63xx;
struct cvmx_pow_qos_thrx_cn63xx cn63xxp1;
struct cvmx_pow_qos_thrx_cn63xx cn66xx;
struct cvmx_pow_qos_thrx_cn52xx cnf71xx;
};
union cvmx_pow_ts_pc {
@@ -913,22 +716,6 @@ union cvmx_pow_ts_pc {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pow_ts_pc_s cn30xx;
struct cvmx_pow_ts_pc_s cn31xx;
struct cvmx_pow_ts_pc_s cn38xx;
struct cvmx_pow_ts_pc_s cn38xxp2;
struct cvmx_pow_ts_pc_s cn50xx;
struct cvmx_pow_ts_pc_s cn52xx;
struct cvmx_pow_ts_pc_s cn52xxp1;
struct cvmx_pow_ts_pc_s cn56xx;
struct cvmx_pow_ts_pc_s cn56xxp1;
struct cvmx_pow_ts_pc_s cn58xx;
struct cvmx_pow_ts_pc_s cn58xxp1;
struct cvmx_pow_ts_pc_s cn61xx;
struct cvmx_pow_ts_pc_s cn63xx;
struct cvmx_pow_ts_pc_s cn63xxp1;
struct cvmx_pow_ts_pc_s cn66xx;
struct cvmx_pow_ts_pc_s cnf71xx;
};
union cvmx_pow_wa_com_pc {
@@ -942,22 +729,6 @@ union cvmx_pow_wa_com_pc {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pow_wa_com_pc_s cn30xx;
struct cvmx_pow_wa_com_pc_s cn31xx;
struct cvmx_pow_wa_com_pc_s cn38xx;
struct cvmx_pow_wa_com_pc_s cn38xxp2;
struct cvmx_pow_wa_com_pc_s cn50xx;
struct cvmx_pow_wa_com_pc_s cn52xx;
struct cvmx_pow_wa_com_pc_s cn52xxp1;
struct cvmx_pow_wa_com_pc_s cn56xx;
struct cvmx_pow_wa_com_pc_s cn56xxp1;
struct cvmx_pow_wa_com_pc_s cn58xx;
struct cvmx_pow_wa_com_pc_s cn58xxp1;
struct cvmx_pow_wa_com_pc_s cn61xx;
struct cvmx_pow_wa_com_pc_s cn63xx;
struct cvmx_pow_wa_com_pc_s cn63xxp1;
struct cvmx_pow_wa_com_pc_s cn66xx;
struct cvmx_pow_wa_com_pc_s cnf71xx;
};
union cvmx_pow_wa_pcx {
@@ -971,22 +742,6 @@ union cvmx_pow_wa_pcx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pow_wa_pcx_s cn30xx;
struct cvmx_pow_wa_pcx_s cn31xx;
struct cvmx_pow_wa_pcx_s cn38xx;
struct cvmx_pow_wa_pcx_s cn38xxp2;
struct cvmx_pow_wa_pcx_s cn50xx;
struct cvmx_pow_wa_pcx_s cn52xx;
struct cvmx_pow_wa_pcx_s cn52xxp1;
struct cvmx_pow_wa_pcx_s cn56xx;
struct cvmx_pow_wa_pcx_s cn56xxp1;
struct cvmx_pow_wa_pcx_s cn58xx;
struct cvmx_pow_wa_pcx_s cn58xxp1;
struct cvmx_pow_wa_pcx_s cn61xx;
struct cvmx_pow_wa_pcx_s cn63xx;
struct cvmx_pow_wa_pcx_s cn63xxp1;
struct cvmx_pow_wa_pcx_s cn66xx;
struct cvmx_pow_wa_pcx_s cnf71xx;
};
union cvmx_pow_wq_int {
@@ -1002,22 +757,6 @@ union cvmx_pow_wq_int {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pow_wq_int_s cn30xx;
struct cvmx_pow_wq_int_s cn31xx;
struct cvmx_pow_wq_int_s cn38xx;
struct cvmx_pow_wq_int_s cn38xxp2;
struct cvmx_pow_wq_int_s cn50xx;
struct cvmx_pow_wq_int_s cn52xx;
struct cvmx_pow_wq_int_s cn52xxp1;
struct cvmx_pow_wq_int_s cn56xx;
struct cvmx_pow_wq_int_s cn56xxp1;
struct cvmx_pow_wq_int_s cn58xx;
struct cvmx_pow_wq_int_s cn58xxp1;
struct cvmx_pow_wq_int_s cn61xx;
struct cvmx_pow_wq_int_s cn63xx;
struct cvmx_pow_wq_int_s cn63xxp1;
struct cvmx_pow_wq_int_s cn66xx;
struct cvmx_pow_wq_int_s cnf71xx;
};
union cvmx_pow_wq_int_cntx {
@@ -1069,9 +808,6 @@ union cvmx_pow_wq_int_cntx {
uint64_t reserved_28_63:36;
#endif
} cn31xx;
struct cvmx_pow_wq_int_cntx_s cn38xx;
struct cvmx_pow_wq_int_cntx_s cn38xxp2;
struct cvmx_pow_wq_int_cntx_cn31xx cn50xx;
struct cvmx_pow_wq_int_cntx_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_28_63:36;
@@ -1089,12 +825,6 @@ union cvmx_pow_wq_int_cntx {
uint64_t reserved_28_63:36;
#endif
} cn52xx;
struct cvmx_pow_wq_int_cntx_cn52xx cn52xxp1;
struct cvmx_pow_wq_int_cntx_s cn56xx;
struct cvmx_pow_wq_int_cntx_s cn56xxp1;
struct cvmx_pow_wq_int_cntx_s cn58xx;
struct cvmx_pow_wq_int_cntx_s cn58xxp1;
struct cvmx_pow_wq_int_cntx_cn52xx cn61xx;
struct cvmx_pow_wq_int_cntx_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_28_63:36;
@@ -1112,9 +842,6 @@ union cvmx_pow_wq_int_cntx {
uint64_t reserved_28_63:36;
#endif
} cn63xx;
struct cvmx_pow_wq_int_cntx_cn63xx cn63xxp1;
struct cvmx_pow_wq_int_cntx_cn63xx cn66xx;
struct cvmx_pow_wq_int_cntx_cn52xx cnf71xx;
};
union cvmx_pow_wq_int_pc {
@@ -1134,22 +861,6 @@ union cvmx_pow_wq_int_pc {
uint64_t reserved_60_63:4;
#endif
} s;
struct cvmx_pow_wq_int_pc_s cn30xx;
struct cvmx_pow_wq_int_pc_s cn31xx;
struct cvmx_pow_wq_int_pc_s cn38xx;
struct cvmx_pow_wq_int_pc_s cn38xxp2;
struct cvmx_pow_wq_int_pc_s cn50xx;
struct cvmx_pow_wq_int_pc_s cn52xx;
struct cvmx_pow_wq_int_pc_s cn52xxp1;
struct cvmx_pow_wq_int_pc_s cn56xx;
struct cvmx_pow_wq_int_pc_s cn56xxp1;
struct cvmx_pow_wq_int_pc_s cn58xx;
struct cvmx_pow_wq_int_pc_s cn58xxp1;
struct cvmx_pow_wq_int_pc_s cn61xx;
struct cvmx_pow_wq_int_pc_s cn63xx;
struct cvmx_pow_wq_int_pc_s cn63xxp1;
struct cvmx_pow_wq_int_pc_s cn66xx;
struct cvmx_pow_wq_int_pc_s cnf71xx;
};
union cvmx_pow_wq_int_thrx {
@@ -1211,9 +922,6 @@ union cvmx_pow_wq_int_thrx {
uint64_t reserved_29_63:35;
#endif
} cn31xx;
struct cvmx_pow_wq_int_thrx_s cn38xx;
struct cvmx_pow_wq_int_thrx_s cn38xxp2;
struct cvmx_pow_wq_int_thrx_cn31xx cn50xx;
struct cvmx_pow_wq_int_thrx_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_29_63:35;
@@ -1233,12 +941,6 @@ union cvmx_pow_wq_int_thrx {
uint64_t reserved_29_63:35;
#endif
} cn52xx;
struct cvmx_pow_wq_int_thrx_cn52xx cn52xxp1;
struct cvmx_pow_wq_int_thrx_s cn56xx;
struct cvmx_pow_wq_int_thrx_s cn56xxp1;
struct cvmx_pow_wq_int_thrx_s cn58xx;
struct cvmx_pow_wq_int_thrx_s cn58xxp1;
struct cvmx_pow_wq_int_thrx_cn52xx cn61xx;
struct cvmx_pow_wq_int_thrx_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_29_63:35;
@@ -1258,9 +960,6 @@ union cvmx_pow_wq_int_thrx {
uint64_t reserved_29_63:35;
#endif
} cn63xx;
struct cvmx_pow_wq_int_thrx_cn63xx cn63xxp1;
struct cvmx_pow_wq_int_thrx_cn63xx cn66xx;
struct cvmx_pow_wq_int_thrx_cn52xx cnf71xx;
};
union cvmx_pow_ws_pcx {
@@ -1274,22 +973,6 @@ union cvmx_pow_ws_pcx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_pow_ws_pcx_s cn30xx;
struct cvmx_pow_ws_pcx_s cn31xx;
struct cvmx_pow_ws_pcx_s cn38xx;
struct cvmx_pow_ws_pcx_s cn38xxp2;
struct cvmx_pow_ws_pcx_s cn50xx;
struct cvmx_pow_ws_pcx_s cn52xx;
struct cvmx_pow_ws_pcx_s cn52xxp1;
struct cvmx_pow_ws_pcx_s cn56xx;
struct cvmx_pow_ws_pcx_s cn56xxp1;
struct cvmx_pow_ws_pcx_s cn58xx;
struct cvmx_pow_ws_pcx_s cn58xxp1;
struct cvmx_pow_ws_pcx_s cn61xx;
struct cvmx_pow_ws_pcx_s cn63xx;
struct cvmx_pow_ws_pcx_s cn63xxp1;
struct cvmx_pow_ws_pcx_s cn66xx;
struct cvmx_pow_ws_pcx_s cnf71xx;
};
union cvmx_sso_wq_int_thrx {

53
arch/mips/include/asm/octeon/cvmx-rnm-defs.h
View File

@@ -47,24 +47,6 @@ union cvmx_rnm_bist_status {
uint64_t reserved_2_63:62;
#endif
} s;
struct cvmx_rnm_bist_status_s cn30xx;
struct cvmx_rnm_bist_status_s cn31xx;
struct cvmx_rnm_bist_status_s cn38xx;
struct cvmx_rnm_bist_status_s cn38xxp2;
struct cvmx_rnm_bist_status_s cn50xx;
struct cvmx_rnm_bist_status_s cn52xx;
struct cvmx_rnm_bist_status_s cn52xxp1;
struct cvmx_rnm_bist_status_s cn56xx;
struct cvmx_rnm_bist_status_s cn56xxp1;
struct cvmx_rnm_bist_status_s cn58xx;
struct cvmx_rnm_bist_status_s cn58xxp1;
struct cvmx_rnm_bist_status_s cn61xx;
struct cvmx_rnm_bist_status_s cn63xx;
struct cvmx_rnm_bist_status_s cn63xxp1;
struct cvmx_rnm_bist_status_s cn66xx;
struct cvmx_rnm_bist_status_s cn68xx;
struct cvmx_rnm_bist_status_s cn68xxp1;
struct cvmx_rnm_bist_status_s cnf71xx;
};
union cvmx_rnm_ctl_status {
@@ -109,9 +91,6 @@ union cvmx_rnm_ctl_status {
uint64_t reserved_4_63:60;
#endif
} cn30xx;
struct cvmx_rnm_ctl_status_cn30xx cn31xx;
struct cvmx_rnm_ctl_status_cn30xx cn38xx;
struct cvmx_rnm_ctl_status_cn30xx cn38xxp2;
struct cvmx_rnm_ctl_status_cn50xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_9_63:55;
@@ -131,13 +110,6 @@ union cvmx_rnm_ctl_status {
uint64_t reserved_9_63:55;
#endif
} cn50xx;
struct cvmx_rnm_ctl_status_cn50xx cn52xx;
struct cvmx_rnm_ctl_status_cn50xx cn52xxp1;
struct cvmx_rnm_ctl_status_cn50xx cn56xx;
struct cvmx_rnm_ctl_status_cn50xx cn56xxp1;
struct cvmx_rnm_ctl_status_cn50xx cn58xx;
struct cvmx_rnm_ctl_status_cn50xx cn58xxp1;
struct cvmx_rnm_ctl_status_s cn61xx;
struct cvmx_rnm_ctl_status_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_11_63:53;
@@ -161,11 +133,6 @@ union cvmx_rnm_ctl_status {
uint64_t reserved_11_63:53;
#endif
} cn63xx;
struct cvmx_rnm_ctl_status_cn63xx cn63xxp1;
struct cvmx_rnm_ctl_status_s cn66xx;
struct cvmx_rnm_ctl_status_cn63xx cn68xx;
struct cvmx_rnm_ctl_status_cn63xx cn68xxp1;
struct cvmx_rnm_ctl_status_s cnf71xx;
};
union cvmx_rnm_eer_dbg {
@@ -177,13 +144,6 @@ union cvmx_rnm_eer_dbg {
uint64_t dat:64;
#endif
} s;
struct cvmx_rnm_eer_dbg_s cn61xx;
struct cvmx_rnm_eer_dbg_s cn63xx;
struct cvmx_rnm_eer_dbg_s cn63xxp1;
struct cvmx_rnm_eer_dbg_s cn66xx;
struct cvmx_rnm_eer_dbg_s cn68xx;
struct cvmx_rnm_eer_dbg_s cn68xxp1;
struct cvmx_rnm_eer_dbg_s cnf71xx;
};
union cvmx_rnm_eer_key {
@@ -195,13 +155,6 @@ union cvmx_rnm_eer_key {
uint64_t key:64;
#endif
} s;
struct cvmx_rnm_eer_key_s cn61xx;
struct cvmx_rnm_eer_key_s cn63xx;
struct cvmx_rnm_eer_key_s cn63xxp1;
struct cvmx_rnm_eer_key_s cn66xx;
struct cvmx_rnm_eer_key_s cn68xx;
struct cvmx_rnm_eer_key_s cn68xxp1;
struct cvmx_rnm_eer_key_s cnf71xx;
};
union cvmx_rnm_serial_num {
@@ -213,12 +166,6 @@ union cvmx_rnm_serial_num {
uint64_t dat:64;
#endif
} s;
struct cvmx_rnm_serial_num_s cn61xx;
struct cvmx_rnm_serial_num_s cn63xx;
struct cvmx_rnm_serial_num_s cn66xx;
struct cvmx_rnm_serial_num_s cn68xx;
struct cvmx_rnm_serial_num_s cn68xxp1;
struct cvmx_rnm_serial_num_s cnf71xx;
};
#endif

28
arch/mips/include/asm/octeon/cvmx-rst-defs.h
View File

@@ -80,9 +80,6 @@ union cvmx_rst_boot {
uint64_t chipkill:1;
#endif
} s;
struct cvmx_rst_boot_s cn70xx;
struct cvmx_rst_boot_s cn70xxp1;
struct cvmx_rst_boot_s cn78xx;
};
union cvmx_rst_cfg {
@@ -102,9 +99,6 @@ union cvmx_rst_cfg {
uint64_t bist_delay:58;
#endif
} s;
struct cvmx_rst_cfg_s cn70xx;
struct cvmx_rst_cfg_s cn70xxp1;
struct cvmx_rst_cfg_s cn78xx;
};
union cvmx_rst_ckill {
@@ -118,9 +112,6 @@ union cvmx_rst_ckill {
uint64_t reserved_47_63:17;
#endif
} s;
struct cvmx_rst_ckill_s cn70xx;
struct cvmx_rst_ckill_s cn70xxp1;
struct cvmx_rst_ckill_s cn78xx;
};
union cvmx_rst_ctlx {
@@ -150,9 +141,6 @@ union cvmx_rst_ctlx {
uint64_t reserved_10_63:54;
#endif
} s;
struct cvmx_rst_ctlx_s cn70xx;
struct cvmx_rst_ctlx_s cn70xxp1;
struct cvmx_rst_ctlx_s cn78xx;
};
union cvmx_rst_delay {
@@ -168,9 +156,6 @@ union cvmx_rst_delay {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_rst_delay_s cn70xx;
struct cvmx_rst_delay_s cn70xxp1;
struct cvmx_rst_delay_s cn78xx;
};
union cvmx_rst_eco {
@@ -184,7 +169,6 @@ union cvmx_rst_eco {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_rst_eco_s cn78xx;
};
union cvmx_rst_int {
@@ -215,8 +199,6 @@ union cvmx_rst_int {
uint64_t reserved_11_63:53;
#endif
} cn70xx;
struct cvmx_rst_int_cn70xx cn70xxp1;
struct cvmx_rst_int_s cn78xx;
};
union cvmx_rst_ocx {
@@ -230,7 +212,6 @@ union cvmx_rst_ocx {
uint64_t reserved_3_63:61;
#endif
} s;
struct cvmx_rst_ocx_s cn78xx;
};
union cvmx_rst_power_dbg {
@@ -244,7 +225,6 @@ union cvmx_rst_power_dbg {
uint64_t reserved_3_63:61;
#endif
} s;
struct cvmx_rst_power_dbg_s cn78xx;
};
union cvmx_rst_pp_power {
@@ -267,8 +247,6 @@ union cvmx_rst_pp_power {
uint64_t reserved_4_63:60;
#endif
} cn70xx;
struct cvmx_rst_pp_power_cn70xx cn70xxp1;
struct cvmx_rst_pp_power_s cn78xx;
};
union cvmx_rst_soft_prstx {
@@ -282,9 +260,6 @@ union cvmx_rst_soft_prstx {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_rst_soft_prstx_s cn70xx;
struct cvmx_rst_soft_prstx_s cn70xxp1;
struct cvmx_rst_soft_prstx_s cn78xx;
};
union cvmx_rst_soft_rst {
@@ -298,9 +273,6 @@ union cvmx_rst_soft_rst {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_rst_soft_rst_s cn70xx;
struct cvmx_rst_soft_rst_s cn70xxp1;
struct cvmx_rst_soft_rst_s cn78xx;
};
#endif

88
arch/mips/include/asm/octeon/cvmx-smix-defs.h
View File

@@ -186,23 +186,6 @@ union cvmx_smix_clk {
uint64_t reserved_21_63:43;
#endif
} cn30xx;
struct cvmx_smix_clk_cn30xx cn31xx;
struct cvmx_smix_clk_cn30xx cn38xx;
struct cvmx_smix_clk_cn30xx cn38xxp2;
struct cvmx_smix_clk_s cn50xx;
struct cvmx_smix_clk_s cn52xx;
struct cvmx_smix_clk_s cn52xxp1;
struct cvmx_smix_clk_s cn56xx;
struct cvmx_smix_clk_s cn56xxp1;
struct cvmx_smix_clk_cn30xx cn58xx;
struct cvmx_smix_clk_cn30xx cn58xxp1;
struct cvmx_smix_clk_s cn61xx;
struct cvmx_smix_clk_s cn63xx;
struct cvmx_smix_clk_s cn63xxp1;
struct cvmx_smix_clk_s cn66xx;
struct cvmx_smix_clk_s cn68xx;
struct cvmx_smix_clk_s cn68xxp1;
struct cvmx_smix_clk_s cnf71xx;
};
union cvmx_smix_cmd {
@@ -241,23 +224,6 @@ union cvmx_smix_cmd {
uint64_t reserved_17_63:47;
#endif
} cn30xx;
struct cvmx_smix_cmd_cn30xx cn31xx;
struct cvmx_smix_cmd_cn30xx cn38xx;
struct cvmx_smix_cmd_cn30xx cn38xxp2;
struct cvmx_smix_cmd_s cn50xx;
struct cvmx_smix_cmd_s cn52xx;
struct cvmx_smix_cmd_s cn52xxp1;
struct cvmx_smix_cmd_s cn56xx;
struct cvmx_smix_cmd_s cn56xxp1;
struct cvmx_smix_cmd_cn30xx cn58xx;
struct cvmx_smix_cmd_cn30xx cn58xxp1;
struct cvmx_smix_cmd_s cn61xx;
struct cvmx_smix_cmd_s cn63xx;
struct cvmx_smix_cmd_s cn63xxp1;
struct cvmx_smix_cmd_s cn66xx;
struct cvmx_smix_cmd_s cn68xx;
struct cvmx_smix_cmd_s cn68xxp1;
struct cvmx_smix_cmd_s cnf71xx;
};
union cvmx_smix_en {
@@ -271,24 +237,6 @@ union cvmx_smix_en {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_smix_en_s cn30xx;
struct cvmx_smix_en_s cn31xx;
struct cvmx_smix_en_s cn38xx;
struct cvmx_smix_en_s cn38xxp2;
struct cvmx_smix_en_s cn50xx;
struct cvmx_smix_en_s cn52xx;
struct cvmx_smix_en_s cn52xxp1;
struct cvmx_smix_en_s cn56xx;
struct cvmx_smix_en_s cn56xxp1;
struct cvmx_smix_en_s cn58xx;
struct cvmx_smix_en_s cn58xxp1;
struct cvmx_smix_en_s cn61xx;
struct cvmx_smix_en_s cn63xx;
struct cvmx_smix_en_s cn63xxp1;
struct cvmx_smix_en_s cn66xx;
struct cvmx_smix_en_s cn68xx;
struct cvmx_smix_en_s cn68xxp1;
struct cvmx_smix_en_s cnf71xx;
};
union cvmx_smix_rd_dat {
@@ -306,24 +254,6 @@ union cvmx_smix_rd_dat {
uint64_t reserved_18_63:46;
#endif
} s;
struct cvmx_smix_rd_dat_s cn30xx;
struct cvmx_smix_rd_dat_s cn31xx;
struct cvmx_smix_rd_dat_s cn38xx;
struct cvmx_smix_rd_dat_s cn38xxp2;
struct cvmx_smix_rd_dat_s cn50xx;
struct cvmx_smix_rd_dat_s cn52xx;
struct cvmx_smix_rd_dat_s cn52xxp1;
struct cvmx_smix_rd_dat_s cn56xx;
struct cvmx_smix_rd_dat_s cn56xxp1;
struct cvmx_smix_rd_dat_s cn58xx;
struct cvmx_smix_rd_dat_s cn58xxp1;
struct cvmx_smix_rd_dat_s cn61xx;
struct cvmx_smix_rd_dat_s cn63xx;
struct cvmx_smix_rd_dat_s cn63xxp1;
struct cvmx_smix_rd_dat_s cn66xx;
struct cvmx_smix_rd_dat_s cn68xx;
struct cvmx_smix_rd_dat_s cn68xxp1;
struct cvmx_smix_rd_dat_s cnf71xx;
};
union cvmx_smix_wr_dat {
@@ -341,24 +271,6 @@ union cvmx_smix_wr_dat {
uint64_t reserved_18_63:46;
#endif
} s;
struct cvmx_smix_wr_dat_s cn30xx;
struct cvmx_smix_wr_dat_s cn31xx;
struct cvmx_smix_wr_dat_s cn38xx;
struct cvmx_smix_wr_dat_s cn38xxp2;
struct cvmx_smix_wr_dat_s cn50xx;
struct cvmx_smix_wr_dat_s cn52xx;
struct cvmx_smix_wr_dat_s cn52xxp1;
struct cvmx_smix_wr_dat_s cn56xx;
struct cvmx_smix_wr_dat_s cn56xxp1;
struct cvmx_smix_wr_dat_s cn58xx;
struct cvmx_smix_wr_dat_s cn58xxp1;
struct cvmx_smix_wr_dat_s cn61xx;
struct cvmx_smix_wr_dat_s cn63xx;
struct cvmx_smix_wr_dat_s cn63xxp1;
struct cvmx_smix_wr_dat_s cn66xx;
struct cvmx_smix_wr_dat_s cn68xx;
struct cvmx_smix_wr_dat_s cn68xxp1;
struct cvmx_smix_wr_dat_s cnf71xx;
};
#endif

62
arch/mips/include/asm/octeon/cvmx-spxx-defs.h
View File

@@ -58,10 +58,6 @@ union cvmx_spxx_bckprs_cnt {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_spxx_bckprs_cnt_s cn38xx;
struct cvmx_spxx_bckprs_cnt_s cn38xxp2;
struct cvmx_spxx_bckprs_cnt_s cn58xx;
struct cvmx_spxx_bckprs_cnt_s cn58xxp1;
};
union cvmx_spxx_bist_stat {
@@ -79,10 +75,6 @@ union cvmx_spxx_bist_stat {
uint64_t reserved_3_63:61;
#endif
} s;
struct cvmx_spxx_bist_stat_s cn38xx;
struct cvmx_spxx_bist_stat_s cn38xxp2;
struct cvmx_spxx_bist_stat_s cn58xx;
struct cvmx_spxx_bist_stat_s cn58xxp1;
};
union cvmx_spxx_clk_ctl {
@@ -114,10 +106,6 @@ union cvmx_spxx_clk_ctl {
uint64_t reserved_17_63:47;
#endif
} s;
struct cvmx_spxx_clk_ctl_s cn38xx;
struct cvmx_spxx_clk_ctl_s cn38xxp2;
struct cvmx_spxx_clk_ctl_s cn58xx;
struct cvmx_spxx_clk_ctl_s cn58xxp1;
};
union cvmx_spxx_clk_stat {
@@ -145,10 +133,6 @@ union cvmx_spxx_clk_stat {
uint64_t reserved_11_63:53;
#endif
} s;
struct cvmx_spxx_clk_stat_s cn38xx;
struct cvmx_spxx_clk_stat_s cn38xxp2;
struct cvmx_spxx_clk_stat_s cn58xx;
struct cvmx_spxx_clk_stat_s cn58xxp1;
};
union cvmx_spxx_dbg_deskew_ctl {
@@ -190,10 +174,6 @@ union cvmx_spxx_dbg_deskew_ctl {
uint64_t reserved_30_63:34;
#endif
} s;
struct cvmx_spxx_dbg_deskew_ctl_s cn38xx;
struct cvmx_spxx_dbg_deskew_ctl_s cn38xxp2;
struct cvmx_spxx_dbg_deskew_ctl_s cn58xx;
struct cvmx_spxx_dbg_deskew_ctl_s cn58xxp1;
};
union cvmx_spxx_dbg_deskew_state {
@@ -213,10 +193,6 @@ union cvmx_spxx_dbg_deskew_state {
uint64_t reserved_9_63:55;
#endif
} s;
struct cvmx_spxx_dbg_deskew_state_s cn38xx;
struct cvmx_spxx_dbg_deskew_state_s cn38xxp2;
struct cvmx_spxx_dbg_deskew_state_s cn58xx;
struct cvmx_spxx_dbg_deskew_state_s cn58xxp1;
};
union cvmx_spxx_drv_ctl {
@@ -241,7 +217,6 @@ union cvmx_spxx_drv_ctl {
uint64_t reserved_16_63:48;
#endif
} cn38xx;
struct cvmx_spxx_drv_ctl_cn38xx cn38xxp2;
struct cvmx_spxx_drv_ctl_cn58xx {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_24_63:40;
@@ -257,7 +232,6 @@ union cvmx_spxx_drv_ctl {
uint64_t reserved_24_63:40;
#endif
} cn58xx;
struct cvmx_spxx_drv_ctl_cn58xx cn58xxp1;
};
union cvmx_spxx_err_ctl {
@@ -279,10 +253,6 @@ union cvmx_spxx_err_ctl {
uint64_t reserved_9_63:55;
#endif
} s;
struct cvmx_spxx_err_ctl_s cn38xx;
struct cvmx_spxx_err_ctl_s cn38xxp2;
struct cvmx_spxx_err_ctl_s cn58xx;
struct cvmx_spxx_err_ctl_s cn58xxp1;
};
union cvmx_spxx_int_dat {
@@ -304,10 +274,6 @@ union cvmx_spxx_int_dat {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_spxx_int_dat_s cn38xx;
struct cvmx_spxx_int_dat_s cn38xxp2;
struct cvmx_spxx_int_dat_s cn58xx;
struct cvmx_spxx_int_dat_s cn58xxp1;
};
union cvmx_spxx_int_msk {
@@ -341,10 +307,6 @@ union cvmx_spxx_int_msk {
uint64_t reserved_12_63:52;
#endif
} s;
struct cvmx_spxx_int_msk_s cn38xx;
struct cvmx_spxx_int_msk_s cn38xxp2;
struct cvmx_spxx_int_msk_s cn58xx;
struct cvmx_spxx_int_msk_s cn58xxp1;
};
union cvmx_spxx_int_reg {
@@ -382,10 +344,6 @@ union cvmx_spxx_int_reg {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_spxx_int_reg_s cn38xx;
struct cvmx_spxx_int_reg_s cn38xxp2;
struct cvmx_spxx_int_reg_s cn58xx;
struct cvmx_spxx_int_reg_s cn58xxp1;
};
union cvmx_spxx_int_sync {
@@ -419,10 +377,6 @@ union cvmx_spxx_int_sync {
uint64_t reserved_12_63:52;
#endif
} s;
struct cvmx_spxx_int_sync_s cn38xx;
struct cvmx_spxx_int_sync_s cn38xxp2;
struct cvmx_spxx_int_sync_s cn58xx;
struct cvmx_spxx_int_sync_s cn58xxp1;
};
union cvmx_spxx_tpa_acc {
@@ -436,10 +390,6 @@ union cvmx_spxx_tpa_acc {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_spxx_tpa_acc_s cn38xx;
struct cvmx_spxx_tpa_acc_s cn38xxp2;
struct cvmx_spxx_tpa_acc_s cn58xx;
struct cvmx_spxx_tpa_acc_s cn58xxp1;
};
union cvmx_spxx_tpa_max {
@@ -453,10 +403,6 @@ union cvmx_spxx_tpa_max {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_spxx_tpa_max_s cn38xx;
struct cvmx_spxx_tpa_max_s cn38xxp2;
struct cvmx_spxx_tpa_max_s cn58xx;
struct cvmx_spxx_tpa_max_s cn58xxp1;
};
union cvmx_spxx_tpa_sel {
@@ -470,10 +416,6 @@ union cvmx_spxx_tpa_sel {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_spxx_tpa_sel_s cn38xx;
struct cvmx_spxx_tpa_sel_s cn38xxp2;
struct cvmx_spxx_tpa_sel_s cn58xx;
struct cvmx_spxx_tpa_sel_s cn58xxp1;
};
union cvmx_spxx_trn4_ctl {
@@ -499,10 +441,6 @@ union cvmx_spxx_trn4_ctl {
uint64_t reserved_13_63:51;
#endif
} s;
struct cvmx_spxx_trn4_ctl_s cn38xx;
struct cvmx_spxx_trn4_ctl_s cn38xxp2;
struct cvmx_spxx_trn4_ctl_s cn58xx;
struct cvmx_spxx_trn4_ctl_s cn58xxp1;
};
#endif

123
arch/mips/include/asm/octeon/cvmx-sriox-defs.h
View File

@@ -112,8 +112,6 @@ union cvmx_sriox_acc_ctrl {
uint64_t reserved_3_63:61;
#endif
} cn63xx;
struct cvmx_sriox_acc_ctrl_cn63xx cn63xxp1;
struct cvmx_sriox_acc_ctrl_s cn66xx;
};
union cvmx_sriox_asmbly_id {
@@ -129,9 +127,6 @@ union cvmx_sriox_asmbly_id {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_sriox_asmbly_id_s cn63xx;
struct cvmx_sriox_asmbly_id_s cn63xxp1;
struct cvmx_sriox_asmbly_id_s cn66xx;
};
union cvmx_sriox_asmbly_info {
@@ -147,9 +142,6 @@ union cvmx_sriox_asmbly_info {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_sriox_asmbly_info_s cn63xx;
struct cvmx_sriox_asmbly_info_s cn63xxp1;
struct cvmx_sriox_asmbly_info_s cn66xx;
};
union cvmx_sriox_bell_resp_ctrl {
@@ -169,9 +161,6 @@ union cvmx_sriox_bell_resp_ctrl {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_sriox_bell_resp_ctrl_s cn63xx;
struct cvmx_sriox_bell_resp_ctrl_s cn63xxp1;
struct cvmx_sriox_bell_resp_ctrl_s cn66xx;
};
union cvmx_sriox_bist_status {
@@ -305,7 +294,6 @@ union cvmx_sriox_bist_status {
uint64_t reserved_44_63:20;
#endif
} cn63xxp1;
struct cvmx_sriox_bist_status_s cn66xx;
};
union cvmx_sriox_imsg_ctrl {
@@ -343,9 +331,6 @@ union cvmx_sriox_imsg_ctrl {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_sriox_imsg_ctrl_s cn63xx;
struct cvmx_sriox_imsg_ctrl_s cn63xxp1;
struct cvmx_sriox_imsg_ctrl_s cn66xx;
};
union cvmx_sriox_imsg_inst_hdrx {
@@ -383,9 +368,6 @@ union cvmx_sriox_imsg_inst_hdrx {
uint64_t r:1;
#endif
} s;
struct cvmx_sriox_imsg_inst_hdrx_s cn63xx;
struct cvmx_sriox_imsg_inst_hdrx_s cn63xxp1;
struct cvmx_sriox_imsg_inst_hdrx_s cn66xx;
};
union cvmx_sriox_imsg_qos_grpx {
@@ -443,9 +425,6 @@ union cvmx_sriox_imsg_qos_grpx {
uint64_t reserved_63_63:1;
#endif
} s;
struct cvmx_sriox_imsg_qos_grpx_s cn63xx;
struct cvmx_sriox_imsg_qos_grpx_s cn63xxp1;
struct cvmx_sriox_imsg_qos_grpx_s cn66xx;
};
union cvmx_sriox_imsg_statusx {
@@ -503,9 +482,6 @@ union cvmx_sriox_imsg_statusx {
uint64_t val1:1;
#endif
} s;
struct cvmx_sriox_imsg_statusx_s cn63xx;
struct cvmx_sriox_imsg_statusx_s cn63xxp1;
struct cvmx_sriox_imsg_statusx_s cn66xx;
};
union cvmx_sriox_imsg_vport_thr {
@@ -541,9 +517,6 @@ union cvmx_sriox_imsg_vport_thr {
uint64_t reserved_54_63:10;
#endif
} s;
struct cvmx_sriox_imsg_vport_thr_s cn63xx;
struct cvmx_sriox_imsg_vport_thr_s cn63xxp1;
struct cvmx_sriox_imsg_vport_thr_s cn66xx;
};
union cvmx_sriox_imsg_vport_thr2 {
@@ -563,7 +536,6 @@ union cvmx_sriox_imsg_vport_thr2 {
uint64_t reserved_46_63:18;
#endif
} s;
struct cvmx_sriox_imsg_vport_thr2_s cn66xx;
};
union cvmx_sriox_int2_enable {
@@ -577,8 +549,6 @@ union cvmx_sriox_int2_enable {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_sriox_int2_enable_s cn63xx;
struct cvmx_sriox_int2_enable_s cn66xx;
};
union cvmx_sriox_int2_reg {
@@ -596,8 +566,6 @@ union cvmx_sriox_int2_reg {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_sriox_int2_reg_s cn63xx;
struct cvmx_sriox_int2_reg_s cn66xx;
};
union cvmx_sriox_int_enable {
@@ -663,7 +631,6 @@ union cvmx_sriox_int_enable {
uint64_t reserved_27_63:37;
#endif
} s;
struct cvmx_sriox_int_enable_s cn63xx;
struct cvmx_sriox_int_enable_cn63xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_22_63:42;
@@ -715,7 +682,6 @@ union cvmx_sriox_int_enable {
uint64_t reserved_22_63:42;
#endif
} cn63xxp1;
struct cvmx_sriox_int_enable_s cn66xx;
};
union cvmx_sriox_int_info0 {
@@ -743,9 +709,6 @@ union cvmx_sriox_int_info0 {
uint64_t cmd:4;
#endif
} s;
struct cvmx_sriox_int_info0_s cn63xx;
struct cvmx_sriox_int_info0_s cn63xxp1;
struct cvmx_sriox_int_info0_s cn66xx;
};
union cvmx_sriox_int_info1 {
@@ -757,9 +720,6 @@ union cvmx_sriox_int_info1 {
uint64_t info1:64;
#endif
} s;
struct cvmx_sriox_int_info1_s cn63xx;
struct cvmx_sriox_int_info1_s cn63xxp1;
struct cvmx_sriox_int_info1_s cn66xx;
};
union cvmx_sriox_int_info2 {
@@ -791,9 +751,6 @@ union cvmx_sriox_int_info2 {
uint64_t prio:2;
#endif
} s;
struct cvmx_sriox_int_info2_s cn63xx;
struct cvmx_sriox_int_info2_s cn63xxp1;
struct cvmx_sriox_int_info2_s cn66xx;
};
union cvmx_sriox_int_info3 {
@@ -813,9 +770,6 @@ union cvmx_sriox_int_info3 {
uint64_t prio:2;
#endif
} s;
struct cvmx_sriox_int_info3_s cn63xx;
struct cvmx_sriox_int_info3_s cn63xxp1;
struct cvmx_sriox_int_info3_s cn66xx;
};
union cvmx_sriox_int_reg {
@@ -885,7 +839,6 @@ union cvmx_sriox_int_reg {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_sriox_int_reg_s cn63xx;
struct cvmx_sriox_int_reg_cn63xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_22_63:42;
@@ -937,7 +890,6 @@ union cvmx_sriox_int_reg {
uint64_t reserved_22_63:42;
#endif
} cn63xxp1;
struct cvmx_sriox_int_reg_s cn66xx;
};
union cvmx_sriox_ip_feature {
@@ -990,8 +942,6 @@ union cvmx_sriox_ip_feature {
uint64_t ops:32;
#endif
} cn63xx;
struct cvmx_sriox_ip_feature_cn63xx cn63xxp1;
struct cvmx_sriox_ip_feature_s cn66xx;
};
union cvmx_sriox_mac_buffers {
@@ -1021,8 +971,6 @@ union cvmx_sriox_mac_buffers {
uint64_t reserved_56_63:8;
#endif
} s;
struct cvmx_sriox_mac_buffers_s cn63xx;
struct cvmx_sriox_mac_buffers_s cn66xx;
};
union cvmx_sriox_maint_op {
@@ -1044,9 +992,6 @@ union cvmx_sriox_maint_op {
uint64_t wr_data:32;
#endif
} s;
struct cvmx_sriox_maint_op_s cn63xx;
struct cvmx_sriox_maint_op_s cn63xxp1;
struct cvmx_sriox_maint_op_s cn66xx;
};
union cvmx_sriox_maint_rd_data {
@@ -1062,9 +1007,6 @@ union cvmx_sriox_maint_rd_data {
uint64_t reserved_33_63:31;
#endif
} s;
struct cvmx_sriox_maint_rd_data_s cn63xx;
struct cvmx_sriox_maint_rd_data_s cn63xxp1;
struct cvmx_sriox_maint_rd_data_s cn66xx;
};
union cvmx_sriox_mce_tx_ctl {
@@ -1078,9 +1020,6 @@ union cvmx_sriox_mce_tx_ctl {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_sriox_mce_tx_ctl_s cn63xx;
struct cvmx_sriox_mce_tx_ctl_s cn63xxp1;
struct cvmx_sriox_mce_tx_ctl_s cn66xx;
};
union cvmx_sriox_mem_op_ctrl {
@@ -1106,9 +1045,6 @@ union cvmx_sriox_mem_op_ctrl {
uint64_t reserved_10_63:54;
#endif
} s;
struct cvmx_sriox_mem_op_ctrl_s cn63xx;
struct cvmx_sriox_mem_op_ctrl_s cn63xxp1;
struct cvmx_sriox_mem_op_ctrl_s cn66xx;
};
union cvmx_sriox_omsg_ctrlx {
@@ -1140,7 +1076,6 @@ union cvmx_sriox_omsg_ctrlx {
uint64_t testmode:1;
#endif
} s;
struct cvmx_sriox_omsg_ctrlx_s cn63xx;
struct cvmx_sriox_omsg_ctrlx_cn63xxp1 {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t testmode:1;
@@ -1166,7 +1101,6 @@ union cvmx_sriox_omsg_ctrlx {
uint64_t testmode:1;
#endif
} cn63xxp1;
struct cvmx_sriox_omsg_ctrlx_s cn66xx;
};
union cvmx_sriox_omsg_done_countsx {
@@ -1182,8 +1116,6 @@ union cvmx_sriox_omsg_done_countsx {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_sriox_omsg_done_countsx_s cn63xx;
struct cvmx_sriox_omsg_done_countsx_s cn66xx;
};
union cvmx_sriox_omsg_fmp_mrx {
@@ -1225,9 +1157,6 @@ union cvmx_sriox_omsg_fmp_mrx {
uint64_t reserved_15_63:49;
#endif
} s;
struct cvmx_sriox_omsg_fmp_mrx_s cn63xx;
struct cvmx_sriox_omsg_fmp_mrx_s cn63xxp1;
struct cvmx_sriox_omsg_fmp_mrx_s cn66xx;
};
union cvmx_sriox_omsg_nmp_mrx {
@@ -1269,9 +1198,6 @@ union cvmx_sriox_omsg_nmp_mrx {
uint64_t reserved_15_63:49;
#endif
} s;
struct cvmx_sriox_omsg_nmp_mrx_s cn63xx;
struct cvmx_sriox_omsg_nmp_mrx_s cn63xxp1;
struct cvmx_sriox_omsg_nmp_mrx_s cn66xx;
};
union cvmx_sriox_omsg_portx {
@@ -1302,8 +1228,6 @@ union cvmx_sriox_omsg_portx {
uint64_t reserved_32_63:32;
#endif
} cn63xx;
struct cvmx_sriox_omsg_portx_cn63xx cn63xxp1;
struct cvmx_sriox_omsg_portx_s cn66xx;
};
union cvmx_sriox_omsg_silo_thr {
@@ -1317,8 +1241,6 @@ union cvmx_sriox_omsg_silo_thr {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_sriox_omsg_silo_thr_s cn63xx;
struct cvmx_sriox_omsg_silo_thr_s cn66xx;
};
union cvmx_sriox_omsg_sp_mrx {
@@ -1362,9 +1284,6 @@ union cvmx_sriox_omsg_sp_mrx {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_sriox_omsg_sp_mrx_s cn63xx;
struct cvmx_sriox_omsg_sp_mrx_s cn63xxp1;
struct cvmx_sriox_omsg_sp_mrx_s cn66xx;
};
union cvmx_sriox_priox_in_use {
@@ -1380,8 +1299,6 @@ union cvmx_sriox_priox_in_use {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_sriox_priox_in_use_s cn63xx;
struct cvmx_sriox_priox_in_use_s cn66xx;
};
union cvmx_sriox_rx_bell {
@@ -1409,9 +1326,6 @@ union cvmx_sriox_rx_bell {
uint64_t reserved_48_63:16;
#endif
} s;
struct cvmx_sriox_rx_bell_s cn63xx;
struct cvmx_sriox_rx_bell_s cn63xxp1;
struct cvmx_sriox_rx_bell_s cn66xx;
};
union cvmx_sriox_rx_bell_seq {
@@ -1427,9 +1341,6 @@ union cvmx_sriox_rx_bell_seq {
uint64_t reserved_40_63:24;
#endif
} s;
struct cvmx_sriox_rx_bell_seq_s cn63xx;
struct cvmx_sriox_rx_bell_seq_s cn63xxp1;
struct cvmx_sriox_rx_bell_seq_s cn66xx;
};
union cvmx_sriox_rx_status {
@@ -1457,9 +1368,6 @@ union cvmx_sriox_rx_status {
uint64_t rtn_pr3:8;
#endif
} s;
struct cvmx_sriox_rx_status_s cn63xx;
struct cvmx_sriox_rx_status_s cn63xxp1;
struct cvmx_sriox_rx_status_s cn66xx;
};
union cvmx_sriox_s2m_typex {
@@ -1491,9 +1399,6 @@ union cvmx_sriox_s2m_typex {
uint64_t reserved_19_63:45;
#endif
} s;
struct cvmx_sriox_s2m_typex_s cn63xx;
struct cvmx_sriox_s2m_typex_s cn63xxp1;
struct cvmx_sriox_s2m_typex_s cn66xx;
};
union cvmx_sriox_seq {
@@ -1507,9 +1412,6 @@ union cvmx_sriox_seq {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_sriox_seq_s cn63xx;
struct cvmx_sriox_seq_s cn63xxp1;
struct cvmx_sriox_seq_s cn66xx;
};
union cvmx_sriox_status_reg {
@@ -1525,9 +1427,6 @@ union cvmx_sriox_status_reg {
uint64_t reserved_2_63:62;
#endif
} s;
struct cvmx_sriox_status_reg_s cn63xx;
struct cvmx_sriox_status_reg_s cn63xxp1;
struct cvmx_sriox_status_reg_s cn66xx;
};
union cvmx_sriox_tag_ctrl {
@@ -1549,9 +1448,6 @@ union cvmx_sriox_tag_ctrl {
uint64_t reserved_17_63:47;
#endif
} s;
struct cvmx_sriox_tag_ctrl_s cn63xx;
struct cvmx_sriox_tag_ctrl_s cn63xxp1;
struct cvmx_sriox_tag_ctrl_s cn66xx;
};
union cvmx_sriox_tlp_credits {
@@ -1573,9 +1469,6 @@ union cvmx_sriox_tlp_credits {
uint64_t reserved_28_63:36;
#endif
} s;
struct cvmx_sriox_tlp_credits_s cn63xx;
struct cvmx_sriox_tlp_credits_s cn63xxp1;
struct cvmx_sriox_tlp_credits_s cn66xx;
};
union cvmx_sriox_tx_bell {
@@ -1605,9 +1498,6 @@ union cvmx_sriox_tx_bell {
uint64_t reserved_48_63:16;
#endif
} s;
struct cvmx_sriox_tx_bell_s cn63xx;
struct cvmx_sriox_tx_bell_s cn63xxp1;
struct cvmx_sriox_tx_bell_s cn66xx;
};
union cvmx_sriox_tx_bell_info {
@@ -1639,9 +1529,6 @@ union cvmx_sriox_tx_bell_info {
uint64_t reserved_48_63:16;
#endif
} s;
struct cvmx_sriox_tx_bell_info_s cn63xx;
struct cvmx_sriox_tx_bell_info_s cn63xxp1;
struct cvmx_sriox_tx_bell_info_s cn66xx;
};
union cvmx_sriox_tx_ctrl {
@@ -1675,9 +1562,6 @@ union cvmx_sriox_tx_ctrl {
uint64_t reserved_53_63:11;
#endif
} s;
struct cvmx_sriox_tx_ctrl_s cn63xx;
struct cvmx_sriox_tx_ctrl_s cn63xxp1;
struct cvmx_sriox_tx_ctrl_s cn66xx;
};
union cvmx_sriox_tx_emphasis {
@@ -1691,8 +1575,6 @@ union cvmx_sriox_tx_emphasis {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_sriox_tx_emphasis_s cn63xx;
struct cvmx_sriox_tx_emphasis_s cn66xx;
};
union cvmx_sriox_tx_status {
@@ -1712,9 +1594,6 @@ union cvmx_sriox_tx_status {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_sriox_tx_status_s cn63xx;
struct cvmx_sriox_tx_status_s cn63xxp1;
struct cvmx_sriox_tx_status_s cn66xx;
};
union cvmx_sriox_wr_done_counts {
@@ -1730,8 +1609,6 @@ union cvmx_sriox_wr_done_counts {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_sriox_wr_done_counts_s cn63xx;
struct cvmx_sriox_wr_done_counts_s cn66xx;
};
#endif

22
arch/mips/include/asm/octeon/cvmx-srxx-defs.h
View File

@@ -52,10 +52,6 @@ union cvmx_srxx_com_ctl {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_srxx_com_ctl_s cn38xx;
struct cvmx_srxx_com_ctl_s cn38xxp2;
struct cvmx_srxx_com_ctl_s cn58xx;
struct cvmx_srxx_com_ctl_s cn58xxp1;
};
union cvmx_srxx_ign_rx_full {
@@ -69,10 +65,6 @@ union cvmx_srxx_ign_rx_full {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_srxx_ign_rx_full_s cn38xx;
struct cvmx_srxx_ign_rx_full_s cn38xxp2;
struct cvmx_srxx_ign_rx_full_s cn58xx;
struct cvmx_srxx_ign_rx_full_s cn58xxp1;
};
union cvmx_srxx_spi4_calx {
@@ -94,10 +86,6 @@ union cvmx_srxx_spi4_calx {
uint64_t reserved_17_63:47;
#endif
} s;
struct cvmx_srxx_spi4_calx_s cn38xx;
struct cvmx_srxx_spi4_calx_s cn38xxp2;
struct cvmx_srxx_spi4_calx_s cn58xx;
struct cvmx_srxx_spi4_calx_s cn58xxp1;
};
union cvmx_srxx_spi4_stat {
@@ -115,10 +103,6 @@ union cvmx_srxx_spi4_stat {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_srxx_spi4_stat_s cn38xx;
struct cvmx_srxx_spi4_stat_s cn38xxp2;
struct cvmx_srxx_spi4_stat_s cn58xx;
struct cvmx_srxx_spi4_stat_s cn58xxp1;
};
union cvmx_srxx_sw_tick_ctl {
@@ -140,9 +124,6 @@ union cvmx_srxx_sw_tick_ctl {
uint64_t reserved_14_63:50;
#endif
} s;
struct cvmx_srxx_sw_tick_ctl_s cn38xx;
struct cvmx_srxx_sw_tick_ctl_s cn58xx;
struct cvmx_srxx_sw_tick_ctl_s cn58xxp1;
};
union cvmx_srxx_sw_tick_dat {
@@ -154,9 +135,6 @@ union cvmx_srxx_sw_tick_dat {
uint64_t dat:64;
#endif
} s;
struct cvmx_srxx_sw_tick_dat_s cn38xx;
struct cvmx_srxx_sw_tick_dat_s cn58xx;
struct cvmx_srxx_sw_tick_dat_s cn58xxp1;
};
#endif

64
arch/mips/include/asm/octeon/cvmx-stxx-defs.h
View File

@@ -64,10 +64,6 @@ union cvmx_stxx_arb_ctl {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_stxx_arb_ctl_s cn38xx;
struct cvmx_stxx_arb_ctl_s cn38xxp2;
struct cvmx_stxx_arb_ctl_s cn58xx;
struct cvmx_stxx_arb_ctl_s cn58xxp1;
};
union cvmx_stxx_bckprs_cnt {
@@ -81,10 +77,6 @@ union cvmx_stxx_bckprs_cnt {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_stxx_bckprs_cnt_s cn38xx;
struct cvmx_stxx_bckprs_cnt_s cn38xxp2;
struct cvmx_stxx_bckprs_cnt_s cn58xx;
struct cvmx_stxx_bckprs_cnt_s cn58xxp1;
};
union cvmx_stxx_com_ctl {
@@ -102,10 +94,6 @@ union cvmx_stxx_com_ctl {
uint64_t reserved_4_63:60;
#endif
} s;
struct cvmx_stxx_com_ctl_s cn38xx;
struct cvmx_stxx_com_ctl_s cn38xxp2;
struct cvmx_stxx_com_ctl_s cn58xx;
struct cvmx_stxx_com_ctl_s cn58xxp1;
};
union cvmx_stxx_dip_cnt {
@@ -121,10 +109,6 @@ union cvmx_stxx_dip_cnt {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_stxx_dip_cnt_s cn38xx;
struct cvmx_stxx_dip_cnt_s cn38xxp2;
struct cvmx_stxx_dip_cnt_s cn58xx;
struct cvmx_stxx_dip_cnt_s cn58xxp1;
};
union cvmx_stxx_ign_cal {
@@ -138,10 +122,6 @@ union cvmx_stxx_ign_cal {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_stxx_ign_cal_s cn38xx;
struct cvmx_stxx_ign_cal_s cn38xxp2;
struct cvmx_stxx_ign_cal_s cn58xx;
struct cvmx_stxx_ign_cal_s cn58xxp1;
};
union cvmx_stxx_int_msk {
@@ -169,10 +149,6 @@ union cvmx_stxx_int_msk {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_stxx_int_msk_s cn38xx;
struct cvmx_stxx_int_msk_s cn38xxp2;
struct cvmx_stxx_int_msk_s cn58xx;
struct cvmx_stxx_int_msk_s cn58xxp1;
};
union cvmx_stxx_int_reg {
@@ -202,10 +178,6 @@ union cvmx_stxx_int_reg {
uint64_t reserved_9_63:55;
#endif
} s;
struct cvmx_stxx_int_reg_s cn38xx;
struct cvmx_stxx_int_reg_s cn38xxp2;
struct cvmx_stxx_int_reg_s cn58xx;
struct cvmx_stxx_int_reg_s cn58xxp1;
};
union cvmx_stxx_int_sync {
@@ -233,10 +205,6 @@ union cvmx_stxx_int_sync {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_stxx_int_sync_s cn38xx;
struct cvmx_stxx_int_sync_s cn38xxp2;
struct cvmx_stxx_int_sync_s cn58xx;
struct cvmx_stxx_int_sync_s cn58xxp1;
};
union cvmx_stxx_min_bst {
@@ -250,10 +218,6 @@ union cvmx_stxx_min_bst {
uint64_t reserved_9_63:55;
#endif
} s;
struct cvmx_stxx_min_bst_s cn38xx;
struct cvmx_stxx_min_bst_s cn38xxp2;
struct cvmx_stxx_min_bst_s cn58xx;
struct cvmx_stxx_min_bst_s cn58xxp1;
};
union cvmx_stxx_spi4_calx {
@@ -275,10 +239,6 @@ union cvmx_stxx_spi4_calx {
uint64_t reserved_17_63:47;
#endif
} s;
struct cvmx_stxx_spi4_calx_s cn38xx;
struct cvmx_stxx_spi4_calx_s cn38xxp2;
struct cvmx_stxx_spi4_calx_s cn58xx;
struct cvmx_stxx_spi4_calx_s cn58xxp1;
};
union cvmx_stxx_spi4_dat {
@@ -294,10 +254,6 @@ union cvmx_stxx_spi4_dat {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_stxx_spi4_dat_s cn38xx;
struct cvmx_stxx_spi4_dat_s cn38xxp2;
struct cvmx_stxx_spi4_dat_s cn58xx;
struct cvmx_stxx_spi4_dat_s cn58xxp1;
};
union cvmx_stxx_spi4_stat {
@@ -315,10 +271,6 @@ union cvmx_stxx_spi4_stat {
uint64_t reserved_16_63:48;
#endif
} s;
struct cvmx_stxx_spi4_stat_s cn38xx;
struct cvmx_stxx_spi4_stat_s cn38xxp2;
struct cvmx_stxx_spi4_stat_s cn58xx;
struct cvmx_stxx_spi4_stat_s cn58xxp1;
};
union cvmx_stxx_stat_bytes_hi {
@@ -332,10 +284,6 @@ union cvmx_stxx_stat_bytes_hi {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_stxx_stat_bytes_hi_s cn38xx;
struct cvmx_stxx_stat_bytes_hi_s cn38xxp2;
struct cvmx_stxx_stat_bytes_hi_s cn58xx;
struct cvmx_stxx_stat_bytes_hi_s cn58xxp1;
};
union cvmx_stxx_stat_bytes_lo {
@@ -349,10 +297,6 @@ union cvmx_stxx_stat_bytes_lo {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_stxx_stat_bytes_lo_s cn38xx;
struct cvmx_stxx_stat_bytes_lo_s cn38xxp2;
struct cvmx_stxx_stat_bytes_lo_s cn58xx;
struct cvmx_stxx_stat_bytes_lo_s cn58xxp1;
};
union cvmx_stxx_stat_ctl {
@@ -368,10 +312,6 @@ union cvmx_stxx_stat_ctl {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_stxx_stat_ctl_s cn38xx;
struct cvmx_stxx_stat_ctl_s cn38xxp2;
struct cvmx_stxx_stat_ctl_s cn58xx;
struct cvmx_stxx_stat_ctl_s cn58xxp1;
};
union cvmx_stxx_stat_pkt_xmt {
@@ -385,10 +325,6 @@ union cvmx_stxx_stat_pkt_xmt {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_stxx_stat_pkt_xmt_s cn38xx;
struct cvmx_stxx_stat_pkt_xmt_s cn38xxp2;
struct cvmx_stxx_stat_pkt_xmt_s cn58xx;
struct cvmx_stxx_stat_pkt_xmt_s cn58xxp1;
};
#endif

89
arch/mips/include/asm/octeon/cvmx-uctlx-defs.h
View File

@@ -63,13 +63,6 @@ union cvmx_uctlx_bist_status {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_uctlx_bist_status_s cn61xx;
struct cvmx_uctlx_bist_status_s cn63xx;
struct cvmx_uctlx_bist_status_s cn63xxp1;
struct cvmx_uctlx_bist_status_s cn66xx;
struct cvmx_uctlx_bist_status_s cn68xx;
struct cvmx_uctlx_bist_status_s cn68xxp1;
struct cvmx_uctlx_bist_status_s cnf71xx;
};
union cvmx_uctlx_clk_rst_ctl {
@@ -121,13 +114,6 @@ union cvmx_uctlx_clk_rst_ctl {
uint64_t reserved_25_63:39;
#endif
} s;
struct cvmx_uctlx_clk_rst_ctl_s cn61xx;
struct cvmx_uctlx_clk_rst_ctl_s cn63xx;
struct cvmx_uctlx_clk_rst_ctl_s cn63xxp1;
struct cvmx_uctlx_clk_rst_ctl_s cn66xx;
struct cvmx_uctlx_clk_rst_ctl_s cn68xx;
struct cvmx_uctlx_clk_rst_ctl_s cn68xxp1;
struct cvmx_uctlx_clk_rst_ctl_s cnf71xx;
};
union cvmx_uctlx_ehci_ctl {
@@ -161,13 +147,6 @@ union cvmx_uctlx_ehci_ctl {
uint64_t reserved_20_63:44;
#endif
} s;
struct cvmx_uctlx_ehci_ctl_s cn61xx;
struct cvmx_uctlx_ehci_ctl_s cn63xx;
struct cvmx_uctlx_ehci_ctl_s cn63xxp1;
struct cvmx_uctlx_ehci_ctl_s cn66xx;
struct cvmx_uctlx_ehci_ctl_s cn68xx;
struct cvmx_uctlx_ehci_ctl_s cn68xxp1;
struct cvmx_uctlx_ehci_ctl_s cnf71xx;
};
union cvmx_uctlx_ehci_fla {
@@ -181,13 +160,6 @@ union cvmx_uctlx_ehci_fla {
uint64_t reserved_6_63:58;
#endif
} s;
struct cvmx_uctlx_ehci_fla_s cn61xx;
struct cvmx_uctlx_ehci_fla_s cn63xx;
struct cvmx_uctlx_ehci_fla_s cn63xxp1;
struct cvmx_uctlx_ehci_fla_s cn66xx;
struct cvmx_uctlx_ehci_fla_s cn68xx;
struct cvmx_uctlx_ehci_fla_s cn68xxp1;
struct cvmx_uctlx_ehci_fla_s cnf71xx;
};
union cvmx_uctlx_erto_ctl {
@@ -203,13 +175,6 @@ union cvmx_uctlx_erto_ctl {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_uctlx_erto_ctl_s cn61xx;
struct cvmx_uctlx_erto_ctl_s cn63xx;
struct cvmx_uctlx_erto_ctl_s cn63xxp1;
struct cvmx_uctlx_erto_ctl_s cn66xx;
struct cvmx_uctlx_erto_ctl_s cn68xx;
struct cvmx_uctlx_erto_ctl_s cn68xxp1;
struct cvmx_uctlx_erto_ctl_s cnf71xx;
};
union cvmx_uctlx_if_ena {
@@ -223,13 +188,6 @@ union cvmx_uctlx_if_ena {
uint64_t reserved_1_63:63;
#endif
} s;
struct cvmx_uctlx_if_ena_s cn61xx;
struct cvmx_uctlx_if_ena_s cn63xx;
struct cvmx_uctlx_if_ena_s cn63xxp1;
struct cvmx_uctlx_if_ena_s cn66xx;
struct cvmx_uctlx_if_ena_s cn68xx;
struct cvmx_uctlx_if_ena_s cn68xxp1;
struct cvmx_uctlx_if_ena_s cnf71xx;
};
union cvmx_uctlx_int_ena {
@@ -257,13 +215,6 @@ union cvmx_uctlx_int_ena {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_uctlx_int_ena_s cn61xx;
struct cvmx_uctlx_int_ena_s cn63xx;
struct cvmx_uctlx_int_ena_s cn63xxp1;
struct cvmx_uctlx_int_ena_s cn66xx;
struct cvmx_uctlx_int_ena_s cn68xx;
struct cvmx_uctlx_int_ena_s cn68xxp1;
struct cvmx_uctlx_int_ena_s cnf71xx;
};
union cvmx_uctlx_int_reg {
@@ -291,13 +242,6 @@ union cvmx_uctlx_int_reg {
uint64_t reserved_8_63:56;
#endif
} s;
struct cvmx_uctlx_int_reg_s cn61xx;
struct cvmx_uctlx_int_reg_s cn63xx;
struct cvmx_uctlx_int_reg_s cn63xxp1;
struct cvmx_uctlx_int_reg_s cn66xx;
struct cvmx_uctlx_int_reg_s cn68xx;
struct cvmx_uctlx_int_reg_s cn68xxp1;
struct cvmx_uctlx_int_reg_s cnf71xx;
};
union cvmx_uctlx_ohci_ctl {
@@ -329,13 +273,6 @@ union cvmx_uctlx_ohci_ctl {
uint64_t reserved_19_63:45;
#endif
} s;
struct cvmx_uctlx_ohci_ctl_s cn61xx;
struct cvmx_uctlx_ohci_ctl_s cn63xx;
struct cvmx_uctlx_ohci_ctl_s cn63xxp1;
struct cvmx_uctlx_ohci_ctl_s cn66xx;
struct cvmx_uctlx_ohci_ctl_s cn68xx;
struct cvmx_uctlx_ohci_ctl_s cn68xxp1;
struct cvmx_uctlx_ohci_ctl_s cnf71xx;
};
union cvmx_uctlx_orto_ctl {
@@ -351,13 +288,6 @@ union cvmx_uctlx_orto_ctl {
uint64_t reserved_32_63:32;
#endif
} s;
struct cvmx_uctlx_orto_ctl_s cn61xx;
struct cvmx_uctlx_orto_ctl_s cn63xx;
struct cvmx_uctlx_orto_ctl_s cn63xxp1;
struct cvmx_uctlx_orto_ctl_s cn66xx;
struct cvmx_uctlx_orto_ctl_s cn68xx;
struct cvmx_uctlx_orto_ctl_s cn68xxp1;
struct cvmx_uctlx_orto_ctl_s cnf71xx;
};
union cvmx_uctlx_ppaf_wm {
@@ -371,11 +301,6 @@ union cvmx_uctlx_ppaf_wm {
uint64_t reserved_5_63:59;
#endif
} s;
struct cvmx_uctlx_ppaf_wm_s cn61xx;
struct cvmx_uctlx_ppaf_wm_s cn63xx;
struct cvmx_uctlx_ppaf_wm_s cn63xxp1;
struct cvmx_uctlx_ppaf_wm_s cn66xx;
struct cvmx_uctlx_ppaf_wm_s cnf71xx;
};
union cvmx_uctlx_uphy_ctl_status {
@@ -407,13 +332,6 @@ union cvmx_uctlx_uphy_ctl_status {
uint64_t reserved_10_63:54;
#endif
} s;
struct cvmx_uctlx_uphy_ctl_status_s cn61xx;
struct cvmx_uctlx_uphy_ctl_status_s cn63xx;
struct cvmx_uctlx_uphy_ctl_status_s cn63xxp1;
struct cvmx_uctlx_uphy_ctl_status_s cn66xx;
struct cvmx_uctlx_uphy_ctl_status_s cn68xx;
struct cvmx_uctlx_uphy_ctl_status_s cn68xxp1;
struct cvmx_uctlx_uphy_ctl_status_s cnf71xx;
};
union cvmx_uctlx_uphy_portx_ctl_status {
@@ -463,13 +381,6 @@ union cvmx_uctlx_uphy_portx_ctl_status {
uint64_t reserved_43_63:21;
#endif
} s;
struct cvmx_uctlx_uphy_portx_ctl_status_s cn61xx;
struct cvmx_uctlx_uphy_portx_ctl_status_s cn63xx;
struct cvmx_uctlx_uphy_portx_ctl_status_s cn63xxp1;
struct cvmx_uctlx_uphy_portx_ctl_status_s cn66xx;
struct cvmx_uctlx_uphy_portx_ctl_status_s cn68xx;
struct cvmx_uctlx_uphy_portx_ctl_status_s cn68xxp1;
struct cvmx_uctlx_uphy_portx_ctl_status_s cnf71xx;
};
#endif

1
arch/mips/include/asm/page.h
View File

@@ -154,6 +154,7 @@ typedef struct { unsigned long pgd; } pgd_t;
typedef struct { unsigned long pgprot; } pgprot_t;
#define pgprot_val(x) ((x).pgprot)
#define __pgprot(x) ((pgprot_t) { (x) } )
#define pte_pgprot(x) __pgprot(pte_val(x) & ~_PFN_MASK)
/*
* On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd

5
arch/mips/include/asm/pgtable-64.h
View File

@@ -265,6 +265,11 @@ static inline int pmd_bad(pmd_t pmd)
static inline int pmd_present(pmd_t pmd)
{
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
if (unlikely(pmd_val(pmd) & _PAGE_HUGE))
return pmd_val(pmd) & _PAGE_PRESENT;
#endif
return pmd_val(pmd) != (unsigned long) invalid_pte_table;
}

6
arch/mips/include/asm/pgtable.h
View File

@@ -214,8 +214,8 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
if (kernel_uses_llsc && R10000_LLSC_WAR) {
__asm__ __volatile__ (
" .set arch=r4000 \n"
" .set push \n"
" .set arch=r4000 \n"
" .set noreorder \n"
"1:" __LL "%[tmp], %[buddy] \n"
" bnez %[tmp], 2f \n"
@@ -225,13 +225,12 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
" nop \n"
"2: \n"
" .set pop \n"
" .set mips0 \n"
: [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp)
: [global] "r" (page_global));
} else if (kernel_uses_llsc) {
__asm__ __volatile__ (
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" .set noreorder \n"
"1:" __LL "%[tmp], %[buddy] \n"
" bnez %[tmp], 2f \n"
@@ -241,7 +240,6 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
" nop \n"
"2: \n"
" .set pop \n"
" .set mips0 \n"
: [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp)
: [global] "r" (page_global));
}

19
arch/mips/include/asm/processor.h
View File

@@ -255,8 +255,10 @@ struct thread_struct {
/* Saved cp0 stuff. */
unsigned long cp0_status;
#ifdef CONFIG_MIPS_FP_SUPPORT
/* Saved fpu/fpu emulator stuff. */
struct mips_fpu_struct fpu FPU_ALIGN;
#endif
/* Assigned branch delay slot 'emulation' frame */
atomic_t bd_emu_frame;
/* PC of the branch from a branch delay slot 'emulation' */
@@ -299,6 +301,17 @@ struct thread_struct {
#define FPAFF_INIT
#endif /* CONFIG_MIPS_MT_FPAFF */
#ifdef CONFIG_MIPS_FP_SUPPORT
# define FPU_INIT \
.fpu = { \
.fpr = {{{0,},},}, \
.fcr31 = 0, \
.msacsr = 0, \
},
#else
# define FPU_INIT
#endif
#define INIT_THREAD { \
/* \
* Saved main processor registers \
@@ -321,11 +334,7 @@ struct thread_struct {
/* \
* Saved FPU/FPU emulator stuff \
*/ \
.fpu = { \
.fpr = {{{0,},},}, \
.fcr31 = 0, \
.msacsr = 0, \
}, \
FPU_INIT \
/* \
* FPU affinity state (null if not FPAFF) \
*/ \

22
arch/mips/include/asm/r4kcache.h
View File

@@ -20,6 +20,7 @@
#include <asm/cpu-features.h>
#include <asm/cpu-type.h>
#include <asm/mipsmtregs.h>
#include <asm/mmzone.h>
#include <linux/uaccess.h> /* for uaccess_kernel() */
extern void (*r4k_blast_dcache)(void);
@@ -674,4 +675,25 @@ __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , )
__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , )
__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , )
/* Currently, this is very specific to Loongson-3 */
#define __BUILD_BLAST_CACHE_NODE(pfx, desc, indexop, hitop, lsize) \
static inline void blast_##pfx##cache##lsize##_node(long node) \
{ \
unsigned long start = CAC_BASE | nid_to_addrbase(node); \
unsigned long end = start + current_cpu_data.desc.waysize; \
unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \
unsigned long ws_end = current_cpu_data.desc.ways << \
current_cpu_data.desc.waybit; \
unsigned long ws, addr; \
\
for (ws = 0; ws < ws_end; ws += ws_inc) \
for (addr = start; addr < end; addr += lsize * 32) \
cache##lsize##_unroll32(addr|ws, indexop); \
}
__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16)
__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32)
__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64)
__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128)
#endif /* _ASM_R4KCACHE_H */

3
arch/mips/include/asm/stackframe.h
View File

@@ -427,9 +427,10 @@
#ifdef CONFIG_CPU_MIPSR6
eretnc
#else
.set push
.set arch=r4000
eret
.set mips0
.set pop
#endif
.endm

6
arch/mips/include/asm/switch_to.h
View File

@@ -84,7 +84,8 @@ do { \
* Check FCSR for any unmasked exceptions pending set with `ptrace',
* clear them and send a signal.
*/
#define __sanitize_fcr31(next) \
#ifdef CONFIG_MIPS_FP_SUPPORT
# define __sanitize_fcr31(next) \
do { \
unsigned long fcr31 = mask_fcr31_x(next->thread.fpu.fcr31); \
void __user *pc; \
@@ -95,6 +96,9 @@ do { \
force_fcr31_sig(fcr31, pc, next); \
} \
} while (0)
#else
# define __sanitize_fcr31(next)
#endif
/*
* For newly created kernel threads switch_to() will return to

3
arch/mips/include/asm/unistd.h
View File

@@ -13,6 +13,9 @@
#define _ASM_UNISTD_H
#include <uapi/asm/unistd.h>
#include <asm/unistd_nr_n32.h>
#include <asm/unistd_nr_n64.h>
#include <asm/unistd_nr_o32.h>
#ifdef CONFIG_MIPS32_N32
#define NR_syscalls (__NR_N32_Linux + __NR_N32_Linux_syscalls)