microblaze: Unprivileged stream instruction awareness
Add cpuinfo support for the new MicroBlaze option permitting userspace (unprivileged) access to the streaming instructions (FSL / AXI-stream). Emit a noisy warning at bootup if this is enabled, because bad user code can potentially lockup the CPU. Signed-off-by: John A. Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
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committed by
Michal Simek

parent
5db34eb92f
commit
8904976e8c
@@ -117,10 +117,10 @@ struct pvr_s {
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#define PVR11_MMU_DTLB_SIZE 0x07000000
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#define PVR11_MMU_TLB_ACCESS 0x00C00000
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#define PVR11_MMU_ZONES 0x003C0000
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#define PVR11_MMU_PRIVINS 0x00010000
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/* MSR Reset value PVR mask */
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#define PVR11_MSR_RESET_VALUE_MASK 0x000007FF
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/* PVR access macros */
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#define PVR_IS_FULL(_pvr) (_pvr.pvr[0] & PVR0_PVR_FULL_MASK)
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#define PVR_USE_BARREL(_pvr) (_pvr.pvr[0] & PVR0_USE_BARREL_MASK)
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@@ -216,6 +216,7 @@ struct pvr_s {
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#define PVR_MMU_DTLB_SIZE(_pvr) (_pvr.pvr[11] & PVR11_MMU_DTLB_SIZE)
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#define PVR_MMU_TLB_ACCESS(_pvr) (_pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
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#define PVR_MMU_ZONES(_pvr) (_pvr.pvr[11] & PVR11_MMU_ZONES)
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#define PVR_MMU_PRIVINS(pvr) (pvr.pvr[11] & PVR11_MMU_PRIVINS)
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/* endian */
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#define PVR_ENDIAN(_pvr) (_pvr.pvr[0] & PVR0_ENDI)
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