drm/radeon/kms: add htile support to the cs checker v3
For 6xx+. Required for mesa to use htile support for HiZ/HiS. Userspace will check radeon version 2.14 with is bumped either by tiling patch or stream out patch. This patch only add support for htile relocation which should be enough for any userspace to implement the hyperz (using htile buffer) feature. v2: Jerome: Fix size checking for htile buffer. v3: Jerome: Adapt on top of r600/evergreen cs checker changes, also check htile surface in case only stencil is present. Signed-off-by: Pierre-Eric Pelloux-Prayer <pelloux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie

parent
017d213f64
commit
88f50c8074
@@ -195,6 +195,14 @@
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#define PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31)
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#define DB_DEPTH_BASE 0x2800C
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#define DB_HTILE_DATA_BASE 0x28014
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#define DB_HTILE_SURFACE 0x28D24
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#define S_028D24_HTILE_WIDTH(x) (((x) & 0x1) << 0)
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#define G_028D24_HTILE_WIDTH(x) (((x) >> 0) & 0x1)
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#define C_028D24_HTILE_WIDTH 0xFFFFFFFE
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#define S_028D24_HTILE_HEIGHT(x) (((x) & 0x1) << 1)
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#define G_028D24_HTILE_HEIGHT(x) (((x) >> 1) & 0x1)
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#define C_028D24_HTILE_HEIGHT 0xFFFFFFFD
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#define G_028D24_LINEAR(x) (((x) >> 2) & 0x1)
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#define DB_WATERMARKS 0x9838
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#define DEPTH_FREE(x) ((x) << 0)
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#define DEPTH_FLUSH(x) ((x) << 5)
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