Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
ath.git patches for 5.3. Major changes: ath10k * enable SDIO support, first one being QCA6174 hw3.2
This commit is contained in:
@@ -157,7 +157,9 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
|
||||
freq = centers.synth_center;
|
||||
|
||||
if (freq < 4800) { /* 2 GHz, fractional mode */
|
||||
if (AR_SREV_9330(ah)) {
|
||||
if (AR_SREV_9330(ah) || AR_SREV_9485(ah) ||
|
||||
AR_SREV_9531(ah) || AR_SREV_9550(ah) ||
|
||||
AR_SREV_9561(ah) || AR_SREV_9565(ah)) {
|
||||
if (ah->is_clk_25mhz)
|
||||
div = 75;
|
||||
else
|
||||
@@ -166,16 +168,6 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
|
||||
channelSel = (freq * 4) / div;
|
||||
chan_frac = (((freq * 4) % div) * 0x20000) / div;
|
||||
channelSel = (channelSel << 17) | chan_frac;
|
||||
} else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
|
||||
/*
|
||||
* freq_ref = 40 / (refdiva >> amoderefsel);
|
||||
* where refdiva=1 and amoderefsel=0
|
||||
* ndiv = ((chan_mhz * 4) / 3) / freq_ref;
|
||||
* chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
|
||||
*/
|
||||
channelSel = (freq * 4) / 120;
|
||||
chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
|
||||
channelSel = (channelSel << 17) | chan_frac;
|
||||
} else if (AR_SREV_9340(ah)) {
|
||||
if (ah->is_clk_25mhz) {
|
||||
channelSel = (freq * 2) / 75;
|
||||
@@ -184,16 +176,6 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
|
||||
} else {
|
||||
channelSel = CHANSEL_2G(freq) >> 1;
|
||||
}
|
||||
} else if (AR_SREV_9550(ah) || AR_SREV_9531(ah) ||
|
||||
AR_SREV_9561(ah)) {
|
||||
if (ah->is_clk_25mhz)
|
||||
div = 75;
|
||||
else
|
||||
div = 120;
|
||||
|
||||
channelSel = (freq * 4) / div;
|
||||
chan_frac = (((freq * 4) % div) * 0x20000) / div;
|
||||
channelSel = (channelSel << 17) | chan_frac;
|
||||
} else {
|
||||
channelSel = CHANSEL_2G(freq);
|
||||
}
|
||||
|
@@ -428,7 +428,7 @@ u16 ath9k_hw_get_scaled_power(struct ath_hw *ah, u16 power_limit,
|
||||
else
|
||||
power_limit = 0;
|
||||
|
||||
return power_limit;
|
||||
return min_t(u16, power_limit, MAX_RATE_POWER);
|
||||
}
|
||||
|
||||
void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)
|
||||
|
@@ -424,6 +424,7 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
|
||||
ath9k_hw_get_channel_centers(ah, chan, ¢ers);
|
||||
|
||||
scaledPower = powerLimit - antenna_reduction;
|
||||
scaledPower = min_t(u16, scaledPower, MAX_RATE_POWER);
|
||||
numCtlModes = ARRAY_SIZE(ctlModesFor11g) - SUB_NUM_CTL_MODES_AT_2G_40;
|
||||
pCtlMode = ctlModesFor11g;
|
||||
|
||||
|
@@ -252,8 +252,9 @@ void ath9k_hw_get_channel_centers(struct ath_hw *ah,
|
||||
/* Chip Revisions */
|
||||
/******************/
|
||||
|
||||
static void ath9k_hw_read_revisions(struct ath_hw *ah)
|
||||
static bool ath9k_hw_read_revisions(struct ath_hw *ah)
|
||||
{
|
||||
u32 srev;
|
||||
u32 val;
|
||||
|
||||
if (ah->get_mac_revision)
|
||||
@@ -269,25 +270,33 @@ static void ath9k_hw_read_revisions(struct ath_hw *ah)
|
||||
val = REG_READ(ah, AR_SREV);
|
||||
ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
|
||||
}
|
||||
return;
|
||||
return true;
|
||||
case AR9300_DEVID_AR9340:
|
||||
ah->hw_version.macVersion = AR_SREV_VERSION_9340;
|
||||
return;
|
||||
return true;
|
||||
case AR9300_DEVID_QCA955X:
|
||||
ah->hw_version.macVersion = AR_SREV_VERSION_9550;
|
||||
return;
|
||||
return true;
|
||||
case AR9300_DEVID_AR953X:
|
||||
ah->hw_version.macVersion = AR_SREV_VERSION_9531;
|
||||
return;
|
||||
return true;
|
||||
case AR9300_DEVID_QCA956X:
|
||||
ah->hw_version.macVersion = AR_SREV_VERSION_9561;
|
||||
return;
|
||||
return true;
|
||||
}
|
||||
|
||||
val = REG_READ(ah, AR_SREV) & AR_SREV_ID;
|
||||
srev = REG_READ(ah, AR_SREV);
|
||||
|
||||
if (srev == -EIO) {
|
||||
ath_err(ath9k_hw_common(ah),
|
||||
"Failed to read SREV register");
|
||||
return false;
|
||||
}
|
||||
|
||||
val = srev & AR_SREV_ID;
|
||||
|
||||
if (val == 0xFF) {
|
||||
val = REG_READ(ah, AR_SREV);
|
||||
val = srev;
|
||||
ah->hw_version.macVersion =
|
||||
(val & AR_SREV_VERSION2) >> AR_SREV_TYPE2_S;
|
||||
ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
|
||||
@@ -306,6 +315,8 @@ static void ath9k_hw_read_revisions(struct ath_hw *ah)
|
||||
if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE)
|
||||
ah->is_pciexpress = true;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/************************************/
|
||||
@@ -446,7 +457,7 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
|
||||
struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
|
||||
|
||||
regulatory->country_code = CTRY_DEFAULT;
|
||||
regulatory->power_limit = MAX_RATE_POWER;
|
||||
regulatory->power_limit = MAX_COMBINED_POWER;
|
||||
|
||||
ah->hw_version.magic = AR5416_MAGIC;
|
||||
ah->hw_version.subvendorid = 0;
|
||||
@@ -559,7 +570,10 @@ static int __ath9k_hw_init(struct ath_hw *ah)
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
int r = 0;
|
||||
|
||||
ath9k_hw_read_revisions(ah);
|
||||
if (!ath9k_hw_read_revisions(ah)) {
|
||||
ath_err(common, "Could not read hardware revisions");
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
switch (ah->hw_version.macVersion) {
|
||||
case AR_SREV_VERSION_5416_PCI:
|
||||
@@ -2952,7 +2966,7 @@ void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan,
|
||||
ctl = ath9k_regd_get_ctl(reg, chan);
|
||||
|
||||
channel = chan->chan;
|
||||
chan_pwr = min_t(int, channel->max_power * 2, MAX_RATE_POWER);
|
||||
chan_pwr = min_t(int, channel->max_power * 2, MAX_COMBINED_POWER);
|
||||
new_pwr = min_t(int, chan_pwr, reg->power_limit);
|
||||
|
||||
ah->eep_ops->set_txpower(ah, chan, ctl,
|
||||
@@ -2965,9 +2979,9 @@ void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test)
|
||||
struct ath9k_channel *chan = ah->curchan;
|
||||
struct ieee80211_channel *channel = chan->chan;
|
||||
|
||||
reg->power_limit = min_t(u32, limit, MAX_RATE_POWER);
|
||||
reg->power_limit = min_t(u32, limit, MAX_COMBINED_POWER);
|
||||
if (test)
|
||||
channel->max_power = MAX_RATE_POWER / 2;
|
||||
channel->max_power = MAX_COMBINED_POWER / 2;
|
||||
|
||||
ath9k_hw_apply_txpower(ah, chan, test);
|
||||
|
||||
|
@@ -173,6 +173,7 @@
|
||||
#define ATH9K_NUM_QUEUES 10
|
||||
|
||||
#define MAX_RATE_POWER 63
|
||||
#define MAX_COMBINED_POWER 254 /* 128 dBm, chosen to fit in u8 */
|
||||
#define AH_WAIT_TIMEOUT 100000 /* (us) */
|
||||
#define AH_TSF_WRITE_TIMEOUT 100 /* (us) */
|
||||
#define AH_TIME_QUANTUM 10
|
||||
|
@@ -805,7 +805,7 @@ static void ath9k_init_band_txpower(struct ath_softc *sc, int band)
|
||||
ah->curchan = &ah->channels[chan->hw_value];
|
||||
cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_HT20);
|
||||
ath9k_cmn_get_channel(sc->hw, ah, &chandef);
|
||||
ath9k_hw_set_txpowerlimit(ah, MAX_RATE_POWER, true);
|
||||
ath9k_hw_set_txpowerlimit(ah, MAX_COMBINED_POWER, true);
|
||||
}
|
||||
}
|
||||
|
||||
|
@@ -410,7 +410,6 @@ static void ath_tx_count_frames(struct ath_softc *sc, struct ath_buf *bf,
|
||||
struct ath_tx_status *ts, int txok,
|
||||
int *nframes, int *nbad)
|
||||
{
|
||||
struct ath_frame_info *fi;
|
||||
u16 seq_st = 0;
|
||||
u32 ba[WME_BA_BMP_SIZE >> 5];
|
||||
int ba_index;
|
||||
@@ -426,7 +425,6 @@ static void ath_tx_count_frames(struct ath_softc *sc, struct ath_buf *bf,
|
||||
}
|
||||
|
||||
while (bf) {
|
||||
fi = get_frame_info(bf->bf_mpdu);
|
||||
ba_index = ATH_BA_INDEX(seq_st, bf->bf_state.seqno);
|
||||
|
||||
(*nframes)++;
|
||||
@@ -446,7 +444,6 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
|
||||
{
|
||||
struct ath_node *an = NULL;
|
||||
struct sk_buff *skb;
|
||||
struct ieee80211_hdr *hdr;
|
||||
struct ieee80211_tx_info *tx_info;
|
||||
struct ath_buf *bf_next, *bf_last = bf->bf_lastbf;
|
||||
struct list_head bf_head;
|
||||
@@ -463,8 +460,6 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
|
||||
int bar_index = -1;
|
||||
|
||||
skb = bf->bf_mpdu;
|
||||
hdr = (struct ieee80211_hdr *)skb->data;
|
||||
|
||||
tx_info = IEEE80211_SKB_CB(skb);
|
||||
|
||||
memcpy(rates, bf->rates, sizeof(rates));
|
||||
@@ -668,7 +663,8 @@ static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
|
||||
static void ath_tx_count_airtime(struct ath_softc *sc,
|
||||
struct ieee80211_sta *sta,
|
||||
struct ath_buf *bf,
|
||||
struct ath_tx_status *ts)
|
||||
struct ath_tx_status *ts,
|
||||
u8 tid)
|
||||
{
|
||||
u32 airtime = 0;
|
||||
int i;
|
||||
@@ -679,7 +675,7 @@ static void ath_tx_count_airtime(struct ath_softc *sc,
|
||||
airtime += rate_dur * bf->rates[i].count;
|
||||
}
|
||||
|
||||
ieee80211_sta_register_airtime(sta, ts->tid, airtime, 0);
|
||||
ieee80211_sta_register_airtime(sta, tid, airtime, 0);
|
||||
}
|
||||
|
||||
static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
|
||||
@@ -709,7 +705,7 @@ static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
|
||||
if (sta) {
|
||||
struct ath_node *an = (struct ath_node *)sta->drv_priv;
|
||||
tid = ath_get_skb_tid(sc, an, bf->bf_mpdu);
|
||||
ath_tx_count_airtime(sc, sta, bf, ts);
|
||||
ath_tx_count_airtime(sc, sta, bf, ts, tid->tidno);
|
||||
if (ts->ts_status & (ATH9K_TXERR_FILT | ATH9K_TXERR_XRETRY))
|
||||
tid->clear_ps_filter = true;
|
||||
}
|
||||
@@ -2269,12 +2265,10 @@ static int ath_tx_prepare(struct ieee80211_hw *hw, struct sk_buff *skb,
|
||||
int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
|
||||
struct ath_tx_control *txctl)
|
||||
{
|
||||
struct ieee80211_hdr *hdr;
|
||||
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
||||
struct ieee80211_sta *sta = txctl->sta;
|
||||
struct ieee80211_vif *vif = info->control.vif;
|
||||
struct ath_frame_info *fi = get_frame_info(skb);
|
||||
struct ath_vif *avp = NULL;
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_txq *txq = txctl->txq;
|
||||
struct ath_atx_tid *tid = NULL;
|
||||
@@ -2283,16 +2277,12 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
|
||||
bool ps_resp;
|
||||
int q, ret;
|
||||
|
||||
if (vif)
|
||||
avp = (void *)vif->drv_priv;
|
||||
|
||||
ps_resp = !!(info->control.flags & IEEE80211_TX_CTRL_PS_RESPONSE);
|
||||
|
||||
ret = ath_tx_prepare(hw, skb, txctl);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
hdr = (struct ieee80211_hdr *) skb->data;
|
||||
/*
|
||||
* At this point, the vif, hw_key and sta pointers in the tx control
|
||||
* info are no longer valid (overwritten by the ath_frame_info data.
|
||||
|
Reference in New Issue
Block a user