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rt2800: 5592: add iq calibration

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Based on:
GetIQCalibration()
IQCalibration()

from:
DPO_RT5572_LinuxSTA_2.6.1.3_20121022/chips/rtmp_chip.c

Signed-off-by: Stanislaw Gruszka <stf_xl@wp.pl>
Tested-by: Wanlong Gao <gaowanlong@cn.fujitsu.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Stanislaw Gruszka
2013-03-16 19:19:45 +01:00
committed by John W. Linville
parent 6803141b4f
commit 8756130bf3
3 changed files with 101 additions and 4 deletions
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55
drivers/net/wireless/rt2x00/rt2800.h
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@@ -2531,6 +2531,61 @@ struct mac_iveiv_entry {
#define EEPROM_BBP_VALUE FIELD16(0x00ff)
#define EEPROM_BBP_REG_ID FIELD16(0xff00)
/*
* EEPROM IQ Calibration, unlike other entries those are byte addresses.
*/
#define EEPROM_IQ_GAIN_CAL_TX0_2G 0x130
#define EEPROM_IQ_PHASE_CAL_TX0_2G 0x131
#define EEPROM_IQ_GROUPDELAY_CAL_TX0_2G 0x132
#define EEPROM_IQ_GAIN_CAL_TX1_2G 0x133
#define EEPROM_IQ_PHASE_CAL_TX1_2G 0x134
#define EEPROM_IQ_GROUPDELAY_CAL_TX1_2G 0x135
#define EEPROM_IQ_GAIN_CAL_RX0_2G 0x136
#define EEPROM_IQ_PHASE_CAL_RX0_2G 0x137
#define EEPROM_IQ_GROUPDELAY_CAL_RX0_2G 0x138
#define EEPROM_IQ_GAIN_CAL_RX1_2G 0x139
#define EEPROM_IQ_PHASE_CAL_RX1_2G 0x13A
#define EEPROM_IQ_GROUPDELAY_CAL_RX1_2G 0x13B
#define EEPROM_RF_IQ_COMPENSATION_CONTROL 0x13C
#define EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL 0x13D
#define EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G 0x144
#define EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G 0x145
#define EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G 0X146
#define EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G 0x147
#define EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G 0x148
#define EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G 0x149
#define EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G 0x14A
#define EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G 0x14B
#define EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G 0X14C
#define EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G 0x14D
#define EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G 0x14E
#define EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G 0x14F
#define EEPROM_IQ_GROUPDELAY_CAL_TX0_CH36_TO_CH64_5G 0x150
#define EEPROM_IQ_GROUPDELAY_CAL_TX1_CH36_TO_CH64_5G 0x151
#define EEPROM_IQ_GROUPDELAY_CAL_TX0_CH100_TO_CH138_5G 0x152
#define EEPROM_IQ_GROUPDELAY_CAL_TX1_CH100_TO_CH138_5G 0x153
#define EEPROM_IQ_GROUPDELAY_CAL_TX0_CH140_TO_CH165_5G 0x154
#define EEPROM_IQ_GROUPDELAY_CAL_TX1_CH140_TO_CH165_5G 0x155
#define EEPROM_IQ_GAIN_CAL_RX0_CH36_TO_CH64_5G 0x156
#define EEPROM_IQ_PHASE_CAL_RX0_CH36_TO_CH64_5G 0x157
#define EEPROM_IQ_GAIN_CAL_RX0_CH100_TO_CH138_5G 0X158
#define EEPROM_IQ_PHASE_CAL_RX0_CH100_TO_CH138_5G 0x159
#define EEPROM_IQ_GAIN_CAL_RX0_CH140_TO_CH165_5G 0x15A
#define EEPROM_IQ_PHASE_CAL_RX0_CH140_TO_CH165_5G 0x15B
#define EEPROM_IQ_GAIN_CAL_RX1_CH36_TO_CH64_5G 0x15C
#define EEPROM_IQ_PHASE_CAL_RX1_CH36_TO_CH64_5G 0x15D
#define EEPROM_IQ_GAIN_CAL_RX1_CH100_TO_CH138_5G 0X15E
#define EEPROM_IQ_PHASE_CAL_RX1_CH100_TO_CH138_5G 0x15F
#define EEPROM_IQ_GAIN_CAL_RX1_CH140_TO_CH165_5G 0x160
#define EEPROM_IQ_PHASE_CAL_RX1_CH140_TO_CH165_5G 0x161
#define EEPROM_IQ_GROUPDELAY_CAL_RX0_CH36_TO_CH64_5G 0x162
#define EEPROM_IQ_GROUPDELAY_CAL_RX1_CH36_TO_CH64_5G 0x163
#define EEPROM_IQ_GROUPDELAY_CAL_RX0_CH100_TO_CH138_5G 0x164
#define EEPROM_IQ_GROUPDELAY_CAL_RX1_CH100_TO_CH138_5G 0x165
#define EEPROM_IQ_GROUPDELAY_CAL_RX0_CH140_TO_CH165_5G 0x166
#define EEPROM_IQ_GROUPDELAY_CAL_RX1_CH140_TO_CH165_5G 0x167
/*
* MCU mailbox commands.
* MCU_SLEEP - go to power-save mode.