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ARM: dts: rockchip: Add SPDIF transceiver for RK3288

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Add the SPDIF transceiver controller definition and pin setup for RK3288
SoCs

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Sjoerd Simons
2015-10-08 15:31:17 +02:00
committed by Heiko Stuebner
parent d97e862ef6
commit 874e568e50
1 changed files with 21 additions and 0 deletions
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21
arch/arm/boot/dts/rk3288.dtsi
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@@ -744,6 +744,21 @@
status = "disabled"; status = "disabled";
}; };
spdif: sound@ff88b0000 {
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
reg = <0xff8b0000 0x10000>;
#sound-dai-cells = <0>;
clock-names = "hclk", "mclk";
clocks = <&cru HCLK_SPDIF8CH>, <&cru SCLK_SPDIF8CH>;
dmas = <&dmac_bus_s 3>;
dma-names = "tx";
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx>;
rockchip,grf = <&grf>;
status = "disabled";
};
i2s: i2s@ff890000 { i2s: i2s@ff890000 {
compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
reg = <0xff890000 0x10000>; reg = <0xff890000 0x10000>;
@@ -1437,5 +1452,11 @@
<4 3 3 &pcfg_pull_none>; <4 3 3 &pcfg_pull_none>;
}; };
}; };
spdif {
spdif_tx: spdif-tx {
rockchip,pins = <RK_GPIO6 11 RK_FUNC_1 &pcfg_pull_none>;
};
};
}; };
}; };