ARM: tegra: update DTs to expose legacy interrupt controller
Describe the legacy interrupt controller in every tegra DTSI files, and make it the parent of most interrupts. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088583-15097-5-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Jason Cooper

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@@ -8,7 +8,7 @@
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/ {
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compatible = "nvidia,tegra30";
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interrupt-parent = <&intc>;
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interrupt-parent = <&lic>;
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pcie-controller@00003000 {
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compatible = "nvidia,tegra30-pcie";
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@@ -228,6 +228,7 @@
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timer@50040600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0x50040600 0x20>;
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interrupt-parent = <&intc>;
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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clocks = <&tegra_car TEGRA30_CLK_TWD>;
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@@ -239,6 +240,7 @@
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0x50040100 0x0100>;
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupt-parent = <&intc>;
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};
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cache-controller@50043000 {
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@@ -250,6 +252,18 @@
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cache-level = <2>;
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};
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lic: interrupt-controller@60004000 {
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compatible = "nvidia,tegra30-ictlr";
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reg = <0x60004000 0x100>,
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<0x60004100 0x50>,
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<0x60004200 0x50>,
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<0x60004300 0x50>,
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<0x60004400 0x50>;
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupt-parent = <&intc>;
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};
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timer@60005000 {
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compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
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reg = <0x60005000 0x400>;
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