Merge tag 'pci-v5.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull pci updates from Bjorn Helgaas:
"Enumeration:
- Revert sysfs "rescan" renames that broke apps (Kelsey Skunberg)
- Add more 32 GT/s link speed decoding and improve the implementation
(Yicong Yang)
Resource management:
- Add support for sizing programmable host bridge apertures and fix a
related alpha Nautilus regression (Ivan Kokshaysky)
Interrupts:
- Add boot interrupt quirk mechanism for Xeon chipsets and document
boot interrupts (Sean V Kelley)
PCIe native device hotplug:
- When possible, disable in-band presence detect and use PDS
(Alexandru Gagniuc)
- Add DMI table for devices that don't use in-band presence detection
but don't advertise that correctly (Stuart Hayes)
- Fix hang when powering slots up/down via sysfs (Lukas Wunner)
- Fix an MSI interrupt race (Stuart Hayes)
Virtualization:
- Add ACS quirks for Zhaoxin devices (Raymond Pang)
Error handling:
- Add Error Disconnect Recover (EDR) support so firmware can report
devices disconnected via DPC and we can try to recover (Kuppuswamy
Sathyanarayanan)
Peer-to-peer DMA:
- Add Intel Sky Lake-E Root Ports B, C, D to the whitelist (Andrew
Maier)
ASPM:
- Reduce severity of common clock config message (Chris Packham)
- Clear the correct bits when enabling L1 substates, so we don't go
to the wrong state (Yicong Yang)
Endpoint framework:
- Replace EPF linkup ops with notifier call chain and improve locking
(Kishon Vijay Abraham I)
- Fix concurrent memory allocation in OB address region (Kishon Vijay
Abraham I)
- Move PF function number assignment to EPC core to support multiple
function creation methods (Kishon Vijay Abraham I)
- Fix issue with clearing configfs "start" entry (Kunihiko Hayashi)
- Fix issue with endpoint MSI-X ignoring BAR Indicator and Table
Offset (Kishon Vijay Abraham I)
- Add support for testing DMA transfers (Kishon Vijay Abraham I)
- Add support for testing > 10 endpoint devices (Kishon Vijay Abraham I)
- Add support for tests to clear IRQ (Kishon Vijay Abraham I)
- Add common DT schema for endpoint controllers (Kishon Vijay Abraham I)
Amlogic Meson PCIe controller driver:
- Add DT bindings for AXG PCIe PHY, shared MIPI/PCIe analog PHY (Remi
Pommarel)
- Add Amlogic AXG PCIe PHY, AXG MIPI/PCIe analog PHY drivers (Remi
Pommarel)
Cadence PCIe controller driver:
- Add Root Complex/Endpoint DT schema for Cadence PCIe (Kishon Vijay
Abraham I)
Intel VMD host bridge driver:
- Add two VMD Device IDs that require bus restriction mode (Sushma
Kalakota)
Mobiveil PCIe controller driver:
- Refactor and modularize mobiveil driver (Hou Zhiqiang)
- Add support for Mobiveil GPEX Gen4 host (Hou Zhiqiang)
Microsoft Hyper-V host bridge driver:
- Add support for Hyper-V PCI protocol version 1.3 and
PCI_BUS_RELATIONS2 (Long Li)
- Refactor to prepare for virtual PCI on non-x86 architectures (Boqun
Feng)
- Fix memory leak in hv_pci_probe()'s error path (Dexuan Cui)
NVIDIA Tegra PCIe controller driver:
- Use pci_parse_request_of_pci_ranges() (Rob Herring)
- Add support for endpoint mode and related DT updates (Vidya Sagar)
- Reduce -EPROBE_DEFER error message log level (Thierry Reding)
Qualcomm PCIe controller driver:
- Restrict class fixup to specific Qualcomm devices (Bjorn Andersson)
Synopsys DesignWare PCIe controller driver:
- Refactor core initialization code for endpoint mode (Vidya Sagar)
- Fix endpoint MSI-X to use correct table address (Kishon Vijay
Abraham I)
TI DRA7xx PCIe controller driver:
- Fix MSI IRQ handling (Vignesh Raghavendra)
TI Keystone PCIe controller driver:
- Allow AM654 endpoint to raise MSI-X interrupt (Kishon Vijay Abraham I)
Miscellaneous:
- Quirk ASMedia XHCI USB to avoid "PME# from D0" defect (Kai-Heng
Feng)
- Use ioremap(), not phys_to_virt(), for platform ROM to fix video
ROM mapping with CONFIG_HIGHMEM (Mikel Rychliski)"
* tag 'pci-v5.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (96 commits)
misc: pci_endpoint_test: remove duplicate macro PCI_ENDPOINT_TEST_STATUS
PCI: tegra: Print -EPROBE_DEFER error message at debug level
misc: pci_endpoint_test: Use full pci-endpoint-test name in request_irq()
misc: pci_endpoint_test: Fix to support > 10 pci-endpoint-test devices
tools: PCI: Add 'e' to clear IRQ
misc: pci_endpoint_test: Add ioctl to clear IRQ
misc: pci_endpoint_test: Avoid using module parameter to determine irqtype
PCI: keystone: Allow AM654 PCIe Endpoint to raise MSI-X interrupt
PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address
PCI: endpoint: Fix ->set_msix() to take BIR and offset as arguments
misc: pci_endpoint_test: Add support to get DMA option from userspace
tools: PCI: Add 'd' command line option to support DMA
misc: pci_endpoint_test: Use streaming DMA APIs for buffer allocation
PCI: endpoint: functions/pci-epf-test: Print throughput information
PCI: endpoint: functions/pci-epf-test: Add DMA support to transfer data
PCI: pciehp: Fix MSI interrupt race
PCI: pciehp: Fix indefinite wait on sysfs requests
PCI: endpoint: Fix clearing start entry in configfs
PCI: tegra: Add support for PCIe endpoint mode in Tegra194
PCI: sysfs: Revert "rescan" file renames
...
This commit is contained in:
Linus Torvalds
@@ -59,3 +59,25 @@ config PHY_MESON_G12A_USB3_PCIE
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Enable this to support the Meson USB3 + PCIE Combo PHY found
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in Meson G12A SoCs.
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If unsure, say N.
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config PHY_MESON_AXG_PCIE
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tristate "Meson AXG PCIE PHY driver"
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default ARCH_MESON
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depends on OF && (ARCH_MESON || COMPILE_TEST)
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select GENERIC_PHY
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select REGMAP_MMIO
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help
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Enable this to support the Meson MIPI + PCIE PHY found
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in Meson AXG SoCs.
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If unsure, say N.
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config PHY_MESON_AXG_MIPI_PCIE_ANALOG
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tristate "Meson AXG MIPI + PCIE analog PHY driver"
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default ARCH_MESON
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depends on OF && (ARCH_MESON || COMPILE_TEST)
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select GENERIC_PHY
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select REGMAP_MMIO
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help
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Enable this to support the Meson MIPI + PCIE analog PHY
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found in Meson AXG SoCs.
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If unsure, say N.
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@@ -1,6 +1,8 @@
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# SPDX-License-Identifier: GPL-2.0-only
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obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o
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obj-$(CONFIG_PHY_MESON_GXL_USB2) += phy-meson-gxl-usb2.o
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obj-$(CONFIG_PHY_MESON_G12A_USB2) += phy-meson-g12a-usb2.o
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obj-$(CONFIG_PHY_MESON_GXL_USB3) += phy-meson-gxl-usb3.o
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obj-$(CONFIG_PHY_MESON_G12A_USB3_PCIE) += phy-meson-g12a-usb3-pcie.o
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obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o
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obj-$(CONFIG_PHY_MESON_GXL_USB2) += phy-meson-gxl-usb2.o
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obj-$(CONFIG_PHY_MESON_G12A_USB2) += phy-meson-g12a-usb2.o
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obj-$(CONFIG_PHY_MESON_GXL_USB3) += phy-meson-gxl-usb3.o
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obj-$(CONFIG_PHY_MESON_G12A_USB3_PCIE) += phy-meson-g12a-usb3-pcie.o
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obj-$(CONFIG_PHY_MESON_AXG_PCIE) += phy-meson-axg-pcie.o
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obj-$(CONFIG_PHY_MESON_AXG_MIPI_PCIE_ANALOG) += phy-meson-axg-mipi-pcie-analog.o
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188
drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
Normal file
188
drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
Normal file
@@ -0,0 +1,188 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Amlogic AXG MIPI + PCIE analog PHY driver
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*
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* Copyright (C) 2019 Remi Pommarel <repk@triplefau.lt>
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*/
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#include <linux/module.h>
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#include <linux/phy/phy.h>
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#include <linux/regmap.h>
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#include <linux/platform_device.h>
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#include <dt-bindings/phy/phy.h>
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#define HHI_MIPI_CNTL0 0x00
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#define HHI_MIPI_CNTL0_COMMON_BLOCK GENMASK(31, 28)
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#define HHI_MIPI_CNTL0_ENABLE BIT(29)
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#define HHI_MIPI_CNTL0_BANDGAP BIT(26)
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#define HHI_MIPI_CNTL0_DECODE_TO_RTERM GENMASK(15, 12)
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#define HHI_MIPI_CNTL0_OUTPUT_EN BIT(3)
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#define HHI_MIPI_CNTL1 0x01
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#define HHI_MIPI_CNTL1_CH0_CML_PDR_EN BIT(12)
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#define HHI_MIPI_CNTL1_LP_ABILITY GENMASK(5, 4)
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#define HHI_MIPI_CNTL1_LP_RESISTER BIT(3)
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#define HHI_MIPI_CNTL1_INPUT_SETTING BIT(2)
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#define HHI_MIPI_CNTL1_INPUT_SEL BIT(1)
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#define HHI_MIPI_CNTL1_PRBS7_EN BIT(0)
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#define HHI_MIPI_CNTL2 0x02
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#define HHI_MIPI_CNTL2_CH_PU GENMASK(31, 25)
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#define HHI_MIPI_CNTL2_CH_CTL GENMASK(24, 19)
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#define HHI_MIPI_CNTL2_CH0_DIGDR_EN BIT(18)
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#define HHI_MIPI_CNTL2_CH_DIGDR_EN BIT(17)
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#define HHI_MIPI_CNTL2_LPULPS_EN BIT(16)
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#define HHI_MIPI_CNTL2_CH_EN(n) BIT(15 - (n))
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#define HHI_MIPI_CNTL2_CH0_LP_CTL GENMASK(10, 1)
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struct phy_axg_mipi_pcie_analog_priv {
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struct phy *phy;
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unsigned int mode;
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struct regmap *regmap;
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};
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static const struct regmap_config phy_axg_mipi_pcie_analog_regmap_conf = {
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.reg_bits = 8,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = HHI_MIPI_CNTL2,
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};
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static int phy_axg_mipi_pcie_analog_power_on(struct phy *phy)
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{
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struct phy_axg_mipi_pcie_analog_priv *priv = phy_get_drvdata(phy);
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/* MIPI not supported yet */
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if (priv->mode != PHY_TYPE_PCIE)
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return -EINVAL;
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regmap_update_bits(priv->regmap, HHI_MIPI_CNTL0,
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HHI_MIPI_CNTL0_BANDGAP, HHI_MIPI_CNTL0_BANDGAP);
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regmap_update_bits(priv->regmap, HHI_MIPI_CNTL0,
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HHI_MIPI_CNTL0_ENABLE, HHI_MIPI_CNTL0_ENABLE);
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return 0;
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}
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static int phy_axg_mipi_pcie_analog_power_off(struct phy *phy)
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{
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struct phy_axg_mipi_pcie_analog_priv *priv = phy_get_drvdata(phy);
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/* MIPI not supported yet */
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if (priv->mode != PHY_TYPE_PCIE)
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return -EINVAL;
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regmap_update_bits(priv->regmap, HHI_MIPI_CNTL0,
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HHI_MIPI_CNTL0_BANDGAP, 0);
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regmap_update_bits(priv->regmap, HHI_MIPI_CNTL0,
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HHI_MIPI_CNTL0_ENABLE, 0);
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return 0;
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}
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static int phy_axg_mipi_pcie_analog_init(struct phy *phy)
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{
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return 0;
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}
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static int phy_axg_mipi_pcie_analog_exit(struct phy *phy)
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{
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return 0;
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}
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static const struct phy_ops phy_axg_mipi_pcie_analog_ops = {
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.init = phy_axg_mipi_pcie_analog_init,
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.exit = phy_axg_mipi_pcie_analog_exit,
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.power_on = phy_axg_mipi_pcie_analog_power_on,
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.power_off = phy_axg_mipi_pcie_analog_power_off,
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.owner = THIS_MODULE,
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};
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static struct phy *phy_axg_mipi_pcie_analog_xlate(struct device *dev,
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struct of_phandle_args *args)
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{
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struct phy_axg_mipi_pcie_analog_priv *priv = dev_get_drvdata(dev);
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unsigned int mode;
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if (args->args_count != 1) {
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dev_err(dev, "invalid number of arguments\n");
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return ERR_PTR(-EINVAL);
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}
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mode = args->args[0];
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/* MIPI mode is not supported yet */
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if (mode != PHY_TYPE_PCIE) {
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dev_err(dev, "invalid phy mode select argument\n");
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return ERR_PTR(-EINVAL);
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}
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priv->mode = mode;
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return priv->phy;
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}
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static int phy_axg_mipi_pcie_analog_probe(struct platform_device *pdev)
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{
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struct phy_provider *phy;
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struct device *dev = &pdev->dev;
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struct phy_axg_mipi_pcie_analog_priv *priv;
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struct device_node *np = dev->of_node;
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struct regmap *map;
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struct resource *res;
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void __iomem *base;
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int ret;
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priv = devm_kmalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base)) {
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dev_err(dev, "failed to get regmap base\n");
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return PTR_ERR(base);
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}
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map = devm_regmap_init_mmio(dev, base,
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&phy_axg_mipi_pcie_analog_regmap_conf);
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if (IS_ERR(map)) {
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dev_err(dev, "failed to get HHI regmap\n");
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return PTR_ERR(map);
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}
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priv->regmap = map;
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priv->phy = devm_phy_create(dev, np, &phy_axg_mipi_pcie_analog_ops);
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if (IS_ERR(priv->phy)) {
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ret = PTR_ERR(priv->phy);
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if (ret != -EPROBE_DEFER)
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dev_err(dev, "failed to create PHY\n");
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return ret;
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}
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phy_set_drvdata(priv->phy, priv);
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dev_set_drvdata(dev, priv);
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phy = devm_of_phy_provider_register(dev,
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phy_axg_mipi_pcie_analog_xlate);
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return PTR_ERR_OR_ZERO(phy);
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}
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static const struct of_device_id phy_axg_mipi_pcie_analog_of_match[] = {
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{
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.compatible = "amlogic,axg-mipi-pcie-analog-phy",
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},
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{ },
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};
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MODULE_DEVICE_TABLE(of, phy_axg_mipi_pcie_analog_of_match);
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static struct platform_driver phy_axg_mipi_pcie_analog_driver = {
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.probe = phy_axg_mipi_pcie_analog_probe,
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.driver = {
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.name = "phy-axg-mipi-pcie-analog",
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.of_match_table = phy_axg_mipi_pcie_analog_of_match,
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},
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};
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module_platform_driver(phy_axg_mipi_pcie_analog_driver);
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MODULE_AUTHOR("Remi Pommarel <repk@triplefau.lt>");
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MODULE_DESCRIPTION("Amlogic AXG MIPI + PCIE analog PHY driver");
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MODULE_LICENSE("GPL v2");
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192
drivers/phy/amlogic/phy-meson-axg-pcie.c
Normal file
192
drivers/phy/amlogic/phy-meson-axg-pcie.c
Normal file
@@ -0,0 +1,192 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Amlogic AXG PCIE PHY driver
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*
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* Copyright (C) 2020 Remi Pommarel <repk@triplefau.lt>
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*/
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#include <linux/module.h>
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#include <linux/phy/phy.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <linux/platform_device.h>
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#include <linux/bitfield.h>
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#include <dt-bindings/phy/phy.h>
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#define MESON_PCIE_REG0 0x00
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#define MESON_PCIE_COMMON_CLK BIT(4)
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#define MESON_PCIE_PORT_SEL GENMASK(3, 2)
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#define MESON_PCIE_CLK BIT(1)
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#define MESON_PCIE_POWERDOWN BIT(0)
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#define MESON_PCIE_TWO_X1 FIELD_PREP(MESON_PCIE_PORT_SEL, 0x3)
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#define MESON_PCIE_COMMON_REF_CLK FIELD_PREP(MESON_PCIE_COMMON_CLK, 0x1)
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#define MESON_PCIE_PHY_INIT (MESON_PCIE_TWO_X1 | \
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MESON_PCIE_COMMON_REF_CLK)
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#define MESON_PCIE_RESET_DELAY 500
|
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struct phy_axg_pcie_priv {
|
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struct phy *phy;
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struct phy *analog;
|
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struct regmap *regmap;
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struct reset_control *reset;
|
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};
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static const struct regmap_config phy_axg_pcie_regmap_conf = {
|
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.reg_bits = 8,
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.val_bits = 32,
|
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.reg_stride = 4,
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.max_register = MESON_PCIE_REG0,
|
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};
|
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|
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static int phy_axg_pcie_power_on(struct phy *phy)
|
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{
|
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struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
|
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int ret;
|
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|
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ret = phy_power_on(priv->analog);
|
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if (ret != 0)
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return ret;
|
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|
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regmap_update_bits(priv->regmap, MESON_PCIE_REG0,
|
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MESON_PCIE_POWERDOWN, 0);
|
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return 0;
|
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}
|
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|
||||
static int phy_axg_pcie_power_off(struct phy *phy)
|
||||
{
|
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struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
|
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int ret;
|
||||
|
||||
ret = phy_power_off(priv->analog);
|
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if (ret != 0)
|
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return ret;
|
||||
|
||||
regmap_update_bits(priv->regmap, MESON_PCIE_REG0,
|
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MESON_PCIE_POWERDOWN, 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int phy_axg_pcie_init(struct phy *phy)
|
||||
{
|
||||
struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
|
||||
int ret;
|
||||
|
||||
ret = phy_init(priv->analog);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
regmap_write(priv->regmap, MESON_PCIE_REG0, MESON_PCIE_PHY_INIT);
|
||||
return reset_control_reset(priv->reset);
|
||||
}
|
||||
|
||||
static int phy_axg_pcie_exit(struct phy *phy)
|
||||
{
|
||||
struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
|
||||
int ret;
|
||||
|
||||
ret = phy_exit(priv->analog);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
return reset_control_reset(priv->reset);
|
||||
}
|
||||
|
||||
static int phy_axg_pcie_reset(struct phy *phy)
|
||||
{
|
||||
struct phy_axg_pcie_priv *priv = phy_get_drvdata(phy);
|
||||
int ret = 0;
|
||||
|
||||
ret = phy_reset(priv->analog);
|
||||
if (ret != 0)
|
||||
goto out;
|
||||
|
||||
ret = reset_control_assert(priv->reset);
|
||||
if (ret != 0)
|
||||
goto out;
|
||||
udelay(MESON_PCIE_RESET_DELAY);
|
||||
|
||||
ret = reset_control_deassert(priv->reset);
|
||||
if (ret != 0)
|
||||
goto out;
|
||||
udelay(MESON_PCIE_RESET_DELAY);
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct phy_ops phy_axg_pcie_ops = {
|
||||
.init = phy_axg_pcie_init,
|
||||
.exit = phy_axg_pcie_exit,
|
||||
.power_on = phy_axg_pcie_power_on,
|
||||
.power_off = phy_axg_pcie_power_off,
|
||||
.reset = phy_axg_pcie_reset,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
static int phy_axg_pcie_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct phy_provider *pphy;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct phy_axg_pcie_priv *priv;
|
||||
struct device_node *np = dev->of_node;
|
||||
struct resource *res;
|
||||
void __iomem *base;
|
||||
int ret;
|
||||
|
||||
priv = devm_kmalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->phy = devm_phy_create(dev, np, &phy_axg_pcie_ops);
|
||||
if (IS_ERR(priv->phy)) {
|
||||
ret = PTR_ERR(priv->phy);
|
||||
if (ret != -EPROBE_DEFER)
|
||||
dev_err(dev, "failed to create PHY\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
base = devm_ioremap_resource(dev, res);
|
||||
if (IS_ERR(base))
|
||||
return PTR_ERR(base);
|
||||
|
||||
priv->regmap = devm_regmap_init_mmio(dev, base,
|
||||
&phy_axg_pcie_regmap_conf);
|
||||
if (IS_ERR(priv->regmap))
|
||||
return PTR_ERR(priv->regmap);
|
||||
|
||||
priv->reset = devm_reset_control_array_get(dev, false, false);
|
||||
if (IS_ERR(priv->reset))
|
||||
return PTR_ERR(priv->reset);
|
||||
|
||||
priv->analog = devm_phy_get(dev, "analog");
|
||||
if (IS_ERR(priv->analog))
|
||||
return PTR_ERR(priv->analog);
|
||||
|
||||
phy_set_drvdata(priv->phy, priv);
|
||||
dev_set_drvdata(dev, priv);
|
||||
pphy = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
|
||||
|
||||
return PTR_ERR_OR_ZERO(pphy);
|
||||
}
|
||||
|
||||
static const struct of_device_id phy_axg_pcie_of_match[] = {
|
||||
{
|
||||
.compatible = "amlogic,axg-pcie-phy",
|
||||
},
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, phy_axg_pcie_of_match);
|
||||
|
||||
static struct platform_driver phy_axg_pcie_driver = {
|
||||
.probe = phy_axg_pcie_probe,
|
||||
.driver = {
|
||||
.name = "phy-axg-pcie",
|
||||
.of_match_table = phy_axg_pcie_of_match,
|
||||
},
|
||||
};
|
||||
module_platform_driver(phy_axg_pcie_driver);
|
||||
|
||||
MODULE_AUTHOR("Remi Pommarel <repk@triplefau.lt>");
|
||||
MODULE_DESCRIPTION("Amlogic AXG PCIE PHY driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Reference in New Issue
Block a user