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drm/i915: Implement 16GB dimm wa for latency level-0

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Memory with 16GB dimms require an increase of 1us in level-0 latency.
This patch implements the same.
Bspec: 4381

changes since V1:
 - s/memdev_info/dram_info
 - make skl_is_16gb_dimm pure function
Changes since V2:
 - make is_16gb_dimm more generic
 - rebase
Changes since V3:
 - Simplify condition (Maarten)

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180831110942.9234-1-mahesh1.kumar@intel.com
This commit is contained in:
Mahesh Kumar
2018-08-31 16:39:42 +05:30
committed by Rodrigo Vivi
parent 5771caf885
commit 86b592876c
3 changed files with 44 additions and 2 deletions
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3
drivers/gpu/drm/i915/i915_drv.h
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@@ -1947,6 +1947,8 @@ struct drm_i915_private {
struct dram_info {
bool valid;
bool valid_dimm;
bool is_16gb_dimm;
u8 num_channels;
enum dram_rank {
I915_DRAM_RANK_INVALID = 0,
@@ -2175,6 +2177,7 @@ struct dram_channel_info {
enum dram_rank rank;
} l_info, s_info;
enum dram_rank rank;
bool is_16gb_dimm;
};
static inline struct drm_i915_private *to_i915(const struct drm_device *dev)