drm/radeon/cik: restructure rlc setup

Restructure rlc setup to handle clock and power
gating.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
2013-04-15 17:13:29 -04:00
parent 7235711a43
commit 866d83de0c
3 changed files with 56 additions and 31 deletions

View File

@@ -905,6 +905,7 @@
#define RLC_LB_CNTR_MAX 0xC348
#define RLC_LB_CNTL 0xC364
# define LOAD_BALANCE_ENABLE (1 << 0)
#define RLC_LB_CNTR_INIT 0xC36C