Merge 5.4.7 into android-5.4
Changes in 5.4.7 af_packet: set defaule value for tmo fjes: fix missed check in fjes_acpi_add mod_devicetable: fix PHY module format net: dst: Force 4-byte alignment of dst_metrics net: gemini: Fix memory leak in gmac_setup_txqs net: hisilicon: Fix a BUG trigered by wrong bytes_compl net: nfc: nci: fix a possible sleep-in-atomic-context bug in nci_uart_tty_receive() net: phy: ensure that phy IDs are correctly typed net: qlogic: Fix error paths in ql_alloc_large_buffers() net-sysfs: Call dev_hold always in rx_queue_add_kobject net: usb: lan78xx: Fix suspend/resume PHY register access error nfp: flower: fix stats id allocation qede: Disable hardware gro when xdp prog is installed qede: Fix multicast mac configuration sctp: fix memleak on err handling of stream initialization sctp: fully initialize v4 addr in some functions selftests: forwarding: Delete IPv6 address at the end neighbour: remove neigh_cleanup() method bonding: fix bond_neigh_init() net: ena: fix default tx interrupt moderation interval net: ena: fix issues in setting interrupt moderation params in ethtool dpaa2-ptp: fix double free of the ptp_qoriq IRQ mlxsw: spectrum_router: Remove unlikely user-triggerable warning net: ethernet: ti: davinci_cpdma: fix warning "device driver frees DMA memory with different size" net: stmmac: platform: Fix MDIO init for platforms without PHY net: dsa: b53: Fix egress flooding settings NFC: nxp-nci: Fix probing without ACPI btrfs: don't double lock the subvol_sem for rename exchange btrfs: do not call synchronize_srcu() in inode_tree_del Btrfs: make tree checker detect checksum items with overlapping ranges btrfs: return error pointer from alloc_test_extent_buffer Btrfs: fix missing data checksums after replaying a log tree btrfs: send: remove WARN_ON for readonly mount btrfs: abort transaction after failed inode updates in create_subvol btrfs: skip log replay on orphaned roots btrfs: do not leak reloc root if we fail to read the fs root btrfs: handle ENOENT in btrfs_uuid_tree_iterate Btrfs: fix removal logic of the tree mod log that leads to use-after-free issues ALSA: pcm: Avoid possible info leaks from PCM stream buffers ALSA: hda/ca0132 - Keep power on during processing DSP response ALSA: hda/ca0132 - Avoid endless loop ALSA: hda/ca0132 - Fix work handling in delayed HP detection drm/vc4/vc4_hdmi: fill in connector info drm/virtio: switch virtio_gpu_wait_ioctl() to gem helper. drm: mst: Fix query_payload ack reply struct drm/mipi-dbi: fix a loop in debugfs code drm/panel: Add missing drm_panel_init() in panel drivers drm: exynos: exynos_hdmi: use cec_notifier_conn_(un)register drm: Use EOPNOTSUPP, not ENOTSUPP drm/amd/display: verify stream link before link test drm/bridge: analogix-anx78xx: silence -EPROBE_DEFER warnings drm/amd/display: OTC underflow fix iio: max31856: add missing of_node and parent references to iio_dev iio: light: bh1750: Resolve compiler warning and make code more readable drm/amdgpu/sriov: add ring_stop before ring_create in psp v11 code drm/amdgpu: grab the id mgr lock while accessing passid_mapping drm/ttm: return -EBUSY on pipelining with no_gpu_wait (v2) drm/amd/display: Rebuild mapped resources after pipe split ath10k: add cleanup in ath10k_sta_state() drm/amd/display: Handle virtual signal type in disable_link() ath10k: Check if station exists before forwarding tx airtime report spi: Add call to spi_slave_abort() function when spidev driver is released drm/meson: vclk: use the correct G12A frac max value staging: rtl8192u: fix multiple memory leaks on error path staging: rtl8188eu: fix possible null dereference rtlwifi: prevent memory leak in rtl_usb_probe libertas: fix a potential NULL pointer dereference Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2" Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D" ath10k: fix backtrace on coredump IB/iser: bound protection_sg size by data_sg size drm/komeda: Workaround for broken FLIP_COMPLETE timestamps spi: gpio: prevent memory leak in spi_gpio_probe media: am437x-vpfe: Setting STD to current value is not an error media: cedrus: fill in bus_info for media device media: seco-cec: Add a missing 'release_region()' in an error handling path media: vim2m: Fix abort issue media: vim2m: Fix BUG_ON in vim2m_device_release() media: max2175: Fix build error without CONFIG_REGMAP_I2C media: ov6650: Fix control handler not freed on init error media: i2c: ov2659: fix s_stream return value media: ov6650: Fix crop rectangle alignment not passed back media: i2c: ov2659: Fix missing 720p register config media: ov6650: Fix stored frame format not in sync with hardware media: ov6650: Fix stored crop rectangle not in sync with hardware tools/power/cpupower: Fix initializer override in hsw_ext_cstates media: venus: core: Fix msm8996 frequency table ath10k: fix offchannel tx failure when no ath10k_mac_tx_frm_has_freq media: vimc: Fix gpf in rmmod path when stream is active drm/amd/display: Set number of pipes to 1 if the second pipe was disabled pinctrl: devicetree: Avoid taking direct reference to device name string drm/sun4i: dsi: Fix TCON DRQ set bits drm/amdkfd: fix a potential NULL pointer dereference (v2) x86/math-emu: Check __copy_from_user() result drm/amd/powerplay: A workaround to GPU RESET on APU selftests/bpf: Correct path to include msg + path drm/amd/display: set minimum abm backlight level media: venus: Fix occasionally failures to suspend rtw88: fix NSS of hw_cap drm/amd/display: fix struct init in update_bounding_box usb: renesas_usbhs: add suspend event support in gadget mode crypto: aegis128-neon - use Clang compatible cflags for ARM hwrng: omap3-rom - Call clk_disable_unprepare() on exit only if not idled regulator: max8907: Fix the usage of uninitialized variable in max8907_regulator_probe() tools/memory-model: Fix data race detection for unordered store and load media: flexcop-usb: fix NULL-ptr deref in flexcop_usb_transfer_init() media: cec-funcs.h: add status_req checks media: meson/ao-cec: move cec_notifier_cec_adap_register after hw setup drm/bridge: dw-hdmi: Refuse DDC/CI transfers on the internal I2C controller samples: pktgen: fix proc_cmd command result check logic block: Fix writeback throttling W=1 compiler warnings drm/amdkfd: Fix MQD size calculation MIPS: futex: Emit Loongson3 sync workarounds within asm mwifiex: pcie: Fix memory leak in mwifiex_pcie_init_evt_ring drm/drm_vblank: Change EINVAL by the correct errno selftests/bpf: Fix btf_dump padding test case libbpf: Fix struct end padding in btf_dump libbpf: Fix passing uninitialized bytes to setsockopt net/smc: increase device refcount for added link group team: call RCU read lock when walking the port_list media: cx88: Fix some error handling path in 'cx8800_initdev()' crypto: inside-secure - Fix a maybe-uninitialized warning crypto: aegis128/simd - build 32-bit ARM for v8 architecture explicitly misc: fastrpc: fix memory leak from miscdev->name ASoC: SOF: enable sync_write in hdac_bus media: ti-vpe: vpe: Fix Motion Vector vpdma stride media: ti-vpe: vpe: fix a v4l2-compliance warning about invalid pixel format media: ti-vpe: vpe: fix a v4l2-compliance failure about frame sequence number media: ti-vpe: vpe: Make sure YUYV is set as default format media: ti-vpe: vpe: fix a v4l2-compliance failure causing a kernel panic media: ti-vpe: vpe: ensure buffers are cleaned up properly in abort cases drm/amd/display: Properly round nominal frequency for SPD drm/amd/display: wait for set pipe mcp command completion media: ti-vpe: vpe: fix a v4l2-compliance failure about invalid sizeimage drm/amd/display: add new active dongle to existent w/a syscalls/x86: Use the correct function type in SYSCALL_DEFINE0 drm/amd/display: Fix dongle_caps containing stale information. extcon: sm5502: Reset registers during initialization drm/amd/display: Program DWB watermarks from correct state x86/mm: Use the correct function type for native_set_fixmap() ath10k: Correct error handling of dma_map_single() rtw88: coex: Set 4 slot mode for A2DP drm/bridge: dw-hdmi: Restore audio when setting a mode perf test: Report failure for mmap events perf report: Add warning when libunwind not compiled in perf test: Avoid infinite loop for task exit case perf vendor events arm64: Fix Hisi hip08 DDRC PMU eventname usb: usbfs: Suppress problematic bind and unbind uevents. drm/amd/powerplay: avoid disabling ECC if RAS is enabled for VEGA20 iio: adc: max1027: Reset the device at probe time Bluetooth: btusb: avoid unused function warning Bluetooth: missed cpu_to_le16 conversion in hci_init4_req Bluetooth: Workaround directed advertising bug in Broadcom controllers Bluetooth: hci_core: fix init for HCI_USER_CHANNEL bpf/stackmap: Fix deadlock with rq_lock in bpf_get_stack() x86/mce: Lower throttling MCE messages' priority to warning drm/amd/display: enable hostvm based on roimmu active for dcn2.1 drm/amd/display: fix header for RN clk mgr drm/amdgpu: fix amdgpu trace event print string format error staging: iio: ad9834: add a check for devm_clk_get power: supply: cpcap-battery: Check voltage before orderly_poweroff perf tests: Disable bp_signal testing for arm64 selftests/bpf: Make a copy of subtest name net: hns3: log and clear hardware error after reset complete RDMA/hns: Fix wrong parameters when initial mtt of srq->idx_que drm/gma500: fix memory disclosures due to uninitialized bytes ASoC: soc-pcm: fixup dpcm_prune_paths() loop continue rtl8xxxu: fix RTL8723BU connection failure issue after warm reboot RDMA/siw: Fix SQ/RQ drain logic ipmi: Don't allow device module unload when in use x86/ioapic: Prevent inconsistent state when moving an interrupt media: cedrus: Fix undefined shift with a SHIFT_AND_MASK_BITS macro media: aspeed: set hsync and vsync polarities to normal before starting mode detection drm/nouveau: Don't grab runtime PM refs for HPD IRQs media: ov6650: Fix stored frame interval not in sync with hardware media: ad5820: Define entity function media: ov5640: Make 2592x1944 mode only available at 15 fps media: st-mipid02: add a check for devm_gpiod_get_optional media: imx7-mipi-csis: Add a check for devm_regulator_get media: aspeed: clear garbage interrupts media: smiapp: Register sensor after enabling runtime PM on the device md: no longer compare spare disk superblock events in super_load staging: wilc1000: potential corruption in wilc_parse_join_bss_param() md/bitmap: avoid race window between md_bitmap_resize and bitmap_file_clear_bit drm: Don't free jobs in wait_event_interruptible() EDAC/amd64: Set grain per DIMM arm64: psci: Reduce the waiting time for cpu_psci_cpu_kill() drm/amd/display: setting the DIG_MODE to the correct value. i40e: initialize ITRN registers with correct values drm/amd/display: correctly populate dpp refclk in fpga i40e: Wrong 'Advertised FEC modes' after set FEC to AUTO net: phy: dp83867: enable robust auto-mdix drm/tegra: sor: Use correct SOR index on Tegra210 regulator: core: Release coupled_rdevs on regulator_init_coupling() error ubsan, x86: Annotate and allow __ubsan_handle_shift_out_of_bounds() in uaccess regions spi: sprd: adi: Add missing lock protection when rebooting ACPI: button: Add DMI quirk for Medion Akoya E2215T RDMA/qedr: Fix memory leak in user qp and mr RDMA/hns: Fix memory leak on 'context' on error return path RDMA/qedr: Fix srqs xarray initialization RDMA/core: Set DMA parameters correctly staging: wilc1000: check if device is initialzied before changing vif gpu: host1x: Allocate gather copy for host1x net: dsa: LAN9303: select REGMAP when LAN9303 enable phy: renesas: phy-rcar-gen2: Fix the array off by one warning phy: qcom-usb-hs: Fix extcon double register after power cycle s390/time: ensure get_clock_monotonic() returns monotonic values s390: add error handling to perf_callchain_kernel s390/mm: add mm_pxd_folded() checks to pxd_free() net: hns3: add struct netdev_queue debug info for TX timeout libata: Ensure ata_port probe has completed before detach loop: fix no-unmap write-zeroes request behavior net/mlx5e: Verify that rule has at least one fwd/drop action pinctrl: sh-pfc: sh7734: Fix duplicate TCLK1_B ALSA: bebob: expand sleep just after breaking connections for protocol version 1 iio: dln2-adc: fix iio_triggered_buffer_postenable() position libbpf: Fix error handling in bpf_map__reuse_fd() Bluetooth: Fix advertising duplicated flags ALSA: pcm: Fix missing check of the new non-cached buffer type spi: sifive: disable clk when probe fails and remove ASoC: SOF: imx: fix reverse CONFIG_SND_SOC_SOF_OF dependency pinctrl: qcom: sc7180: Add missing tile info in SDC_QDSD_PINGROUP/UFS_RESET pinctrl: amd: fix __iomem annotation in amd_gpio_irq_handler() ixgbe: protect TX timestamping from API misuse cpufreq: sun50i: Fix CPU speed bin detection media: rcar_drif: fix a memory disclosure media: v4l2-core: fix touch support in v4l_g_fmt nvme: introduce "Command Aborted By host" status code media: staging/imx: Use a shorter name for driver nvmem: imx-ocotp: reset error status on probe nvmem: core: fix nvmem_cell_write inline function ASoC: SOF: topology: set trigger order for FE DAI link media: vivid: media_device_cleanup was called too early spi: dw: Fix Designware SPI loopback bnx2x: Fix PF-VF communication over multi-cos queues. spi: img-spfi: fix potential double release ALSA: timer: Limit max amount of slave instances RDMA/core: Fix return code when modify_port isn't supported drm: msm: a6xx: fix debug bus register configuration rtlwifi: fix memory leak in rtl92c_set_fw_rsvdpagepkt() perf probe: Fix to find range-only function instance perf cs-etm: Fix definition of macro TO_CS_QUEUE_NR perf probe: Fix to list probe event with correct line number perf jevents: Fix resource leak in process_mapfile() and main() perf probe: Walk function lines in lexical blocks perf probe: Fix to probe an inline function which has no entry pc perf probe: Fix to show ranges of variables in functions without entry_pc perf probe: Fix to show inlined function callsite without entry_pc libsubcmd: Use -O0 with DEBUG=1 perf probe: Fix to probe a function which has no entry pc perf tools: Fix cross compile for ARM64 perf tools: Splice events onto evlist even on error drm/amdgpu: disallow direct upload save restore list from gfx driver drm/amd/powerplay: fix struct init in renoir_print_clk_levels drm/amdgpu: fix potential double drop fence reference ice: Check for null pointer dereference when setting rings xen/gntdev: Use select for DMA_SHARED_BUFFER perf parse: If pmu configuration fails free terms perf probe: Skip overlapped location on searching variables net: avoid potential false sharing in neighbor related code perf probe: Return a better scope DIE if there is no best scope perf probe: Fix to show calling lines of inlined functions perf probe: Skip end-of-sequence and non statement lines perf probe: Filter out instances except for inlined subroutine and subprogram libbpf: Fix negative FD close() in xsk_setup_xdp_prog() s390/bpf: Use kvcalloc for addrs array cgroup: freezer: don't change task and cgroups status unnecessarily selftests: proc: Make va_max 1MB drm/amdgpu: Avoid accidental thread reactivation. media: exynos4-is: fix wrong mdev and v4l2 dev order in error path ath10k: fix get invalid tx rate for Mesh metric fsi: core: Fix small accesses and unaligned offsets via sysfs selftests: net: Fix printf format warnings on arm media: pvrusb2: Fix oops on tear-down when radio support is not present soundwire: intel: fix PDI/stream mapping for Bulk crypto: atmel - Fix authenc support when it is set to m ice: delay less media: si470x-i2c: add missed operations in remove media: cedrus: Use helpers to access capture queue media: v4l2-ctrl: Lock main_hdl on operations of requests_queued. iio: cros_ec_baro: set info_mask_shared_by_all_available field EDAC/ghes: Fix grain calculation media: vicodec: media_device_cleanup was called too early media: vim2m: media_device_cleanup was called too early spi: pxa2xx: Add missed security checks ASoC: rt5677: Mark reg RT5677_PWR_ANLG2 as volatile iio: dac: ad5446: Add support for new AD5600 DAC bpf, testing: Workaround a verifier failure for test_progs ASoC: Intel: kbl_rt5663_rt5514_max98927: Add dmic format constraint net: dsa: sja1105: Disallow management xmit during switch reset r8169: respect EEE user setting when restarting network s390/disassembler: don't hide instruction addresses net: ethernet: ti: Add dependency for TI_DAVINCI_EMAC nvme: Discard workaround for non-conformant devices parport: load lowlevel driver if ports not found bcache: fix static checker warning in bcache_device_free() cpufreq: Register drivers only after CPU devices have been registered qtnfmac: fix debugfs support for multiple cards qtnfmac: fix invalid channel information output x86/crash: Add a forward declaration of struct kimage qtnfmac: fix using skb after free RDMA/efa: Clear the admin command buffer prior to its submission tracing: use kvcalloc for tgid_map array allocation MIPS: ralink: enable PCI support only if driver for mt7621 SoC is selected tracing/kprobe: Check whether the non-suffixed symbol is notrace bcache: fix deadlock in bcache_allocator iwlwifi: mvm: fix unaligned read of rx_pkt_status ASoC: wm8904: fix regcache handling regulator: core: Let boot-on regulators be powered off spi: tegra20-slink: add missed clk_unprepare tun: fix data-race in gro_normal_list() xhci-pci: Allow host runtime PM as default also for Intel Ice Lake xHCI crypto: virtio - deal with unsupported input sizes mmc: tmio: Add MMC_CAP_ERASE to allow erase/discard/trim requests btrfs: don't prematurely free work in end_workqueue_fn() btrfs: don't prematurely free work in run_ordered_work() sched/uclamp: Fix overzealous type replacement ASoC: wm2200: add missed operations in remove and probe failure spi: st-ssc4: add missed pm_runtime_disable ASoC: wm5100: add missed pm_runtime_disable perf/core: Fix the mlock accounting, again selftests, bpf: Fix test_tc_tunnel hanging selftests, bpf: Workaround an alu32 sub-register spilling issue bnxt_en: Return proper error code for non-existent NVM variable net: phy: avoid matching all-ones clause 45 PHY IDs firmware_loader: Fix labels with comma for builtin firmware ASoC: Intel: bytcr_rt5640: Update quirk for Acer Switch 10 SW5-012 2-in-1 x86/insn: Add some Intel instructions to the opcode map net-af_xdp: Use correct number of channels from ethtool brcmfmac: remove monitor interface when detaching perf session: Fix decompression of PERF_RECORD_COMPRESSED records perf probe: Fix to show function entry line as probe-able s390/crypto: Fix unsigned variable compared with zero s390/kasan: support memcpy_real with TRACE_IRQFLAGS bnxt_en: Improve RX buffer error handling. iwlwifi: check kasprintf() return value fbtft: Make sure string is NULL terminated ASoC: soc-pcm: check symmetry before hw_params net: ethernet: ti: ale: clean ale tbl on init and intf restart mt76: fix possible out-of-bound access in mt7615_fill_txs/mt7603_fill_txs s390/cpumf: Adjust registration of s390 PMU device drivers crypto: sun4i-ss - Fix 64-bit size_t warnings crypto: sun4i-ss - Fix 64-bit size_t warnings on sun4i-ss-hash.c mac80211: consider QoS Null frames for STA_NULLFUNC_ACKED crypto: vmx - Avoid weird build failures libtraceevent: Fix memory leakage in copy_filter_type mips: fix build when "48 bits virtual memory" is enabled drm/amdgpu: fix bad DMA from INTERRUPT_CNTL2 ice: Only disable VF state when freeing each VF resources ice: Fix setting coalesce to handle DCB configuration net: phy: initialise phydev speed and duplex sanely tools, bpf: Fix build for 'make -s tools/bpf O=<dir>' RDMA/bnxt_re: Fix missing le16_to_cpu RDMA/bnxt_re: Fix stat push into dma buffer on gen p5 devices bpf: Provide better register bounds after jmp32 instructions RDMA/bnxt_re: Fix chip number validation Broadcom's Gen P5 series ibmvnic: Fix completion structure initialization net: wireless: intel: iwlwifi: fix GRO_NORMAL packet stalling MIPS: futex: Restore \n after sync instructions btrfs: don't prematurely free work in reada_start_machine_worker() btrfs: don't prematurely free work in scrub_missing_raid56_worker() Revert "mmc: sdhci: Fix incorrect switch to HS mode" mmc: mediatek: fix CMD_TA to 2 for MT8173 HS200/HS400 mode tpm_tis: reserve chip for duration of tpm_tis_core_init tpm: fix invalid locking in NONBLOCKING mode iommu: fix KASAN use-after-free in iommu_insert_resv_region iommu: set group default domain before creating direct mappings iommu/vt-d: Fix dmar pte read access not set error iommu/vt-d: Set ISA bridge reserved region as relaxable iommu/vt-d: Allocate reserved region for ISA with correct permission can: xilinx_can: Fix missing Rx can packets on CANFD2.0 can: m_can: tcan4x5x: add required delay after reset can: j1939: j1939_sk_bind(): take priv after lock is held can: flexcan: fix possible deadlock and out-of-order reception after wakeup can: flexcan: poll MCR_LPM_ACK instead of GPR ACK for stop mode acknowledgment can: kvaser_usb: kvaser_usb_leaf: Fix some info-leaks to USB devices selftests: net: tls: remove recv_rcvbuf test spi: dw: Correct handling of native chipselect spi: cadence: Correct handling of native chipselect usb: xhci: Fix build warning seen with CONFIG_PM=n drm/amdgpu: fix uninitialized variable pasid_mapping_needed ath10k: Revert "ath10k: add cleanup in ath10k_sta_state()" RDMA/siw: Fix post_recv QP state locking md: avoid invalid memory access for array sb->dev_roles s390/ftrace: fix endless recursion in function_graph tracer ARM: dts: Fix vcsi regulator to be always-on for droid4 to prevent hangs can: flexcan: add low power enter/exit acknowledgment helper usbip: Fix receive error in vhci-hcd when using scatter-gather usbip: Fix error path of vhci_recv_ret_submit() spi: fsl: don't map irq during probe spi: fsl: use platform_get_irq() instead of of_irq_to_resource() efi/memreserve: Register reservations as 'reserved' in /proc/iomem cpufreq: Avoid leaving stale IRQ work items during CPU offline KEYS: asymmetric: return ENOMEM if akcipher_request_alloc() fails mm: vmscan: protect shrinker idr replace with CONFIG_MEMCG USB: EHCI: Do not return -EPIPE when hub is disconnected intel_th: pci: Add Comet Lake PCH-V support intel_th: pci: Add Elkhart Lake SOC support intel_th: Fix freeing IRQs intel_th: msu: Fix window switching without windows platform/x86: hp-wmi: Make buffer for HPWMI_FEATURE2_QUERY 128 bytes staging: comedi: gsc_hpdi: check dma_alloc_coherent() return value tty/serial: atmel: fix out of range clock divider handling serial: sprd: Add clearing break interrupt operation pinctrl: baytrail: Really serialize all register accesses clk: imx: clk-imx7ulp: Add missing sentinel of ulp_div_table clk: imx: clk-composite-8m: add lock to gate/mux clk: imx: pll14xx: fix clk_pll14xx_wait_lock ext4: fix ext4_empty_dir() for directories with holes ext4: check for directory entries too close to block end ext4: unlock on error in ext4_expand_extra_isize() ext4: validate the debug_want_extra_isize mount option at parse time iocost: over-budget forced IOs should schedule async delay KVM: PPC: Book3S HV: Fix regression on big endian hosts kvm: x86: Host feature SSBD doesn't imply guest feature SPEC_CTRL_SSBD kvm: x86: Host feature SSBD doesn't imply guest feature AMD_SSBD KVM: arm/arm64: Properly handle faulting of device mappings KVM: arm64: Ensure 'params' is initialised when looking up sys register x86/intel: Disable HPET on Intel Coffee Lake H platforms x86/MCE/AMD: Do not use rdmsr_safe_on_cpu() in smca_configure() x86/MCE/AMD: Allow Reserved types to be overwritten in smca_banks[] x86/mce: Fix possibly incorrect severity calculation on AMD powerpc/vcpu: Assume dedicated processors as non-preempt powerpc/irq: fix stack overflow verification ocxl: Fix concurrent AFU open and device removal mmc: sdhci-msm: Correct the offset and value for DDR_CONFIG register mmc: sdhci-of-esdhc: Revert "mmc: sdhci-of-esdhc: add erratum A-009204 support" mmc: sdhci: Update the tuning failed messages to pr_debug level mmc: sdhci-of-esdhc: fix P2020 errata handling mmc: sdhci: Workaround broken command queuing on Intel GLK mmc: sdhci: Add a quirk for broken command queuing nbd: fix shutdown and recv work deadlock v2 iwlwifi: pcie: move power gating workaround earlier in the flow Linux 5.4.7 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I3585238149235bf73bb453e25861d9a6b9193dfa
This commit is contained in:
2
Makefile
2
Makefile
@@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 4
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SUBLEVEL = 6
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SUBLEVEL = 7
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EXTRAVERSION =
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NAME = Kleptomaniac Octopus
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@@ -160,12 +160,12 @@
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regulator-enable-ramp-delay = <1000>;
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};
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/* Used by DSS */
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/* Used by DSS and is the "zerov_regulator" trigger for SoC off mode */
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vcsi: VCSI {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-enable-ramp-delay = <1000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdac: VDAC {
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@@ -82,7 +82,8 @@ static void cpu_psci_cpu_die(unsigned int cpu)
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static int cpu_psci_cpu_kill(unsigned int cpu)
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{
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int err, i;
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int err;
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unsigned long start, end;
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if (!psci_ops.affinity_info)
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return 0;
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@@ -92,16 +93,18 @@ static int cpu_psci_cpu_kill(unsigned int cpu)
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* while it is dying. So, try again a few times.
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*/
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for (i = 0; i < 10; i++) {
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start = jiffies;
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end = start + msecs_to_jiffies(100);
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do {
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err = psci_ops.affinity_info(cpu_logical_map(cpu), 0);
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if (err == PSCI_0_2_AFFINITY_LEVEL_OFF) {
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pr_info("CPU%d killed.\n", cpu);
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pr_info("CPU%d killed (polled %d ms)\n", cpu,
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jiffies_to_msecs(jiffies - start));
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return 0;
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}
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msleep(10);
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pr_info("Retrying again to check for CPU kill\n");
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}
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usleep_range(100, 1000);
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} while (time_before(jiffies, end));
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pr_warn("CPU%d may not have shut down cleanly (AFFINITY_INFO reports %d)\n",
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cpu, err);
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||||
|
@@ -2360,8 +2360,11 @@ static const struct sys_reg_desc *index_to_sys_reg_desc(struct kvm_vcpu *vcpu,
|
||||
if ((id & KVM_REG_ARM_COPROC_MASK) != KVM_REG_ARM64_SYSREG)
|
||||
return NULL;
|
||||
|
||||
if (!index_to_params(id, ¶ms))
|
||||
return NULL;
|
||||
|
||||
table = get_target_table(vcpu->arch.target, true, &num);
|
||||
r = find_reg_by_id(id, ¶ms, table, num);
|
||||
r = find_reg(¶ms, table, num);
|
||||
if (!r)
|
||||
r = find_reg(¶ms, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
|
||||
|
||||
|
@@ -218,13 +218,14 @@
|
||||
* ordering will be done by smp_llsc_mb() and friends.
|
||||
*/
|
||||
#if defined(CONFIG_WEAK_REORDERING_BEYOND_LLSC) && defined(CONFIG_SMP)
|
||||
#define __WEAK_LLSC_MB " sync \n"
|
||||
#define smp_llsc_mb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory")
|
||||
#define __LLSC_CLOBBER
|
||||
# define __WEAK_LLSC_MB sync
|
||||
# define smp_llsc_mb() \
|
||||
__asm__ __volatile__(__stringify(__WEAK_LLSC_MB) : : :"memory")
|
||||
# define __LLSC_CLOBBER
|
||||
#else
|
||||
#define __WEAK_LLSC_MB " \n"
|
||||
#define smp_llsc_mb() do { } while (0)
|
||||
#define __LLSC_CLOBBER "memory"
|
||||
# define __WEAK_LLSC_MB
|
||||
# define smp_llsc_mb() do { } while (0)
|
||||
# define __LLSC_CLOBBER "memory"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_CAVIUM_OCTEON
|
||||
|
@@ -16,6 +16,7 @@
|
||||
#include <asm/barrier.h>
|
||||
#include <asm/compiler.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/sync.h>
|
||||
#include <asm/war.h>
|
||||
|
||||
#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
|
||||
@@ -32,7 +33,7 @@
|
||||
" .set arch=r4000 \n" \
|
||||
"2: sc $1, %2 \n" \
|
||||
" beqzl $1, 1b \n" \
|
||||
__WEAK_LLSC_MB \
|
||||
__stringify(__WEAK_LLSC_MB) " \n" \
|
||||
"3: \n" \
|
||||
" .insn \n" \
|
||||
" .set pop \n" \
|
||||
@@ -50,19 +51,19 @@
|
||||
"i" (-EFAULT) \
|
||||
: "memory"); \
|
||||
} else if (cpu_has_llsc) { \
|
||||
loongson_llsc_mb(); \
|
||||
__asm__ __volatile__( \
|
||||
" .set push \n" \
|
||||
" .set noat \n" \
|
||||
" .set push \n" \
|
||||
" .set "MIPS_ISA_ARCH_LEVEL" \n" \
|
||||
" " __SYNC(full, loongson3_war) " \n" \
|
||||
"1: "user_ll("%1", "%4")" # __futex_atomic_op\n" \
|
||||
" .set pop \n" \
|
||||
" " insn " \n" \
|
||||
" .set "MIPS_ISA_ARCH_LEVEL" \n" \
|
||||
"2: "user_sc("$1", "%2")" \n" \
|
||||
" beqz $1, 1b \n" \
|
||||
__WEAK_LLSC_MB \
|
||||
__stringify(__WEAK_LLSC_MB) " \n" \
|
||||
"3: \n" \
|
||||
" .insn \n" \
|
||||
" .set pop \n" \
|
||||
@@ -147,7 +148,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
||||
" .set arch=r4000 \n"
|
||||
"2: sc $1, %2 \n"
|
||||
" beqzl $1, 1b \n"
|
||||
__WEAK_LLSC_MB
|
||||
__stringify(__WEAK_LLSC_MB) " \n"
|
||||
"3: \n"
|
||||
" .insn \n"
|
||||
" .set pop \n"
|
||||
@@ -164,13 +165,13 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
||||
"i" (-EFAULT)
|
||||
: "memory");
|
||||
} else if (cpu_has_llsc) {
|
||||
loongson_llsc_mb();
|
||||
__asm__ __volatile__(
|
||||
"# futex_atomic_cmpxchg_inatomic \n"
|
||||
" .set push \n"
|
||||
" .set noat \n"
|
||||
" .set push \n"
|
||||
" .set "MIPS_ISA_ARCH_LEVEL" \n"
|
||||
" " __SYNC(full, loongson3_war) " \n"
|
||||
"1: "user_ll("%1", "%3")" \n"
|
||||
" bne %1, %z4, 3f \n"
|
||||
" .set pop \n"
|
||||
@@ -178,8 +179,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
||||
" .set "MIPS_ISA_ARCH_LEVEL" \n"
|
||||
"2: "user_sc("$1", "%2")" \n"
|
||||
" beqz $1, 1b \n"
|
||||
__WEAK_LLSC_MB
|
||||
"3: \n"
|
||||
"3: " __SYNC_ELSE(full, loongson3_war, __WEAK_LLSC_MB) "\n"
|
||||
" .insn \n"
|
||||
" .set pop \n"
|
||||
" .section .fixup,\"ax\" \n"
|
||||
@@ -194,7 +194,6 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
||||
: GCC_OFF_SMALL_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval),
|
||||
"i" (-EFAULT)
|
||||
: "memory");
|
||||
loongson_llsc_mb();
|
||||
} else
|
||||
return -ENOSYS;
|
||||
|
||||
|
@@ -18,10 +18,12 @@
|
||||
#include <asm/fixmap.h>
|
||||
|
||||
#define __ARCH_USE_5LEVEL_HACK
|
||||
#if defined(CONFIG_PAGE_SIZE_64KB) && !defined(CONFIG_MIPS_VA_BITS_48)
|
||||
#if CONFIG_PGTABLE_LEVELS == 2
|
||||
#include <asm-generic/pgtable-nopmd.h>
|
||||
#elif !(defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS_VA_BITS_48))
|
||||
#elif CONFIG_PGTABLE_LEVELS == 3
|
||||
#include <asm-generic/pgtable-nopud.h>
|
||||
#else
|
||||
#include <asm-generic/5level-fixup.h>
|
||||
#endif
|
||||
|
||||
/*
|
||||
@@ -216,6 +218,9 @@ static inline unsigned long pgd_page_vaddr(pgd_t pgd)
|
||||
return pgd_val(pgd);
|
||||
}
|
||||
|
||||
#define pgd_phys(pgd) virt_to_phys((void *)pgd_val(pgd))
|
||||
#define pgd_page(pgd) (pfn_to_page(pgd_phys(pgd) >> PAGE_SHIFT))
|
||||
|
||||
static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
|
||||
{
|
||||
return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
|
||||
|
@@ -51,6 +51,7 @@ choice
|
||||
select MIPS_GIC
|
||||
select COMMON_CLK
|
||||
select CLKSRC_MIPS_GIC
|
||||
select HAVE_PCI if PCI_MT7621
|
||||
endchoice
|
||||
|
||||
choice
|
||||
|
@@ -36,10 +36,12 @@
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC_PSERIES
|
||||
DECLARE_STATIC_KEY_FALSE(shared_processor);
|
||||
|
||||
#define vcpu_is_preempted vcpu_is_preempted
|
||||
static inline bool vcpu_is_preempted(int cpu)
|
||||
{
|
||||
if (!firmware_has_feature(FW_FEATURE_SPLPAR))
|
||||
if (!static_branch_unlikely(&shared_processor))
|
||||
return false;
|
||||
return !!(be32_to_cpu(lppaca_of(cpu).yield_count) & 1);
|
||||
}
|
||||
|
@@ -619,8 +619,6 @@ void __do_irq(struct pt_regs *regs)
|
||||
|
||||
trace_irq_entry(regs);
|
||||
|
||||
check_stack_overflow();
|
||||
|
||||
/*
|
||||
* Query the platform PIC for the interrupt & ack it.
|
||||
*
|
||||
@@ -652,6 +650,8 @@ void do_IRQ(struct pt_regs *regs)
|
||||
irqsp = hardirq_ctx[raw_smp_processor_id()];
|
||||
sirqsp = softirq_ctx[raw_smp_processor_id()];
|
||||
|
||||
check_stack_overflow();
|
||||
|
||||
/* Already there ? */
|
||||
if (unlikely(cursp == irqsp || cursp == sirqsp)) {
|
||||
__do_irq(regs);
|
||||
|
@@ -1117,7 +1117,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
|
||||
ld r7, VCPU_GPR(R7)(r4)
|
||||
bne ret_to_ultra
|
||||
|
||||
lwz r0, VCPU_CR(r4)
|
||||
ld r0, VCPU_CR(r4)
|
||||
mtcr r0
|
||||
|
||||
ld r0, VCPU_GPR(R0)(r4)
|
||||
@@ -1137,7 +1137,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
|
||||
* R3 = UV_RETURN
|
||||
*/
|
||||
ret_to_ultra:
|
||||
lwz r0, VCPU_CR(r4)
|
||||
ld r0, VCPU_CR(r4)
|
||||
mtcr r0
|
||||
|
||||
ld r0, VCPU_GPR(R3)(r4)
|
||||
|
@@ -74,6 +74,9 @@
|
||||
#include "pseries.h"
|
||||
#include "../../../../drivers/pci/pci.h"
|
||||
|
||||
DEFINE_STATIC_KEY_FALSE(shared_processor);
|
||||
EXPORT_SYMBOL_GPL(shared_processor);
|
||||
|
||||
int CMO_PrPSP = -1;
|
||||
int CMO_SecPSP = -1;
|
||||
unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
|
||||
@@ -758,6 +761,10 @@ static void __init pSeries_setup_arch(void)
|
||||
|
||||
if (firmware_has_feature(FW_FEATURE_LPAR)) {
|
||||
vpa_init(boot_cpuid);
|
||||
|
||||
if (lppaca_shared_proc(get_lppaca()))
|
||||
static_branch_enable(&shared_processor);
|
||||
|
||||
ppc_md.power_save = pseries_lpar_idle;
|
||||
ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
|
||||
#ifdef CONFIG_PCI_IOV
|
||||
|
@@ -74,14 +74,17 @@ int s390_sha_final(struct shash_desc *desc, u8 *out)
|
||||
struct s390_sha_ctx *ctx = shash_desc_ctx(desc);
|
||||
unsigned int bsize = crypto_shash_blocksize(desc->tfm);
|
||||
u64 bits;
|
||||
unsigned int n, mbl_offset;
|
||||
unsigned int n;
|
||||
int mbl_offset;
|
||||
|
||||
n = ctx->count % bsize;
|
||||
bits = ctx->count * 8;
|
||||
mbl_offset = s390_crypto_shash_parmsize(ctx->func) / sizeof(u32);
|
||||
mbl_offset = s390_crypto_shash_parmsize(ctx->func);
|
||||
if (mbl_offset < 0)
|
||||
return -EINVAL;
|
||||
|
||||
mbl_offset = mbl_offset / sizeof(u32);
|
||||
|
||||
/* set total msg bit length (mbl) in CPACF parmblock */
|
||||
switch (ctx->func) {
|
||||
case CPACF_KLMD_SHA_1:
|
||||
|
@@ -56,7 +56,12 @@ static inline p4d_t *p4d_alloc_one(struct mm_struct *mm, unsigned long address)
|
||||
crst_table_init(table, _REGION2_ENTRY_EMPTY);
|
||||
return (p4d_t *) table;
|
||||
}
|
||||
#define p4d_free(mm, p4d) crst_table_free(mm, (unsigned long *) p4d)
|
||||
|
||||
static inline void p4d_free(struct mm_struct *mm, p4d_t *p4d)
|
||||
{
|
||||
if (!mm_p4d_folded(mm))
|
||||
crst_table_free(mm, (unsigned long *) p4d);
|
||||
}
|
||||
|
||||
static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long address)
|
||||
{
|
||||
@@ -65,7 +70,12 @@ static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long address)
|
||||
crst_table_init(table, _REGION3_ENTRY_EMPTY);
|
||||
return (pud_t *) table;
|
||||
}
|
||||
#define pud_free(mm, pud) crst_table_free(mm, (unsigned long *) pud)
|
||||
|
||||
static inline void pud_free(struct mm_struct *mm, pud_t *pud)
|
||||
{
|
||||
if (!mm_pud_folded(mm))
|
||||
crst_table_free(mm, (unsigned long *) pud);
|
||||
}
|
||||
|
||||
static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long vmaddr)
|
||||
{
|
||||
@@ -83,6 +93,8 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long vmaddr)
|
||||
|
||||
static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
|
||||
{
|
||||
if (mm_pmd_folded(mm))
|
||||
return;
|
||||
pgtable_pmd_page_dtor(virt_to_page(pmd));
|
||||
crst_table_free(mm, (unsigned long *) pmd);
|
||||
}
|
||||
|
@@ -10,8 +10,9 @@
|
||||
#ifndef _ASM_S390_TIMEX_H
|
||||
#define _ASM_S390_TIMEX_H
|
||||
|
||||
#include <asm/lowcore.h>
|
||||
#include <linux/preempt.h>
|
||||
#include <linux/time64.h>
|
||||
#include <asm/lowcore.h>
|
||||
|
||||
/* The value of the TOD clock for 1.1.1970. */
|
||||
#define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
|
||||
@@ -186,15 +187,18 @@ extern unsigned char tod_clock_base[16] __aligned(8);
|
||||
/**
|
||||
* get_clock_monotonic - returns current time in clock rate units
|
||||
*
|
||||
* The caller must ensure that preemption is disabled.
|
||||
* The clock and tod_clock_base get changed via stop_machine.
|
||||
* Therefore preemption must be disabled when calling this
|
||||
* function, otherwise the returned value is not guaranteed to
|
||||
* be monotonic.
|
||||
* Therefore preemption must be disabled, otherwise the returned
|
||||
* value is not guaranteed to be monotonic.
|
||||
*/
|
||||
static inline unsigned long long get_tod_clock_monotonic(void)
|
||||
{
|
||||
return get_tod_clock() - *(unsigned long long *) &tod_clock_base[1];
|
||||
unsigned long long tod;
|
||||
|
||||
preempt_disable_notrace();
|
||||
tod = get_tod_clock() - *(unsigned long long *) &tod_clock_base[1];
|
||||
preempt_enable_notrace();
|
||||
return tod;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@@ -461,10 +461,11 @@ static int print_insn(char *buffer, unsigned char *code, unsigned long addr)
|
||||
ptr += sprintf(ptr, "%%c%i", value);
|
||||
else if (operand->flags & OPERAND_VR)
|
||||
ptr += sprintf(ptr, "%%v%i", value);
|
||||
else if (operand->flags & OPERAND_PCREL)
|
||||
ptr += sprintf(ptr, "%lx", (signed int) value
|
||||
+ addr);
|
||||
else if (operand->flags & OPERAND_SIGNED)
|
||||
else if (operand->flags & OPERAND_PCREL) {
|
||||
void *pcrel = (void *)((int)value + addr);
|
||||
|
||||
ptr += sprintf(ptr, "%px", pcrel);
|
||||
} else if (operand->flags & OPERAND_SIGNED)
|
||||
ptr += sprintf(ptr, "%i", value);
|
||||
else
|
||||
ptr += sprintf(ptr, "%u", value);
|
||||
@@ -536,7 +537,7 @@ void show_code(struct pt_regs *regs)
|
||||
else
|
||||
*ptr++ = ' ';
|
||||
addr = regs->psw.addr + start - 32;
|
||||
ptr += sprintf(ptr, "%016lx: ", addr);
|
||||
ptr += sprintf(ptr, "%px: ", (void *)addr);
|
||||
if (start + opsize >= end)
|
||||
break;
|
||||
for (i = 0; i < opsize; i++)
|
||||
@@ -564,7 +565,7 @@ void print_fn_code(unsigned char *code, unsigned long len)
|
||||
opsize = insn_length(*code);
|
||||
if (opsize > len)
|
||||
break;
|
||||
ptr += sprintf(ptr, "%p: ", code);
|
||||
ptr += sprintf(ptr, "%px: ", code);
|
||||
for (i = 0; i < opsize; i++)
|
||||
ptr += sprintf(ptr, "%02x", code[i]);
|
||||
*ptr++ = '\t';
|
||||
|
@@ -199,7 +199,7 @@ static const int cpumf_generic_events_user[] = {
|
||||
[PERF_COUNT_HW_BUS_CYCLES] = -1,
|
||||
};
|
||||
|
||||
static int __hw_perf_event_init(struct perf_event *event)
|
||||
static int __hw_perf_event_init(struct perf_event *event, unsigned int type)
|
||||
{
|
||||
struct perf_event_attr *attr = &event->attr;
|
||||
struct hw_perf_event *hwc = &event->hw;
|
||||
@@ -207,7 +207,7 @@ static int __hw_perf_event_init(struct perf_event *event)
|
||||
int err = 0;
|
||||
u64 ev;
|
||||
|
||||
switch (attr->type) {
|
||||
switch (type) {
|
||||
case PERF_TYPE_RAW:
|
||||
/* Raw events are used to access counters directly,
|
||||
* hence do not permit excludes */
|
||||
@@ -294,17 +294,16 @@ static int __hw_perf_event_init(struct perf_event *event)
|
||||
|
||||
static int cpumf_pmu_event_init(struct perf_event *event)
|
||||
{
|
||||
unsigned int type = event->attr.type;
|
||||
int err;
|
||||
|
||||
switch (event->attr.type) {
|
||||
case PERF_TYPE_HARDWARE:
|
||||
case PERF_TYPE_HW_CACHE:
|
||||
case PERF_TYPE_RAW:
|
||||
err = __hw_perf_event_init(event);
|
||||
break;
|
||||
default:
|
||||
if (type == PERF_TYPE_HARDWARE || type == PERF_TYPE_RAW)
|
||||
err = __hw_perf_event_init(event, type);
|
||||
else if (event->pmu->type == type)
|
||||
/* Registered as unknown PMU */
|
||||
err = __hw_perf_event_init(event, PERF_TYPE_RAW);
|
||||
else
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
if (unlikely(err) && event->destroy)
|
||||
event->destroy(event);
|
||||
@@ -553,7 +552,7 @@ static int __init cpumf_pmu_init(void)
|
||||
return -ENODEV;
|
||||
|
||||
cpumf_pmu.attr_groups = cpumf_cf_event_group();
|
||||
rc = perf_pmu_register(&cpumf_pmu, "cpum_cf", PERF_TYPE_RAW);
|
||||
rc = perf_pmu_register(&cpumf_pmu, "cpum_cf", -1);
|
||||
if (rc)
|
||||
pr_err("Registering the cpum_cf PMU failed with rc=%i\n", rc);
|
||||
return rc;
|
||||
|
@@ -243,13 +243,13 @@ static int cf_diag_event_init(struct perf_event *event)
|
||||
int err = -ENOENT;
|
||||
|
||||
debug_sprintf_event(cf_diag_dbg, 5,
|
||||
"%s event %p cpu %d config %#llx "
|
||||
"%s event %p cpu %d config %#llx type:%u "
|
||||
"sample_type %#llx cf_diag_events %d\n", __func__,
|
||||
event, event->cpu, attr->config, attr->sample_type,
|
||||
atomic_read(&cf_diag_events));
|
||||
event, event->cpu, attr->config, event->pmu->type,
|
||||
attr->sample_type, atomic_read(&cf_diag_events));
|
||||
|
||||
if (event->attr.config != PERF_EVENT_CPUM_CF_DIAG ||
|
||||
event->attr.type != PERF_TYPE_RAW)
|
||||
event->attr.type != event->pmu->type)
|
||||
goto out;
|
||||
|
||||
/* Raw events are used to access counters directly,
|
||||
@@ -693,7 +693,7 @@ static int __init cf_diag_init(void)
|
||||
}
|
||||
debug_register_view(cf_diag_dbg, &debug_sprintf_view);
|
||||
|
||||
rc = perf_pmu_register(&cf_diag, "cpum_cf_diag", PERF_TYPE_RAW);
|
||||
rc = perf_pmu_register(&cf_diag, "cpum_cf_diag", -1);
|
||||
if (rc) {
|
||||
debug_unregister_view(cf_diag_dbg, &debug_sprintf_view);
|
||||
debug_unregister(cf_diag_dbg);
|
||||
|
@@ -224,9 +224,13 @@ void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
struct unwind_state state;
|
||||
unsigned long addr;
|
||||
|
||||
unwind_for_each_frame(&state, current, regs, 0)
|
||||
perf_callchain_store(entry, state.ip);
|
||||
unwind_for_each_frame(&state, current, regs, 0) {
|
||||
addr = unwind_get_return_address(&state);
|
||||
if (!addr || perf_callchain_store(entry, addr))
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/* Perf definitions for PMU event attributes in sysfs */
|
||||
|
@@ -70,7 +70,7 @@ void notrace s390_kernel_write(void *dst, const void *src, size_t size)
|
||||
spin_unlock_irqrestore(&s390_kernel_write_lock, flags);
|
||||
}
|
||||
|
||||
static int __memcpy_real(void *dest, void *src, size_t count)
|
||||
static int __no_sanitize_address __memcpy_real(void *dest, void *src, size_t count)
|
||||
{
|
||||
register unsigned long _dest asm("2") = (unsigned long) dest;
|
||||
register unsigned long _len1 asm("3") = (unsigned long) count;
|
||||
@@ -91,19 +91,23 @@ static int __memcpy_real(void *dest, void *src, size_t count)
|
||||
return rc;
|
||||
}
|
||||
|
||||
static unsigned long _memcpy_real(unsigned long dest, unsigned long src,
|
||||
unsigned long count)
|
||||
static unsigned long __no_sanitize_address _memcpy_real(unsigned long dest,
|
||||
unsigned long src,
|
||||
unsigned long count)
|
||||
{
|
||||
int irqs_disabled, rc;
|
||||
unsigned long flags;
|
||||
|
||||
if (!count)
|
||||
return 0;
|
||||
flags = __arch_local_irq_stnsm(0xf8UL);
|
||||
flags = arch_local_irq_save();
|
||||
irqs_disabled = arch_irqs_disabled_flags(flags);
|
||||
if (!irqs_disabled)
|
||||
trace_hardirqs_off();
|
||||
__arch_local_irq_stnsm(0xf8); // disable DAT
|
||||
rc = __memcpy_real((void *) dest, (void *) src, (size_t) count);
|
||||
if (flags & PSW_MASK_DAT)
|
||||
__arch_local_irq_stosm(0x04); // enable DAT
|
||||
if (!irqs_disabled)
|
||||
trace_hardirqs_on();
|
||||
__arch_local_irq_ssm(flags);
|
||||
|
@@ -23,6 +23,7 @@
|
||||
#include <linux/filter.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/bpf.h>
|
||||
#include <linux/mm.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/dis.h>
|
||||
#include <asm/facility.h>
|
||||
@@ -1369,7 +1370,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
|
||||
}
|
||||
|
||||
memset(&jit, 0, sizeof(jit));
|
||||
jit.addrs = kcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL);
|
||||
jit.addrs = kvcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL);
|
||||
if (jit.addrs == NULL) {
|
||||
fp = orig_fp;
|
||||
goto out;
|
||||
@@ -1422,7 +1423,7 @@ skip_init_ctx:
|
||||
if (!fp->is_func || extra_pass) {
|
||||
bpf_prog_fill_jited_linfo(fp, jit.addrs + 1);
|
||||
free_addrs:
|
||||
kfree(jit.addrs);
|
||||
kvfree(jit.addrs);
|
||||
kfree(jit_data);
|
||||
fp->aux->jit_data = NULL;
|
||||
}
|
||||
|
@@ -134,7 +134,7 @@ enum {
|
||||
GPIO_FN_EX_WAIT1, GPIO_FN_SD1_DAT0_A, GPIO_FN_DREQ2, GPIO_FN_CAN1_TX_C,
|
||||
GPIO_FN_ET0_LINK_C, GPIO_FN_ET0_ETXD5_A,
|
||||
GPIO_FN_EX_WAIT0, GPIO_FN_TCLK1_B,
|
||||
GPIO_FN_RD_WR, GPIO_FN_TCLK0,
|
||||
GPIO_FN_RD_WR, GPIO_FN_TCLK0, GPIO_FN_CAN_CLK_B, GPIO_FN_ET0_ETXD4,
|
||||
GPIO_FN_EX_CS5, GPIO_FN_SD1_CMD_A, GPIO_FN_ATADIR, GPIO_FN_QSSL_B,
|
||||
GPIO_FN_ET0_ETXD3_A,
|
||||
GPIO_FN_EX_CS4, GPIO_FN_SD1_WP_A, GPIO_FN_ATAWR, GPIO_FN_QMI_QIO1_B,
|
||||
|
@@ -2,6 +2,8 @@
|
||||
#ifndef _ASM_X86_CRASH_H
|
||||
#define _ASM_X86_CRASH_H
|
||||
|
||||
struct kimage;
|
||||
|
||||
int crash_load_segments(struct kimage *image);
|
||||
int crash_copy_backup_region(struct kimage *image);
|
||||
int crash_setup_memmap_entries(struct kimage *image,
|
||||
|
@@ -156,7 +156,7 @@ extern pte_t *kmap_pte;
|
||||
extern pte_t *pkmap_page_table;
|
||||
|
||||
void __native_set_fixmap(enum fixed_addresses idx, pte_t pte);
|
||||
void native_set_fixmap(enum fixed_addresses idx,
|
||||
void native_set_fixmap(unsigned /* enum fixed_addresses */ idx,
|
||||
phys_addr_t phys, pgprot_t flags);
|
||||
|
||||
#ifndef CONFIG_PARAVIRT_XXL
|
||||
|
@@ -48,12 +48,13 @@
|
||||
* To keep the naming coherent, re-define SYSCALL_DEFINE0 to create an alias
|
||||
* named __ia32_sys_*()
|
||||
*/
|
||||
#define SYSCALL_DEFINE0(sname) \
|
||||
SYSCALL_METADATA(_##sname, 0); \
|
||||
asmlinkage long __x64_sys_##sname(void); \
|
||||
ALLOW_ERROR_INJECTION(__x64_sys_##sname, ERRNO); \
|
||||
SYSCALL_ALIAS(__ia32_sys_##sname, __x64_sys_##sname); \
|
||||
asmlinkage long __x64_sys_##sname(void)
|
||||
|
||||
#define SYSCALL_DEFINE0(sname) \
|
||||
SYSCALL_METADATA(_##sname, 0); \
|
||||
asmlinkage long __x64_sys_##sname(const struct pt_regs *__unused);\
|
||||
ALLOW_ERROR_INJECTION(__x64_sys_##sname, ERRNO); \
|
||||
SYSCALL_ALIAS(__ia32_sys_##sname, __x64_sys_##sname); \
|
||||
asmlinkage long __x64_sys_##sname(const struct pt_regs *__unused)
|
||||
|
||||
#define COND_SYSCALL(name) \
|
||||
cond_syscall(__x64_sys_##name); \
|
||||
@@ -181,11 +182,11 @@
|
||||
* macros to work correctly.
|
||||
*/
|
||||
#ifndef SYSCALL_DEFINE0
|
||||
#define SYSCALL_DEFINE0(sname) \
|
||||
SYSCALL_METADATA(_##sname, 0); \
|
||||
asmlinkage long __x64_sys_##sname(void); \
|
||||
ALLOW_ERROR_INJECTION(__x64_sys_##sname, ERRNO); \
|
||||
asmlinkage long __x64_sys_##sname(void)
|
||||
#define SYSCALL_DEFINE0(sname) \
|
||||
SYSCALL_METADATA(_##sname, 0); \
|
||||
asmlinkage long __x64_sys_##sname(const struct pt_regs *__unused);\
|
||||
ALLOW_ERROR_INJECTION(__x64_sys_##sname, ERRNO); \
|
||||
asmlinkage long __x64_sys_##sname(const struct pt_regs *__unused)
|
||||
#endif
|
||||
|
||||
#ifndef COND_SYSCALL
|
||||
|
@@ -1727,9 +1727,10 @@ static bool io_apic_level_ack_pending(struct mp_chip_data *data)
|
||||
|
||||
static inline bool ioapic_irqd_mask(struct irq_data *data)
|
||||
{
|
||||
/* If we are moving the irq we need to mask it */
|
||||
/* If we are moving the IRQ we need to mask it */
|
||||
if (unlikely(irqd_is_setaffinity_pending(data))) {
|
||||
mask_ioapic_irq(data);
|
||||
if (!irqd_irq_masked(data))
|
||||
mask_ioapic_irq(data);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
@@ -1766,7 +1767,9 @@ static inline void ioapic_irqd_unmask(struct irq_data *data, bool masked)
|
||||
*/
|
||||
if (!io_apic_level_ack_pending(data->chip_data))
|
||||
irq_move_masked_irq(data);
|
||||
unmask_ioapic_irq(data);
|
||||
/* If the IRQ is masked in the core, leave it: */
|
||||
if (!irqd_irq_masked(data))
|
||||
unmask_ioapic_irq(data);
|
||||
}
|
||||
}
|
||||
#else
|
||||
|
@@ -266,10 +266,10 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
|
||||
smca_set_misc_banks_map(bank, cpu);
|
||||
|
||||
/* Return early if this bank was already initialized. */
|
||||
if (smca_banks[bank].hwid)
|
||||
if (smca_banks[bank].hwid && smca_banks[bank].hwid->hwid_mcatype != 0)
|
||||
return;
|
||||
|
||||
if (rdmsr_safe_on_cpu(cpu, MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
|
||||
if (rdmsr_safe(MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
|
||||
pr_warn("Failed to read MCA_IPID for bank %d\n", bank);
|
||||
return;
|
||||
}
|
||||
|
@@ -814,8 +814,8 @@ static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
|
||||
if (quirk_no_way_out)
|
||||
quirk_no_way_out(i, m, regs);
|
||||
|
||||
m->bank = i;
|
||||
if (mce_severity(m, mca_cfg.tolerant, &tmp, true) >= MCE_PANIC_SEVERITY) {
|
||||
m->bank = i;
|
||||
mce_read_aux(m, i);
|
||||
*msg = tmp;
|
||||
return 1;
|
||||
|
@@ -188,7 +188,7 @@ static void therm_throt_process(bool new_event, int event, int level)
|
||||
/* if we just entered the thermal event */
|
||||
if (new_event) {
|
||||
if (event == THERMAL_THROTTLING_EVENT)
|
||||
pr_crit("CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
|
||||
pr_warn("CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
|
||||
this_cpu,
|
||||
level == CORE_LEVEL ? "Core" : "Package",
|
||||
state->count);
|
||||
|
@@ -710,6 +710,8 @@ static struct chipset early_qrk[] __initdata = {
|
||||
*/
|
||||
{ PCI_VENDOR_ID_INTEL, 0x0f00,
|
||||
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
|
||||
{ PCI_VENDOR_ID_INTEL, 0x3e20,
|
||||
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
|
||||
{ PCI_VENDOR_ID_INTEL, 0x3ec4,
|
||||
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
|
||||
{ PCI_VENDOR_ID_BROADCOM, 0x4331,
|
||||
|
@@ -402,7 +402,8 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
|
||||
entry->edx |= F(SPEC_CTRL);
|
||||
if (boot_cpu_has(X86_FEATURE_STIBP))
|
||||
entry->edx |= F(INTEL_STIBP);
|
||||
if (boot_cpu_has(X86_FEATURE_SSBD))
|
||||
if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
|
||||
boot_cpu_has(X86_FEATURE_AMD_SSBD))
|
||||
entry->edx |= F(SPEC_CTRL_SSBD);
|
||||
/*
|
||||
* We emulate ARCH_CAPABILITIES in software even
|
||||
@@ -759,7 +760,8 @@ static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function,
|
||||
entry->ebx |= F(AMD_IBRS);
|
||||
if (boot_cpu_has(X86_FEATURE_STIBP))
|
||||
entry->ebx |= F(AMD_STIBP);
|
||||
if (boot_cpu_has(X86_FEATURE_SSBD))
|
||||
if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
|
||||
boot_cpu_has(X86_FEATURE_AMD_SSBD))
|
||||
entry->ebx |= F(AMD_SSBD);
|
||||
if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
|
||||
entry->ebx |= F(AMD_SSB_NO);
|
||||
|
@@ -333,7 +333,7 @@ AVXcode: 1
|
||||
06: CLTS
|
||||
07: SYSRET (o64)
|
||||
08: INVD
|
||||
09: WBINVD
|
||||
09: WBINVD | WBNOINVD (F3)
|
||||
0a:
|
||||
0b: UD2 (1B)
|
||||
0c:
|
||||
@@ -364,7 +364,7 @@ AVXcode: 1
|
||||
# a ModR/M byte.
|
||||
1a: BNDCL Gv,Ev (F3) | BNDCU Gv,Ev (F2) | BNDMOV Gv,Ev (66) | BNDLDX Gv,Ev
|
||||
1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv
|
||||
1c:
|
||||
1c: Grp20 (1A),(1C)
|
||||
1d:
|
||||
1e:
|
||||
1f: NOP Ev
|
||||
@@ -792,6 +792,8 @@ f3: Grp17 (1A)
|
||||
f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v)
|
||||
f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v)
|
||||
f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v)
|
||||
f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3)
|
||||
f9: MOVDIRI My,Gy
|
||||
EndTable
|
||||
|
||||
Table: 3-byte opcode 2 (0x0f 0x3a)
|
||||
@@ -943,9 +945,9 @@ GrpTable: Grp6
|
||||
EndTable
|
||||
|
||||
GrpTable: Grp7
|
||||
0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B)
|
||||
1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B)
|
||||
2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B)
|
||||
0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) | PCONFIG (101),(11B) | ENCLV (000),(11B)
|
||||
1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) | ENCLS (111),(11B)
|
||||
2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B)
|
||||
3: LIDT Ms
|
||||
4: SMSW Mw/Rv
|
||||
5: rdpkru (110),(11B) | wrpkru (111),(11B)
|
||||
@@ -1020,7 +1022,7 @@ GrpTable: Grp15
|
||||
3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B)
|
||||
4: XSAVE | ptwrite Ey (F3),(11B)
|
||||
5: XRSTOR | lfence (11B)
|
||||
6: XSAVEOPT | clwb (66) | mfence (11B)
|
||||
6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B)
|
||||
7: clflush | clflushopt (66) | sfence (11B)
|
||||
EndTable
|
||||
|
||||
@@ -1051,6 +1053,10 @@ GrpTable: Grp19
|
||||
6: vscatterpf1qps/d Wx (66),(ev)
|
||||
EndTable
|
||||
|
||||
GrpTable: Grp20
|
||||
0: cldemote Mb
|
||||
EndTable
|
||||
|
||||
# AMD's Prefetch Group
|
||||
GrpTable: GrpP
|
||||
0: PREFETCH
|
||||
|
@@ -107,6 +107,8 @@ static inline bool seg_writable(struct desc_struct *d)
|
||||
#define FPU_access_ok(y,z) if ( !access_ok(y,z) ) \
|
||||
math_abort(FPU_info,SIGSEGV)
|
||||
#define FPU_abort math_abort(FPU_info, SIGSEGV)
|
||||
#define FPU_copy_from_user(to, from, n) \
|
||||
do { if (copy_from_user(to, from, n)) FPU_abort; } while (0)
|
||||
|
||||
#undef FPU_IGNORE_CODE_SEGV
|
||||
#ifdef FPU_IGNORE_CODE_SEGV
|
||||
@@ -122,7 +124,7 @@ static inline bool seg_writable(struct desc_struct *d)
|
||||
#define FPU_code_access_ok(z) FPU_access_ok((void __user *)FPU_EIP,z)
|
||||
#endif
|
||||
|
||||
#define FPU_get_user(x,y) get_user((x),(y))
|
||||
#define FPU_put_user(x,y) put_user((x),(y))
|
||||
#define FPU_get_user(x,y) do { if (get_user((x),(y))) FPU_abort; } while (0)
|
||||
#define FPU_put_user(x,y) do { if (put_user((x),(y))) FPU_abort; } while (0)
|
||||
|
||||
#endif
|
||||
|
@@ -85,7 +85,7 @@ int FPU_load_extended(long double __user *s, int stnr)
|
||||
|
||||
RE_ENTRANT_CHECK_OFF;
|
||||
FPU_access_ok(s, 10);
|
||||
__copy_from_user(sti_ptr, s, 10);
|
||||
FPU_copy_from_user(sti_ptr, s, 10);
|
||||
RE_ENTRANT_CHECK_ON;
|
||||
|
||||
return FPU_tagof(sti_ptr);
|
||||
@@ -1126,9 +1126,9 @@ void frstor(fpu_addr_modes addr_modes, u_char __user *data_address)
|
||||
/* Copy all registers in stack order. */
|
||||
RE_ENTRANT_CHECK_OFF;
|
||||
FPU_access_ok(s, 80);
|
||||
__copy_from_user(register_base + offset, s, other);
|
||||
FPU_copy_from_user(register_base + offset, s, other);
|
||||
if (offset)
|
||||
__copy_from_user(register_base, s + other, offset);
|
||||
FPU_copy_from_user(register_base, s + other, offset);
|
||||
RE_ENTRANT_CHECK_ON;
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
|
@@ -643,8 +643,8 @@ void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
|
||||
fixmaps_set++;
|
||||
}
|
||||
|
||||
void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys,
|
||||
pgprot_t flags)
|
||||
void native_set_fixmap(unsigned /* enum fixed_addresses */ idx,
|
||||
phys_addr_t phys, pgprot_t flags)
|
||||
{
|
||||
/* Sanitize 'prot' against any unsupported bits: */
|
||||
pgprot_val(flags) &= __default_kernel_pte_mask;
|
||||
|
@@ -1212,7 +1212,7 @@ static enum hrtimer_restart iocg_waitq_timer_fn(struct hrtimer *timer)
|
||||
return HRTIMER_NORESTART;
|
||||
}
|
||||
|
||||
static void iocg_kick_delay(struct ioc_gq *iocg, struct ioc_now *now, u64 cost)
|
||||
static bool iocg_kick_delay(struct ioc_gq *iocg, struct ioc_now *now, u64 cost)
|
||||
{
|
||||
struct ioc *ioc = iocg->ioc;
|
||||
struct blkcg_gq *blkg = iocg_to_blkg(iocg);
|
||||
@@ -1229,11 +1229,11 @@ static void iocg_kick_delay(struct ioc_gq *iocg, struct ioc_now *now, u64 cost)
|
||||
/* clear or maintain depending on the overage */
|
||||
if (time_before_eq64(vtime, now->vnow)) {
|
||||
blkcg_clear_delay(blkg);
|
||||
return;
|
||||
return false;
|
||||
}
|
||||
if (!atomic_read(&blkg->use_delay) &&
|
||||
time_before_eq64(vtime, now->vnow + vmargin))
|
||||
return;
|
||||
return false;
|
||||
|
||||
/* use delay */
|
||||
if (cost) {
|
||||
@@ -1250,10 +1250,11 @@ static void iocg_kick_delay(struct ioc_gq *iocg, struct ioc_now *now, u64 cost)
|
||||
oexpires = ktime_to_ns(hrtimer_get_softexpires(&iocg->delay_timer));
|
||||
if (hrtimer_is_queued(&iocg->delay_timer) &&
|
||||
abs(oexpires - expires) <= margin_ns / 4)
|
||||
return;
|
||||
return true;
|
||||
|
||||
hrtimer_start_range_ns(&iocg->delay_timer, ns_to_ktime(expires),
|
||||
margin_ns / 4, HRTIMER_MODE_ABS);
|
||||
return true;
|
||||
}
|
||||
|
||||
static enum hrtimer_restart iocg_delay_timer_fn(struct hrtimer *timer)
|
||||
@@ -1739,7 +1740,9 @@ static void ioc_rqos_throttle(struct rq_qos *rqos, struct bio *bio)
|
||||
*/
|
||||
if (bio_issue_as_root_blkg(bio) || fatal_signal_pending(current)) {
|
||||
atomic64_add(abs_cost, &iocg->abs_vdebt);
|
||||
iocg_kick_delay(iocg, &now, cost);
|
||||
if (iocg_kick_delay(iocg, &now, cost))
|
||||
blkcg_schedule_throttle(rqos->q,
|
||||
(bio->bi_opf & REQ_SWAP) == REQ_SWAP);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@@ -309,6 +309,7 @@ config CRYPTO_AEGIS128
|
||||
config CRYPTO_AEGIS128_SIMD
|
||||
bool "Support SIMD acceleration for AEGIS-128"
|
||||
depends on CRYPTO_AEGIS128 && ((ARM || ARM64) && KERNEL_MODE_NEON)
|
||||
depends on !ARM || CC_IS_CLANG || GCC_VERSION >= 40800
|
||||
default y
|
||||
|
||||
config CRYPTO_AEGIS128_AESNI_SSE2
|
||||
|
@@ -93,7 +93,7 @@ obj-$(CONFIG_CRYPTO_AEGIS128) += aegis128.o
|
||||
aegis128-y := aegis128-core.o
|
||||
|
||||
ifeq ($(ARCH),arm)
|
||||
CFLAGS_aegis128-neon-inner.o += -ffreestanding -march=armv7-a -mfloat-abi=softfp
|
||||
CFLAGS_aegis128-neon-inner.o += -ffreestanding -march=armv8-a -mfloat-abi=softfp
|
||||
CFLAGS_aegis128-neon-inner.o += -mfpu=crypto-neon-fp-armv8
|
||||
aegis128-$(CONFIG_CRYPTO_AEGIS128_SIMD) += aegis128-neon.o aegis128-neon-inner.o
|
||||
endif
|
||||
|
@@ -486,6 +486,7 @@ static int tpm_key_encrypt(struct tpm_key *tk,
|
||||
if (ret < 0)
|
||||
goto error_free_tfm;
|
||||
|
||||
ret = -ENOMEM;
|
||||
req = akcipher_request_alloc(tfm, GFP_KERNEL);
|
||||
if (!req)
|
||||
goto error_free_tfm;
|
||||
|
@@ -184,6 +184,7 @@ static int software_key_eds_op(struct kernel_pkey_params *params,
|
||||
if (IS_ERR(tfm))
|
||||
return PTR_ERR(tfm);
|
||||
|
||||
ret = -ENOMEM;
|
||||
req = akcipher_request_alloc(tfm, GFP_KERNEL);
|
||||
if (!req)
|
||||
goto error_free_tfm;
|
||||
|
@@ -78,6 +78,17 @@ static const struct dmi_system_id lid_blacklst[] = {
|
||||
DMI_MATCH(DMI_BIOS_VERSION, "BYT70A.YNCHENG.WIN.007"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/*
|
||||
* Medion Akoya E2215T, notification of the LID device only
|
||||
* happens on close, not on open and _LID always returns closed.
|
||||
*/
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "MEDION"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "E2215T MD60198"),
|
||||
},
|
||||
.driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_OPEN,
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
|
@@ -6708,6 +6708,9 @@ void ata_host_detach(struct ata_host *host)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Ensure ata_port probe has completed */
|
||||
async_synchronize_full();
|
||||
|
||||
for (i = 0; i < host->n_ports; i++)
|
||||
ata_port_detach(host->ports[i]);
|
||||
|
||||
|
@@ -8,7 +8,8 @@ fwdir := $(addprefix $(srctree)/,$(filter-out /%,$(fwdir)))$(filter /%,$(fwdir))
|
||||
obj-y := $(addsuffix .gen.o, $(subst $(quote),,$(CONFIG_EXTRA_FIRMWARE)))
|
||||
|
||||
FWNAME = $(patsubst $(obj)/%.gen.S,%,$@)
|
||||
FWSTR = $(subst /,_,$(subst .,_,$(subst -,_,$(FWNAME))))
|
||||
comma := ,
|
||||
FWSTR = $(subst $(comma),_,$(subst /,_,$(subst .,_,$(subst -,_,$(FWNAME)))))
|
||||
ASM_WORD = $(if $(CONFIG_64BIT),.quad,.long)
|
||||
ASM_ALIGN = $(if $(CONFIG_64BIT),3,2)
|
||||
PROGBITS = $(if $(CONFIG_ARM),%,@)progbits
|
||||
|
@@ -417,18 +417,20 @@ out_free_page:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lo_discard(struct loop_device *lo, struct request *rq, loff_t pos)
|
||||
static int lo_fallocate(struct loop_device *lo, struct request *rq, loff_t pos,
|
||||
int mode)
|
||||
{
|
||||
/*
|
||||
* We use punch hole to reclaim the free space used by the
|
||||
* image a.k.a. discard. However we do not support discard if
|
||||
* encryption is enabled, because it may give an attacker
|
||||
* useful information.
|
||||
* We use fallocate to manipulate the space mappings used by the image
|
||||
* a.k.a. discard/zerorange. However we do not support this if
|
||||
* encryption is enabled, because it may give an attacker useful
|
||||
* information.
|
||||
*/
|
||||
struct file *file = lo->lo_backing_file;
|
||||
int mode = FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE;
|
||||
int ret;
|
||||
|
||||
mode |= FALLOC_FL_KEEP_SIZE;
|
||||
|
||||
if ((!file->f_op->fallocate) || lo->lo_encrypt_key_size) {
|
||||
ret = -EOPNOTSUPP;
|
||||
goto out;
|
||||
@@ -596,9 +598,17 @@ static int do_req_filebacked(struct loop_device *lo, struct request *rq)
|
||||
switch (req_op(rq)) {
|
||||
case REQ_OP_FLUSH:
|
||||
return lo_req_flush(lo, rq);
|
||||
case REQ_OP_DISCARD:
|
||||
case REQ_OP_WRITE_ZEROES:
|
||||
return lo_discard(lo, rq, pos);
|
||||
/*
|
||||
* If the caller doesn't want deallocation, call zeroout to
|
||||
* write zeroes the range. Otherwise, punch them out.
|
||||
*/
|
||||
return lo_fallocate(lo, rq, pos,
|
||||
(rq->cmd_flags & REQ_NOUNMAP) ?
|
||||
FALLOC_FL_ZERO_RANGE :
|
||||
FALLOC_FL_PUNCH_HOLE);
|
||||
case REQ_OP_DISCARD:
|
||||
return lo_fallocate(lo, rq, pos, FALLOC_FL_PUNCH_HOLE);
|
||||
case REQ_OP_WRITE:
|
||||
if (lo->transfer)
|
||||
return lo_write_transfer(lo, rq, pos);
|
||||
|
@@ -1296,10 +1296,10 @@ static int nbd_start_device_ioctl(struct nbd_device *nbd, struct block_device *b
|
||||
mutex_unlock(&nbd->config_lock);
|
||||
ret = wait_event_interruptible(config->recv_wq,
|
||||
atomic_read(&config->recv_threads) == 0);
|
||||
if (ret) {
|
||||
if (ret)
|
||||
sock_shutdown(nbd);
|
||||
flush_workqueue(nbd->recv_workq);
|
||||
}
|
||||
flush_workqueue(nbd->recv_workq);
|
||||
|
||||
mutex_lock(&nbd->config_lock);
|
||||
nbd_bdev_reset(bdev);
|
||||
/* user requested, ignore socket errors */
|
||||
|
@@ -3807,8 +3807,8 @@ static int btusb_probe(struct usb_interface *intf,
|
||||
btusb_check_needs_reset_resume(intf);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_BT_HCIBTUSB_RTL
|
||||
if (id->driver_info & BTUSB_REALTEK) {
|
||||
if (IS_ENABLED(CONFIG_BT_HCIBTUSB_RTL) &&
|
||||
(id->driver_info & BTUSB_REALTEK)) {
|
||||
hdev->setup = btrtl_setup_realtek;
|
||||
hdev->shutdown = btrtl_shutdown_realtek;
|
||||
hdev->cmd_timeout = btusb_rtl_cmd_timeout;
|
||||
@@ -3819,7 +3819,6 @@ static int btusb_probe(struct usb_interface *intf,
|
||||
*/
|
||||
set_bit(BTUSB_WAKEUP_DISABLE, &data->flags);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (id->driver_info & BTUSB_AMP) {
|
||||
/* AMP controllers do not support SCO packets */
|
||||
|
@@ -121,7 +121,8 @@ static int omap3_rom_rng_remove(struct platform_device *pdev)
|
||||
{
|
||||
cancel_delayed_work_sync(&idle_work);
|
||||
hwrng_unregister(&omap3_rom_rng_ops);
|
||||
clk_disable_unprepare(rng_clk);
|
||||
if (!rng_idle)
|
||||
clk_disable_unprepare(rng_clk);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@@ -448,6 +448,8 @@ enum ipmi_stat_indexes {
|
||||
|
||||
#define IPMI_IPMB_NUM_SEQ 64
|
||||
struct ipmi_smi {
|
||||
struct module *owner;
|
||||
|
||||
/* What interface number are we? */
|
||||
int intf_num;
|
||||
|
||||
@@ -1220,6 +1222,11 @@ int ipmi_create_user(unsigned int if_num,
|
||||
if (rv)
|
||||
goto out_kfree;
|
||||
|
||||
if (!try_module_get(intf->owner)) {
|
||||
rv = -ENODEV;
|
||||
goto out_kfree;
|
||||
}
|
||||
|
||||
/* Note that each existing user holds a refcount to the interface. */
|
||||
kref_get(&intf->refcount);
|
||||
|
||||
@@ -1349,6 +1356,7 @@ static void _ipmi_destroy_user(struct ipmi_user *user)
|
||||
}
|
||||
|
||||
kref_put(&intf->refcount, intf_free);
|
||||
module_put(intf->owner);
|
||||
}
|
||||
|
||||
int ipmi_destroy_user(struct ipmi_user *user)
|
||||
@@ -2459,7 +2467,7 @@ static int __get_device_id(struct ipmi_smi *intf, struct bmc_device *bmc)
|
||||
* been recently fetched, this will just use the cached data. Otherwise
|
||||
* it will run a new fetch.
|
||||
*
|
||||
* Except for the first time this is called (in ipmi_register_smi()),
|
||||
* Except for the first time this is called (in ipmi_add_smi()),
|
||||
* this will always return good data;
|
||||
*/
|
||||
static int __bmc_get_device_id(struct ipmi_smi *intf, struct bmc_device *bmc,
|
||||
@@ -3377,10 +3385,11 @@ static void redo_bmc_reg(struct work_struct *work)
|
||||
kref_put(&intf->refcount, intf_free);
|
||||
}
|
||||
|
||||
int ipmi_register_smi(const struct ipmi_smi_handlers *handlers,
|
||||
void *send_info,
|
||||
struct device *si_dev,
|
||||
unsigned char slave_addr)
|
||||
int ipmi_add_smi(struct module *owner,
|
||||
const struct ipmi_smi_handlers *handlers,
|
||||
void *send_info,
|
||||
struct device *si_dev,
|
||||
unsigned char slave_addr)
|
||||
{
|
||||
int i, j;
|
||||
int rv;
|
||||
@@ -3406,7 +3415,7 @@ int ipmi_register_smi(const struct ipmi_smi_handlers *handlers,
|
||||
return rv;
|
||||
}
|
||||
|
||||
|
||||
intf->owner = owner;
|
||||
intf->bmc = &intf->tmp_bmc;
|
||||
INIT_LIST_HEAD(&intf->bmc->intfs);
|
||||
mutex_init(&intf->bmc->dyn_mutex);
|
||||
@@ -3514,7 +3523,7 @@ int ipmi_register_smi(const struct ipmi_smi_handlers *handlers,
|
||||
|
||||
return rv;
|
||||
}
|
||||
EXPORT_SYMBOL(ipmi_register_smi);
|
||||
EXPORT_SYMBOL(ipmi_add_smi);
|
||||
|
||||
static void deliver_smi_err_response(struct ipmi_smi *intf,
|
||||
struct ipmi_smi_msg *msg,
|
||||
|
@@ -61,6 +61,12 @@ static void tpm_dev_async_work(struct work_struct *work)
|
||||
|
||||
mutex_lock(&priv->buffer_mutex);
|
||||
priv->command_enqueued = false;
|
||||
ret = tpm_try_get_ops(priv->chip);
|
||||
if (ret) {
|
||||
priv->response_length = ret;
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = tpm_dev_transmit(priv->chip, priv->space, priv->data_buffer,
|
||||
sizeof(priv->data_buffer));
|
||||
tpm_put_ops(priv->chip);
|
||||
@@ -68,6 +74,7 @@ static void tpm_dev_async_work(struct work_struct *work)
|
||||
priv->response_length = ret;
|
||||
mod_timer(&priv->user_read_timer, jiffies + (120 * HZ));
|
||||
}
|
||||
out:
|
||||
mutex_unlock(&priv->buffer_mutex);
|
||||
wake_up_interruptible(&priv->async_wait);
|
||||
}
|
||||
@@ -204,6 +211,7 @@ ssize_t tpm_common_write(struct file *file, const char __user *buf,
|
||||
if (file->f_flags & O_NONBLOCK) {
|
||||
priv->command_enqueued = true;
|
||||
queue_work(tpm_dev_wq, &priv->async_work);
|
||||
tpm_put_ops(priv->chip);
|
||||
mutex_unlock(&priv->buffer_mutex);
|
||||
return size;
|
||||
}
|
||||
|
@@ -899,13 +899,13 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
|
||||
|
||||
if (wait_startup(chip, 0) != 0) {
|
||||
rc = -ENODEV;
|
||||
goto out_err;
|
||||
goto err_start;
|
||||
}
|
||||
|
||||
/* Take control of the TPM's interrupt hardware and shut it off */
|
||||
rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
|
||||
if (rc < 0)
|
||||
goto out_err;
|
||||
goto err_start;
|
||||
|
||||
intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
|
||||
TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
|
||||
@@ -914,21 +914,21 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
|
||||
|
||||
rc = tpm_chip_start(chip);
|
||||
if (rc)
|
||||
goto out_err;
|
||||
goto err_start;
|
||||
|
||||
rc = tpm2_probe(chip);
|
||||
tpm_chip_stop(chip);
|
||||
if (rc)
|
||||
goto out_err;
|
||||
goto err_probe;
|
||||
|
||||
rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
|
||||
if (rc < 0)
|
||||
goto out_err;
|
||||
goto err_probe;
|
||||
|
||||
priv->manufacturer_id = vendor;
|
||||
|
||||
rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
|
||||
if (rc < 0)
|
||||
goto out_err;
|
||||
goto err_probe;
|
||||
|
||||
dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
|
||||
(chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
|
||||
@@ -937,13 +937,13 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
|
||||
probe = probe_itpm(chip);
|
||||
if (probe < 0) {
|
||||
rc = -ENODEV;
|
||||
goto out_err;
|
||||
goto err_probe;
|
||||
}
|
||||
|
||||
/* Figure out the capabilities */
|
||||
rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
|
||||
if (rc < 0)
|
||||
goto out_err;
|
||||
goto err_probe;
|
||||
|
||||
dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
|
||||
intfcaps);
|
||||
@@ -977,10 +977,9 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
|
||||
if (tpm_get_timeouts(chip)) {
|
||||
dev_err(dev, "Could not get TPM timeouts and durations\n");
|
||||
rc = -ENODEV;
|
||||
goto out_err;
|
||||
goto err_probe;
|
||||
}
|
||||
|
||||
tpm_chip_start(chip);
|
||||
chip->flags |= TPM_CHIP_FLAG_IRQ;
|
||||
if (irq) {
|
||||
tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
|
||||
@@ -991,18 +990,20 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
|
||||
} else {
|
||||
tpm_tis_probe_irq(chip, intmask);
|
||||
}
|
||||
tpm_chip_stop(chip);
|
||||
}
|
||||
|
||||
tpm_chip_stop(chip);
|
||||
|
||||
rc = tpm_chip_register(chip);
|
||||
if (rc)
|
||||
goto out_err;
|
||||
|
||||
if (chip->ops->clk_enable != NULL)
|
||||
chip->ops->clk_enable(chip, false);
|
||||
goto err_start;
|
||||
|
||||
return 0;
|
||||
out_err:
|
||||
|
||||
err_probe:
|
||||
tpm_chip_stop(chip);
|
||||
|
||||
err_start:
|
||||
if ((chip->ops != NULL) && (chip->ops->clk_enable != NULL))
|
||||
chip->ops->clk_enable(chip, false);
|
||||
|
||||
|
@@ -142,6 +142,7 @@ struct clk *imx8m_clk_composite_flags(const char *name,
|
||||
mux->reg = reg;
|
||||
mux->shift = PCG_PCS_SHIFT;
|
||||
mux->mask = PCG_PCS_MASK;
|
||||
mux->lock = &imx_ccm_lock;
|
||||
|
||||
div = kzalloc(sizeof(*div), GFP_KERNEL);
|
||||
if (!div)
|
||||
@@ -161,6 +162,7 @@ struct clk *imx8m_clk_composite_flags(const char *name,
|
||||
gate_hw = &gate->hw;
|
||||
gate->reg = reg;
|
||||
gate->bit_idx = PCG_CGC_SHIFT;
|
||||
gate->lock = &imx_ccm_lock;
|
||||
|
||||
hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
|
||||
mux_hw, &clk_mux_ops, div_hw,
|
||||
|
@@ -40,6 +40,7 @@ static const struct clk_div_table ulp_div_table[] = {
|
||||
{ .val = 5, .div = 16, },
|
||||
{ .val = 6, .div = 32, },
|
||||
{ .val = 7, .div = 64, },
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
static const int pcc2_uart_clk_ids[] __initconst = {
|
||||
|
@@ -153,7 +153,7 @@ static int clk_pll14xx_wait_lock(struct clk_pll14xx *pll)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
return readl_poll_timeout(pll->base, val, val & LOCK_TIMEOUT_US, 0,
|
||||
return readl_poll_timeout(pll->base, val, val & LOCK_STATUS, 0,
|
||||
LOCK_TIMEOUT_US);
|
||||
}
|
||||
|
||||
|
@@ -2651,6 +2651,13 @@ int cpufreq_register_driver(struct cpufreq_driver *driver_data)
|
||||
if (cpufreq_disabled())
|
||||
return -ENODEV;
|
||||
|
||||
/*
|
||||
* The cpufreq core depends heavily on the availability of device
|
||||
* structure, make sure they are available before proceeding further.
|
||||
*/
|
||||
if (!get_cpu_device(0))
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
if (!driver_data || !driver_data->verify || !driver_data->init ||
|
||||
!(driver_data->setpolicy || driver_data->target_index ||
|
||||
driver_data->target) ||
|
||||
|
@@ -25,7 +25,7 @@
|
||||
static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;
|
||||
|
||||
/**
|
||||
* sun50i_cpufreq_get_efuse() - Parse and return efuse value present on SoC
|
||||
* sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
|
||||
* @versions: Set to the value parsed from efuse
|
||||
*
|
||||
* Returns 0 if success.
|
||||
@@ -69,21 +69,16 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
|
||||
return PTR_ERR(speedbin);
|
||||
|
||||
efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
|
||||
switch (efuse_value) {
|
||||
case 0b0001:
|
||||
*versions = 1;
|
||||
break;
|
||||
case 0b0011:
|
||||
*versions = 2;
|
||||
break;
|
||||
default:
|
||||
/*
|
||||
* For other situations, we treat it as bin0.
|
||||
* This vf table can be run for any good cpu.
|
||||
*/
|
||||
|
||||
/*
|
||||
* We treat unexpected efuse values as if the SoC was from
|
||||
* the slowest bin. Expected efuse values are 1-3, slowest
|
||||
* to fastest.
|
||||
*/
|
||||
if (efuse_value >= 1 && efuse_value <= 3)
|
||||
*versions = efuse_value - 1;
|
||||
else
|
||||
*versions = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
kfree(speedbin);
|
||||
return 0;
|
||||
|
@@ -145,7 +145,7 @@ struct atmel_aes_xts_ctx {
|
||||
u32 key2[AES_KEYSIZE_256 / sizeof(u32)];
|
||||
};
|
||||
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
struct atmel_aes_authenc_ctx {
|
||||
struct atmel_aes_base_ctx base;
|
||||
struct atmel_sha_authenc_ctx *auth;
|
||||
@@ -157,7 +157,7 @@ struct atmel_aes_reqctx {
|
||||
u32 lastc[AES_BLOCK_SIZE / sizeof(u32)];
|
||||
};
|
||||
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
struct atmel_aes_authenc_reqctx {
|
||||
struct atmel_aes_reqctx base;
|
||||
|
||||
@@ -486,7 +486,7 @@ static inline bool atmel_aes_is_encrypt(const struct atmel_aes_dev *dd)
|
||||
return (dd->flags & AES_FLAGS_ENCRYPT);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
static void atmel_aes_authenc_complete(struct atmel_aes_dev *dd, int err);
|
||||
#endif
|
||||
|
||||
@@ -515,7 +515,7 @@ static void atmel_aes_set_iv_as_last_ciphertext_block(struct atmel_aes_dev *dd)
|
||||
|
||||
static inline int atmel_aes_complete(struct atmel_aes_dev *dd, int err)
|
||||
{
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
if (dd->ctx->is_aead)
|
||||
atmel_aes_authenc_complete(dd, err);
|
||||
#endif
|
||||
@@ -1980,7 +1980,7 @@ static struct crypto_alg aes_xts_alg = {
|
||||
}
|
||||
};
|
||||
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
/* authenc aead functions */
|
||||
|
||||
static int atmel_aes_authenc_start(struct atmel_aes_dev *dd);
|
||||
@@ -2467,7 +2467,7 @@ static void atmel_aes_unregister_algs(struct atmel_aes_dev *dd)
|
||||
{
|
||||
int i;
|
||||
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
if (dd->caps.has_authenc)
|
||||
for (i = 0; i < ARRAY_SIZE(aes_authenc_algs); i++)
|
||||
crypto_unregister_aead(&aes_authenc_algs[i]);
|
||||
@@ -2514,7 +2514,7 @@ static int atmel_aes_register_algs(struct atmel_aes_dev *dd)
|
||||
goto err_aes_xts_alg;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
if (dd->caps.has_authenc) {
|
||||
for (i = 0; i < ARRAY_SIZE(aes_authenc_algs); i++) {
|
||||
err = crypto_register_aead(&aes_authenc_algs[i]);
|
||||
@@ -2526,7 +2526,7 @@ static int atmel_aes_register_algs(struct atmel_aes_dev *dd)
|
||||
|
||||
return 0;
|
||||
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
/* i = ARRAY_SIZE(aes_authenc_algs); */
|
||||
err_aes_authenc_alg:
|
||||
for (j = 0; j < i; j++)
|
||||
@@ -2716,7 +2716,7 @@ static int atmel_aes_probe(struct platform_device *pdev)
|
||||
|
||||
atmel_aes_get_cap(aes_dd);
|
||||
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
if (aes_dd->caps.has_authenc && !atmel_sha_authenc_is_ready()) {
|
||||
err = -EPROBE_DEFER;
|
||||
goto iclk_unprepare;
|
||||
|
@@ -12,7 +12,7 @@
|
||||
#ifndef __ATMEL_AUTHENC_H__
|
||||
#define __ATMEL_AUTHENC_H__
|
||||
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
|
||||
#include <crypto/authenc.h>
|
||||
#include <crypto/hash.h>
|
||||
|
@@ -2212,7 +2212,7 @@ static struct ahash_alg sha_hmac_algs[] = {
|
||||
},
|
||||
};
|
||||
|
||||
#ifdef CONFIG_CRYPTO_DEV_ATMEL_AUTHENC
|
||||
#if IS_ENABLED(CONFIG_CRYPTO_DEV_ATMEL_AUTHENC)
|
||||
/* authenc functions */
|
||||
|
||||
static int atmel_sha_authenc_init2(struct atmel_sha_dev *dd);
|
||||
|
@@ -1120,6 +1120,8 @@ static int safexcel_request_ring_irq(void *pdev, int irqid,
|
||||
irq_name, irq);
|
||||
return irq;
|
||||
}
|
||||
} else {
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
ret = devm_request_threaded_irq(dev, irq, handler,
|
||||
|
@@ -72,7 +72,8 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct skcipher_request *areq)
|
||||
oi = 0;
|
||||
oo = 0;
|
||||
do {
|
||||
todo = min3(rx_cnt, ileft, (mi.length - oi) / 4);
|
||||
todo = min(rx_cnt, ileft);
|
||||
todo = min_t(size_t, todo, (mi.length - oi) / 4);
|
||||
if (todo) {
|
||||
ileft -= todo;
|
||||
writesl(ss->base + SS_RXFIFO, mi.addr + oi, todo);
|
||||
@@ -87,7 +88,8 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct skcipher_request *areq)
|
||||
rx_cnt = SS_RXFIFO_SPACES(spaces);
|
||||
tx_cnt = SS_TXFIFO_SPACES(spaces);
|
||||
|
||||
todo = min3(tx_cnt, oleft, (mo.length - oo) / 4);
|
||||
todo = min(tx_cnt, oleft);
|
||||
todo = min_t(size_t, todo, (mo.length - oo) / 4);
|
||||
if (todo) {
|
||||
oleft -= todo;
|
||||
readsl(ss->base + SS_TXFIFO, mo.addr + oo, todo);
|
||||
@@ -239,7 +241,8 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq)
|
||||
* todo is the number of consecutive 4byte word that we
|
||||
* can read from current SG
|
||||
*/
|
||||
todo = min3(rx_cnt, ileft / 4, (mi.length - oi) / 4);
|
||||
todo = min(rx_cnt, ileft / 4);
|
||||
todo = min_t(size_t, todo, (mi.length - oi) / 4);
|
||||
if (todo && !ob) {
|
||||
writesl(ss->base + SS_RXFIFO, mi.addr + oi,
|
||||
todo);
|
||||
@@ -253,8 +256,8 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq)
|
||||
* we need to be able to write all buf in one
|
||||
* pass, so it is why we min() with rx_cnt
|
||||
*/
|
||||
todo = min3(rx_cnt * 4 - ob, ileft,
|
||||
mi.length - oi);
|
||||
todo = min(rx_cnt * 4 - ob, ileft);
|
||||
todo = min_t(size_t, todo, mi.length - oi);
|
||||
memcpy(buf + ob, mi.addr + oi, todo);
|
||||
ileft -= todo;
|
||||
oi += todo;
|
||||
@@ -274,7 +277,8 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq)
|
||||
spaces = readl(ss->base + SS_FCSR);
|
||||
rx_cnt = SS_RXFIFO_SPACES(spaces);
|
||||
tx_cnt = SS_TXFIFO_SPACES(spaces);
|
||||
dev_dbg(ss->dev, "%x %u/%u %u/%u cnt=%u %u/%u %u/%u cnt=%u %u\n",
|
||||
dev_dbg(ss->dev,
|
||||
"%x %u/%zu %u/%u cnt=%u %u/%zu %u/%u cnt=%u %u\n",
|
||||
mode,
|
||||
oi, mi.length, ileft, areq->cryptlen, rx_cnt,
|
||||
oo, mo.length, oleft, areq->cryptlen, tx_cnt, ob);
|
||||
@@ -282,7 +286,8 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq)
|
||||
if (!tx_cnt)
|
||||
continue;
|
||||
/* todo in 4bytes word */
|
||||
todo = min3(tx_cnt, oleft / 4, (mo.length - oo) / 4);
|
||||
todo = min(tx_cnt, oleft / 4);
|
||||
todo = min_t(size_t, todo, (mo.length - oo) / 4);
|
||||
if (todo) {
|
||||
readsl(ss->base + SS_TXFIFO, mo.addr + oo, todo);
|
||||
oleft -= todo * 4;
|
||||
@@ -308,7 +313,8 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq)
|
||||
* no more than remaining buffer
|
||||
* no need to test against oleft
|
||||
*/
|
||||
todo = min(mo.length - oo, obl - obo);
|
||||
todo = min_t(size_t,
|
||||
mo.length - oo, obl - obo);
|
||||
memcpy(mo.addr + oo, bufo + obo, todo);
|
||||
oleft -= todo;
|
||||
obo += todo;
|
||||
|
@@ -272,8 +272,8 @@ static int sun4i_hash(struct ahash_request *areq)
|
||||
*/
|
||||
while (op->len < 64 && i < end) {
|
||||
/* how many bytes we can read from current SG */
|
||||
in_r = min3(mi.length - in_i, end - i,
|
||||
64 - op->len);
|
||||
in_r = min(end - i, 64 - op->len);
|
||||
in_r = min_t(size_t, mi.length - in_i, in_r);
|
||||
memcpy(op->buf + op->len, mi.addr + in_i, in_r);
|
||||
op->len += in_r;
|
||||
i += in_r;
|
||||
@@ -293,8 +293,8 @@ static int sun4i_hash(struct ahash_request *areq)
|
||||
}
|
||||
if (mi.length - in_i > 3 && i < end) {
|
||||
/* how many bytes we can read from current SG */
|
||||
in_r = min3(mi.length - in_i, areq->nbytes - i,
|
||||
((mi.length - in_i) / 4) * 4);
|
||||
in_r = min_t(size_t, mi.length - in_i, areq->nbytes - i);
|
||||
in_r = min_t(size_t, ((mi.length - in_i) / 4) * 4, in_r);
|
||||
/* how many bytes we can write in the device*/
|
||||
todo = min3((u32)(end - i) / 4, rx_cnt, (u32)in_r / 4);
|
||||
writesl(ss->base + SS_RXFIFO, mi.addr + in_i, todo);
|
||||
@@ -320,8 +320,8 @@ static int sun4i_hash(struct ahash_request *areq)
|
||||
if ((areq->nbytes - i) < 64) {
|
||||
while (i < areq->nbytes && in_i < mi.length && op->len < 64) {
|
||||
/* how many bytes we can read from current SG */
|
||||
in_r = min3(mi.length - in_i, areq->nbytes - i,
|
||||
64 - op->len);
|
||||
in_r = min(areq->nbytes - i, 64 - op->len);
|
||||
in_r = min_t(size_t, mi.length - in_i, in_r);
|
||||
memcpy(op->buf + op->len, mi.addr + in_i, in_r);
|
||||
op->len += in_r;
|
||||
i += in_r;
|
||||
|
@@ -105,8 +105,6 @@ virtio_crypto_alg_validate_key(int key_len, uint32_t *alg)
|
||||
*alg = VIRTIO_CRYPTO_CIPHER_AES_CBC;
|
||||
break;
|
||||
default:
|
||||
pr_err("virtio_crypto: Unsupported key length: %d\n",
|
||||
key_len);
|
||||
return -EINVAL;
|
||||
}
|
||||
return 0;
|
||||
@@ -484,6 +482,11 @@ static int virtio_crypto_ablkcipher_encrypt(struct ablkcipher_request *req)
|
||||
/* Use the first data virtqueue as default */
|
||||
struct data_queue *data_vq = &vcrypto->data_vq[0];
|
||||
|
||||
if (!req->nbytes)
|
||||
return 0;
|
||||
if (req->nbytes % AES_BLOCK_SIZE)
|
||||
return -EINVAL;
|
||||
|
||||
vc_req->dataq = data_vq;
|
||||
vc_req->alg_cb = virtio_crypto_dataq_sym_callback;
|
||||
vc_sym_req->ablkcipher_ctx = ctx;
|
||||
@@ -504,6 +507,11 @@ static int virtio_crypto_ablkcipher_decrypt(struct ablkcipher_request *req)
|
||||
/* Use the first data virtqueue as default */
|
||||
struct data_queue *data_vq = &vcrypto->data_vq[0];
|
||||
|
||||
if (!req->nbytes)
|
||||
return 0;
|
||||
if (req->nbytes % AES_BLOCK_SIZE)
|
||||
return -EINVAL;
|
||||
|
||||
vc_req->dataq = data_vq;
|
||||
vc_req->alg_cb = virtio_crypto_dataq_sym_callback;
|
||||
vc_sym_req->ablkcipher_ctx = ctx;
|
||||
|
@@ -3,13 +3,13 @@ obj-$(CONFIG_CRYPTO_DEV_VMX_ENCRYPT) += vmx-crypto.o
|
||||
vmx-crypto-objs := vmx.o aesp8-ppc.o ghashp8-ppc.o aes.o aes_cbc.o aes_ctr.o aes_xts.o ghash.o
|
||||
|
||||
ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)
|
||||
TARGET := linux-ppc64le
|
||||
override flavour := linux-ppc64le
|
||||
else
|
||||
TARGET := linux-ppc64
|
||||
override flavour := linux-ppc64
|
||||
endif
|
||||
|
||||
quiet_cmd_perl = PERL $@
|
||||
cmd_perl = $(PERL) $(<) $(TARGET) > $(@)
|
||||
cmd_perl = $(PERL) $(<) $(flavour) > $(@)
|
||||
|
||||
targets += aesp8-ppc.S ghashp8-ppc.S
|
||||
|
||||
|
@@ -2936,6 +2936,7 @@ static int init_csrows_df(struct mem_ctl_info *mci)
|
||||
dimm->mtype = pvt->dram_type;
|
||||
dimm->edac_mode = edac_mode;
|
||||
dimm->dtype = dev_type;
|
||||
dimm->grain = 64;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -3012,6 +3013,7 @@ static int init_csrows(struct mem_ctl_info *mci)
|
||||
dimm = csrow->channels[j]->dimm;
|
||||
dimm->mtype = pvt->dram_type;
|
||||
dimm->edac_mode = edac_mode;
|
||||
dimm->grain = 64;
|
||||
}
|
||||
}
|
||||
|
||||
|
@@ -231,6 +231,7 @@ void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
|
||||
/* Cleans the error report buffer */
|
||||
memset(e, 0, sizeof (*e));
|
||||
e->error_count = 1;
|
||||
e->grain = 1;
|
||||
strcpy(e->label, "unknown label");
|
||||
e->msg = pvt->msg;
|
||||
e->other_detail = pvt->other_detail;
|
||||
@@ -326,7 +327,7 @@ void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
|
||||
|
||||
/* Error grain */
|
||||
if (mem_err->validation_bits & CPER_MEM_VALID_PA_MASK)
|
||||
e->grain = ~(mem_err->physical_addr_mask & ~PAGE_MASK);
|
||||
e->grain = ~mem_err->physical_addr_mask + 1;
|
||||
|
||||
/* Memory error location, mapped on e->location */
|
||||
p = e->location;
|
||||
@@ -442,8 +443,13 @@ void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
|
||||
if (p > pvt->other_detail)
|
||||
*(p - 1) = '\0';
|
||||
|
||||
/* Sanity-check driver-supplied grain value. */
|
||||
if (WARN_ON_ONCE(!e->grain))
|
||||
e->grain = 1;
|
||||
|
||||
grain_bits = fls_long(e->grain - 1);
|
||||
|
||||
/* Generate the trace event */
|
||||
grain_bits = fls_long(e->grain);
|
||||
snprintf(pvt->detail_location, sizeof(pvt->detail_location),
|
||||
"APEI location: %s %s", e->location, e->other_detail);
|
||||
trace_mc_event(type, e->msg, e->label, e->error_count,
|
||||
|
@@ -65,6 +65,10 @@ struct sm5502_muic_info {
|
||||
/* Default value of SM5502 register to bring up MUIC device. */
|
||||
static struct reg_data sm5502_reg_data[] = {
|
||||
{
|
||||
.reg = SM5502_REG_RESET,
|
||||
.val = SM5502_REG_RESET_MASK,
|
||||
.invert = true,
|
||||
}, {
|
||||
.reg = SM5502_REG_CONTROL,
|
||||
.val = SM5502_REG_CONTROL_MASK_INT_MASK,
|
||||
.invert = false,
|
||||
|
@@ -237,6 +237,8 @@ enum sm5502_reg {
|
||||
#define DM_DP_SWITCH_UART ((DM_DP_CON_SWITCH_UART <<SM5502_REG_MANUAL_SW1_DP_SHIFT) \
|
||||
| (DM_DP_CON_SWITCH_UART <<SM5502_REG_MANUAL_SW1_DM_SHIFT))
|
||||
|
||||
#define SM5502_REG_RESET_MASK (0x1)
|
||||
|
||||
/* SM5502 Interrupts */
|
||||
enum sm5502_irq {
|
||||
/* INT1 */
|
||||
|
@@ -970,6 +970,24 @@ static int __init efi_memreserve_map_root(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int efi_mem_reserve_iomem(phys_addr_t addr, u64 size)
|
||||
{
|
||||
struct resource *res, *parent;
|
||||
|
||||
res = kzalloc(sizeof(struct resource), GFP_ATOMIC);
|
||||
if (!res)
|
||||
return -ENOMEM;
|
||||
|
||||
res->name = "reserved";
|
||||
res->flags = IORESOURCE_MEM;
|
||||
res->start = addr;
|
||||
res->end = addr + size - 1;
|
||||
|
||||
/* we expect a conflict with a 'System RAM' region */
|
||||
parent = request_resource_conflict(&iomem_resource, res);
|
||||
return parent ? request_resource(parent, res) : 0;
|
||||
}
|
||||
|
||||
int __ref efi_mem_reserve_persistent(phys_addr_t addr, u64 size)
|
||||
{
|
||||
struct linux_efi_memreserve *rsv;
|
||||
@@ -994,7 +1012,7 @@ int __ref efi_mem_reserve_persistent(phys_addr_t addr, u64 size)
|
||||
rsv->entry[index].size = size;
|
||||
|
||||
memunmap(rsv);
|
||||
return 0;
|
||||
return efi_mem_reserve_iomem(addr, size);
|
||||
}
|
||||
memunmap(rsv);
|
||||
}
|
||||
@@ -1004,6 +1022,12 @@ int __ref efi_mem_reserve_persistent(phys_addr_t addr, u64 size)
|
||||
if (!rsv)
|
||||
return -ENOMEM;
|
||||
|
||||
rc = efi_mem_reserve_iomem(__pa(rsv), SZ_4K);
|
||||
if (rc) {
|
||||
free_page((unsigned long)rsv);
|
||||
return rc;
|
||||
}
|
||||
|
||||
/*
|
||||
* The memremap() call above assumes that a linux_efi_memreserve entry
|
||||
* never crosses a page boundary, so let's ensure that this remains true
|
||||
@@ -1020,7 +1044,7 @@ int __ref efi_mem_reserve_persistent(phys_addr_t addr, u64 size)
|
||||
efi_memreserve_root->next = __pa(rsv);
|
||||
spin_unlock(&efi_mem_reserve_persistent_lock);
|
||||
|
||||
return 0;
|
||||
return efi_mem_reserve_iomem(addr, size);
|
||||
}
|
||||
|
||||
static int __init efi_memreserve_root_init(void)
|
||||
|
@@ -544,6 +544,31 @@ static int fsi_slave_scan(struct fsi_slave *slave)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned long aligned_access_size(size_t offset, size_t count)
|
||||
{
|
||||
unsigned long offset_unit, count_unit;
|
||||
|
||||
/* Criteria:
|
||||
*
|
||||
* 1. Access size must be less than or equal to the maximum access
|
||||
* width or the highest power-of-two factor of offset
|
||||
* 2. Access size must be less than or equal to the amount specified by
|
||||
* count
|
||||
*
|
||||
* The access width is optimal if we can calculate 1 to be strictly
|
||||
* equal while still satisfying 2.
|
||||
*/
|
||||
|
||||
/* Find 1 by the bottom bit of offset (with a 4 byte access cap) */
|
||||
offset_unit = BIT(__builtin_ctzl(offset | 4));
|
||||
|
||||
/* Find 2 by the top bit of count */
|
||||
count_unit = BIT(8 * sizeof(unsigned long) - 1 - __builtin_clzl(count));
|
||||
|
||||
/* Constrain the maximum access width to the minimum of both criteria */
|
||||
return BIT(__builtin_ctzl(offset_unit | count_unit));
|
||||
}
|
||||
|
||||
static ssize_t fsi_slave_sysfs_raw_read(struct file *file,
|
||||
struct kobject *kobj, struct bin_attribute *attr, char *buf,
|
||||
loff_t off, size_t count)
|
||||
@@ -559,8 +584,7 @@ static ssize_t fsi_slave_sysfs_raw_read(struct file *file,
|
||||
return -EINVAL;
|
||||
|
||||
for (total_len = 0; total_len < count; total_len += read_len) {
|
||||
read_len = min_t(size_t, count, 4);
|
||||
read_len -= off & 0x3;
|
||||
read_len = aligned_access_size(off, count - total_len);
|
||||
|
||||
rc = fsi_slave_read(slave, off, buf + total_len, read_len);
|
||||
if (rc)
|
||||
@@ -587,8 +611,7 @@ static ssize_t fsi_slave_sysfs_raw_write(struct file *file,
|
||||
return -EINVAL;
|
||||
|
||||
for (total_len = 0; total_len < count; total_len += write_len) {
|
||||
write_len = min_t(size_t, count, 4);
|
||||
write_len -= off & 0x3;
|
||||
write_len = aligned_access_size(off, count - total_len);
|
||||
|
||||
rc = fsi_slave_write(slave, off, buf + total_len, write_len);
|
||||
if (rc)
|
||||
|
@@ -859,6 +859,9 @@ static int amdgpu_debugfs_test_ib(struct seq_file *m, void *data)
|
||||
struct amdgpu_device *adev = dev->dev_private;
|
||||
int r = 0, i;
|
||||
|
||||
/* Avoid accidently unparking the sched thread during GPU reset */
|
||||
mutex_lock(&adev->lock_reset);
|
||||
|
||||
/* hold on the scheduler */
|
||||
for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
|
||||
struct amdgpu_ring *ring = adev->rings[i];
|
||||
@@ -884,6 +887,8 @@ static int amdgpu_debugfs_test_ib(struct seq_file *m, void *data)
|
||||
kthread_unpark(ring->sched.thread);
|
||||
}
|
||||
|
||||
mutex_unlock(&adev->lock_reset);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1036,6 +1041,9 @@ static int amdgpu_debugfs_ib_preempt(void *data, u64 val)
|
||||
if (!fences)
|
||||
return -ENOMEM;
|
||||
|
||||
/* Avoid accidently unparking the sched thread during GPU reset */
|
||||
mutex_lock(&adev->lock_reset);
|
||||
|
||||
/* stop the scheduler */
|
||||
kthread_park(ring->sched.thread);
|
||||
|
||||
@@ -1075,6 +1083,8 @@ failure:
|
||||
/* restart the scheduler */
|
||||
kthread_unpark(ring->sched.thread);
|
||||
|
||||
mutex_unlock(&adev->lock_reset);
|
||||
|
||||
ttm_bo_unlock_delayed_workqueue(&adev->mman.bdev, resched);
|
||||
|
||||
if (fences)
|
||||
|
@@ -138,6 +138,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
|
||||
}
|
||||
|
||||
dma_fence_put(fence);
|
||||
fence = NULL;
|
||||
|
||||
r = amdgpu_bo_kmap(vram_obj, &vram_map);
|
||||
if (r) {
|
||||
@@ -183,6 +184,7 @@ static void amdgpu_do_test_moves(struct amdgpu_device *adev)
|
||||
}
|
||||
|
||||
dma_fence_put(fence);
|
||||
fence = NULL;
|
||||
|
||||
r = amdgpu_bo_kmap(gtt_obj[i], >t_map);
|
||||
if (r) {
|
||||
|
@@ -170,7 +170,7 @@ TRACE_EVENT(amdgpu_cs_ioctl,
|
||||
__field(unsigned int, context)
|
||||
__field(unsigned int, seqno)
|
||||
__field(struct dma_fence *, fence)
|
||||
__field(char *, ring_name)
|
||||
__string(ring, to_amdgpu_ring(job->base.sched)->name)
|
||||
__field(u32, num_ibs)
|
||||
),
|
||||
|
||||
@@ -179,12 +179,12 @@ TRACE_EVENT(amdgpu_cs_ioctl,
|
||||
__assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
|
||||
__entry->context = job->base.s_fence->finished.context;
|
||||
__entry->seqno = job->base.s_fence->finished.seqno;
|
||||
__entry->ring_name = to_amdgpu_ring(job->base.sched)->name;
|
||||
__assign_str(ring, to_amdgpu_ring(job->base.sched)->name)
|
||||
__entry->num_ibs = job->num_ibs;
|
||||
),
|
||||
TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
|
||||
__entry->sched_job_id, __get_str(timeline), __entry->context,
|
||||
__entry->seqno, __entry->ring_name, __entry->num_ibs)
|
||||
__entry->seqno, __get_str(ring), __entry->num_ibs)
|
||||
);
|
||||
|
||||
TRACE_EVENT(amdgpu_sched_run_job,
|
||||
@@ -195,7 +195,7 @@ TRACE_EVENT(amdgpu_sched_run_job,
|
||||
__string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
|
||||
__field(unsigned int, context)
|
||||
__field(unsigned int, seqno)
|
||||
__field(char *, ring_name)
|
||||
__string(ring, to_amdgpu_ring(job->base.sched)->name)
|
||||
__field(u32, num_ibs)
|
||||
),
|
||||
|
||||
@@ -204,12 +204,12 @@ TRACE_EVENT(amdgpu_sched_run_job,
|
||||
__assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
|
||||
__entry->context = job->base.s_fence->finished.context;
|
||||
__entry->seqno = job->base.s_fence->finished.seqno;
|
||||
__entry->ring_name = to_amdgpu_ring(job->base.sched)->name;
|
||||
__assign_str(ring, to_amdgpu_ring(job->base.sched)->name)
|
||||
__entry->num_ibs = job->num_ibs;
|
||||
),
|
||||
TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
|
||||
__entry->sched_job_id, __get_str(timeline), __entry->context,
|
||||
__entry->seqno, __entry->ring_name, __entry->num_ibs)
|
||||
__entry->seqno, __get_str(ring), __entry->num_ibs)
|
||||
);
|
||||
|
||||
|
||||
@@ -468,7 +468,7 @@ TRACE_EVENT(amdgpu_ib_pipe_sync,
|
||||
TP_PROTO(struct amdgpu_job *sched_job, struct dma_fence *fence),
|
||||
TP_ARGS(sched_job, fence),
|
||||
TP_STRUCT__entry(
|
||||
__field(const char *,name)
|
||||
__string(ring, sched_job->base.sched->name);
|
||||
__field(uint64_t, id)
|
||||
__field(struct dma_fence *, fence)
|
||||
__field(uint64_t, ctx)
|
||||
@@ -476,14 +476,14 @@ TRACE_EVENT(amdgpu_ib_pipe_sync,
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__entry->name = sched_job->base.sched->name;
|
||||
__assign_str(ring, sched_job->base.sched->name)
|
||||
__entry->id = sched_job->base.id;
|
||||
__entry->fence = fence;
|
||||
__entry->ctx = fence->context;
|
||||
__entry->seqno = fence->seqno;
|
||||
),
|
||||
TP_printk("job ring=%s, id=%llu, need pipe sync to fence=%p, context=%llu, seq=%u",
|
||||
__entry->name, __entry->id,
|
||||
__get_str(ring), __entry->id,
|
||||
__entry->fence, __entry->ctx,
|
||||
__entry->seqno)
|
||||
);
|
||||
|
@@ -1034,10 +1034,8 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job, bool need_
|
||||
id->oa_base != job->oa_base ||
|
||||
id->oa_size != job->oa_size);
|
||||
bool vm_flush_needed = job->vm_needs_flush;
|
||||
bool pasid_mapping_needed = id->pasid != job->pasid ||
|
||||
!id->pasid_mapping ||
|
||||
!dma_fence_is_signaled(id->pasid_mapping);
|
||||
struct dma_fence *fence = NULL;
|
||||
bool pasid_mapping_needed = false;
|
||||
unsigned patch_offset = 0;
|
||||
int r;
|
||||
|
||||
@@ -1047,6 +1045,12 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job, bool need_
|
||||
pasid_mapping_needed = true;
|
||||
}
|
||||
|
||||
mutex_lock(&id_mgr->lock);
|
||||
if (id->pasid != job->pasid || !id->pasid_mapping ||
|
||||
!dma_fence_is_signaled(id->pasid_mapping))
|
||||
pasid_mapping_needed = true;
|
||||
mutex_unlock(&id_mgr->lock);
|
||||
|
||||
gds_switch_needed &= !!ring->funcs->emit_gds_switch;
|
||||
vm_flush_needed &= !!ring->funcs->emit_vm_flush &&
|
||||
job->vm_pd_addr != AMDGPU_BO_INVALID_OFFSET;
|
||||
@@ -1086,9 +1090,11 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job, bool need_
|
||||
}
|
||||
|
||||
if (pasid_mapping_needed) {
|
||||
mutex_lock(&id_mgr->lock);
|
||||
id->pasid = job->pasid;
|
||||
dma_fence_put(id->pasid_mapping);
|
||||
id->pasid_mapping = dma_fence_get(fence);
|
||||
mutex_unlock(&id_mgr->lock);
|
||||
}
|
||||
dma_fence_put(fence);
|
||||
|
||||
|
@@ -2930,7 +2930,8 @@ static void gfx_v9_0_init_pg(struct amdgpu_device *adev)
|
||||
* And it's needed by gfxoff feature.
|
||||
*/
|
||||
if (adev->gfx.rlc.is_rlc_v2_1) {
|
||||
gfx_v9_1_init_rlc_save_restore_list(adev);
|
||||
if (adev->asic_type == CHIP_VEGA12)
|
||||
gfx_v9_1_init_rlc_save_restore_list(adev);
|
||||
gfx_v9_0_enable_save_restore_machine(adev);
|
||||
}
|
||||
|
||||
|
@@ -398,6 +398,34 @@ static bool psp_v11_0_support_vmr_ring(struct psp_context *psp)
|
||||
return false;
|
||||
}
|
||||
|
||||
static int psp_v11_0_ring_stop(struct psp_context *psp,
|
||||
enum psp_ring_type ring_type)
|
||||
{
|
||||
int ret = 0;
|
||||
struct amdgpu_device *adev = psp->adev;
|
||||
|
||||
/* Write the ring destroy command*/
|
||||
if (psp_v11_0_support_vmr_ring(psp))
|
||||
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,
|
||||
GFX_CTRL_CMD_ID_DESTROY_GPCOM_RING);
|
||||
else
|
||||
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,
|
||||
GFX_CTRL_CMD_ID_DESTROY_RINGS);
|
||||
|
||||
/* there might be handshake issue with hardware which needs delay */
|
||||
mdelay(20);
|
||||
|
||||
/* Wait for response flag (bit 31) */
|
||||
if (psp_v11_0_support_vmr_ring(psp))
|
||||
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101),
|
||||
0x80000000, 0x80000000, false);
|
||||
else
|
||||
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
|
||||
0x80000000, 0x80000000, false);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int psp_v11_0_ring_create(struct psp_context *psp,
|
||||
enum psp_ring_type ring_type)
|
||||
{
|
||||
@@ -407,6 +435,12 @@ static int psp_v11_0_ring_create(struct psp_context *psp,
|
||||
struct amdgpu_device *adev = psp->adev;
|
||||
|
||||
if (psp_v11_0_support_vmr_ring(psp)) {
|
||||
ret = psp_v11_0_ring_stop(psp, ring_type);
|
||||
if (ret) {
|
||||
DRM_ERROR("psp_v11_0_ring_stop_sriov failed!\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Write low address of the ring to C2PMSG_102 */
|
||||
psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr);
|
||||
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg);
|
||||
@@ -451,33 +485,6 @@ static int psp_v11_0_ring_create(struct psp_context *psp,
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int psp_v11_0_ring_stop(struct psp_context *psp,
|
||||
enum psp_ring_type ring_type)
|
||||
{
|
||||
int ret = 0;
|
||||
struct amdgpu_device *adev = psp->adev;
|
||||
|
||||
/* Write the ring destroy command*/
|
||||
if (psp_v11_0_support_vmr_ring(psp))
|
||||
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,
|
||||
GFX_CTRL_CMD_ID_DESTROY_GPCOM_RING);
|
||||
else
|
||||
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,
|
||||
GFX_CTRL_CMD_ID_DESTROY_RINGS);
|
||||
|
||||
/* there might be handshake issue with hardware which needs delay */
|
||||
mdelay(20);
|
||||
|
||||
/* Wait for response flag (bit 31) */
|
||||
if (psp_v11_0_support_vmr_ring(psp))
|
||||
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101),
|
||||
0x80000000, 0x80000000, false);
|
||||
else
|
||||
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
|
||||
0x80000000, 0x80000000, false);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int psp_v11_0_ring_destroy(struct psp_context *psp,
|
||||
enum psp_ring_type ring_type)
|
||||
|
@@ -64,7 +64,8 @@ static int si_ih_irq_init(struct amdgpu_device *adev)
|
||||
u32 interrupt_cntl, ih_cntl, ih_rb_cntl;
|
||||
|
||||
si_ih_disable_interrupts(adev);
|
||||
WREG32(INTERRUPT_CNTL2, adev->irq.ih.gpu_addr >> 8);
|
||||
/* set dummy read address to dummy page address */
|
||||
WREG32(INTERRUPT_CNTL2, adev->dummy_page_addr >> 8);
|
||||
interrupt_cntl = RREG32(INTERRUPT_CNTL);
|
||||
interrupt_cntl &= ~IH_DUMMY_RD_OVERRIDE;
|
||||
interrupt_cntl &= ~IH_REQ_NONSNOOP_EN;
|
||||
|
@@ -1676,7 +1676,8 @@ static int allocate_hiq_sdma_mqd(struct device_queue_manager *dqm)
|
||||
struct kfd_dev *dev = dqm->dev;
|
||||
struct kfd_mem_obj *mem_obj = &dqm->hiq_sdma_mqd;
|
||||
uint32_t size = dqm->mqd_mgrs[KFD_MQD_TYPE_SDMA]->mqd_size *
|
||||
dev->device_info->num_sdma_engines *
|
||||
(dev->device_info->num_sdma_engines +
|
||||
dev->device_info->num_xgmi_sdma_engines) *
|
||||
dev->device_info->num_sdma_queues_per_engine +
|
||||
dqm->mqd_mgrs[KFD_MQD_TYPE_HIQ]->mqd_size;
|
||||
|
||||
|
@@ -62,6 +62,11 @@ int kfd_interrupt_init(struct kfd_dev *kfd)
|
||||
}
|
||||
|
||||
kfd->ih_wq = alloc_workqueue("KFD IH", WQ_HIGHPRI, 1);
|
||||
if (unlikely(!kfd->ih_wq)) {
|
||||
kfifo_free(&kfd->ih_fifo);
|
||||
dev_err(kfd_chardev(), "Failed to allocate KFD IH workqueue\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
spin_lock_init(&kfd->interrupt_lock);
|
||||
|
||||
INIT_WORK(&kfd->interrupt_work, interrupt_wq);
|
||||
|
@@ -940,6 +940,11 @@ static int dm_late_init(void *handle)
|
||||
params.backlight_lut_array_size = 16;
|
||||
params.backlight_lut_array = linear_lut;
|
||||
|
||||
/* Min backlight level after ABM reduction, Don't allow below 1%
|
||||
* 0xFFFF x 0.01 = 0x28F
|
||||
*/
|
||||
params.min_abm_backlight = 0x28F;
|
||||
|
||||
/* todo will enable for navi10 */
|
||||
if (adev->asic_type <= CHIP_RAVEN) {
|
||||
ret = dmcu_load_iram(dmcu, params);
|
||||
|
@@ -320,6 +320,8 @@ void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr,
|
||||
struct dc_state *context,
|
||||
bool safe_to_lower)
|
||||
{
|
||||
struct clk_mgr_internal *clk_mgr_int = TO_CLK_MGR_INTERNAL(clk_mgr);
|
||||
|
||||
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
|
||||
/* Min fclk = 1.2GHz since all the extra scemi logic seems to run off of it */
|
||||
int fclk_adj = new_clocks->fclk_khz > 1200000 ? new_clocks->fclk_khz : 1200000;
|
||||
@@ -357,14 +359,18 @@ void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr,
|
||||
clk_mgr->clks.dispclk_khz = new_clocks->dispclk_khz;
|
||||
}
|
||||
|
||||
/* Both fclk and dppclk ref are run on the same scemi clock so we
|
||||
* need to keep the same value for both
|
||||
/* Both fclk and ref_dppclk run on the same scemi clock.
|
||||
* So take the higher value since the DPP DTO is typically programmed
|
||||
* such that max dppclk is 1:1 with ref_dppclk.
|
||||
*/
|
||||
if (clk_mgr->clks.fclk_khz > clk_mgr->clks.dppclk_khz)
|
||||
clk_mgr->clks.dppclk_khz = clk_mgr->clks.fclk_khz;
|
||||
if (clk_mgr->clks.dppclk_khz > clk_mgr->clks.fclk_khz)
|
||||
clk_mgr->clks.fclk_khz = clk_mgr->clks.dppclk_khz;
|
||||
|
||||
// Both fclk and ref_dppclk run on the same scemi clock.
|
||||
clk_mgr_int->dccg->ref_dppclk = clk_mgr->clks.fclk_khz;
|
||||
|
||||
dm_set_dcn_clocks(clk_mgr->ctx, &clk_mgr->clks);
|
||||
}
|
||||
|
||||
|
@@ -33,7 +33,7 @@
|
||||
#include "mp/mp_12_0_0_sh_mask.h"
|
||||
|
||||
#define REG(reg_name) \
|
||||
(MP1_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
|
||||
(MP0_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
|
||||
|
||||
#define FN(reg_name, field) \
|
||||
FD(reg_name##__##field)
|
||||
|
@@ -2169,8 +2169,10 @@ static void disable_link(struct dc_link *link, enum signal_type signal)
|
||||
dp_set_fec_ready(link, false);
|
||||
}
|
||||
#endif
|
||||
} else
|
||||
link->link_enc->funcs->disable_output(link->link_enc, signal);
|
||||
} else {
|
||||
if (signal != SIGNAL_TYPE_VIRTUAL)
|
||||
link->link_enc->funcs->disable_output(link->link_enc, signal);
|
||||
}
|
||||
|
||||
if (signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
|
||||
/* MST disable link only when no stream use the link */
|
||||
@@ -2217,7 +2219,7 @@ static bool dp_active_dongle_validate_timing(
|
||||
break;
|
||||
}
|
||||
|
||||
if (dongle_caps->dongle_type != DISPLAY_DONGLE_DP_HDMI_CONVERTER ||
|
||||
if (dpcd_caps->dongle_type != DISPLAY_DONGLE_DP_HDMI_CONVERTER ||
|
||||
dongle_caps->extendedCapValid == false)
|
||||
return true;
|
||||
|
||||
@@ -2767,6 +2769,15 @@ void core_link_enable_stream(
|
||||
CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
|
||||
COLOR_DEPTH_UNDEFINED);
|
||||
|
||||
/* This second call is needed to reconfigure the DIG
|
||||
* as a workaround for the incorrect value being applied
|
||||
* from transmitter control.
|
||||
*/
|
||||
if (!dc_is_virtual_signal(pipe_ctx->stream->signal))
|
||||
stream->link->link_enc->funcs->setup(
|
||||
stream->link->link_enc,
|
||||
pipe_ctx->stream->signal);
|
||||
|
||||
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
|
||||
if (pipe_ctx->stream->timing.flags.DSC) {
|
||||
if (dc_is_dp_signal(pipe_ctx->stream->signal) ||
|
||||
|
@@ -2545,6 +2545,7 @@ static void get_active_converter_info(
|
||||
uint8_t data, struct dc_link *link)
|
||||
{
|
||||
union dp_downstream_port_present ds_port = { .byte = data };
|
||||
memset(&link->dpcd_caps.dongle_caps, 0, sizeof(link->dpcd_caps.dongle_caps));
|
||||
|
||||
/* decode converter info*/
|
||||
if (!ds_port.fields.PORT_PRESENT) {
|
||||
@@ -2691,6 +2692,7 @@ static void dp_wa_power_up_0010FA(struct dc_link *link, uint8_t *dpcd_data,
|
||||
* keep receiver powered all the time.*/
|
||||
case DP_BRANCH_DEVICE_ID_0010FA:
|
||||
case DP_BRANCH_DEVICE_ID_0080E1:
|
||||
case DP_BRANCH_DEVICE_ID_00E04C:
|
||||
link->wa_flags.dp_keep_receiver_powered = true;
|
||||
break;
|
||||
|
||||
|
@@ -277,7 +277,8 @@ void dp_retrain_link_dp_test(struct dc_link *link,
|
||||
if (pipes[i].stream != NULL &&
|
||||
!pipes[i].top_pipe && !pipes[i].prev_odm_pipe &&
|
||||
pipes[i].stream->link != NULL &&
|
||||
pipes[i].stream_res.stream_enc != NULL) {
|
||||
pipes[i].stream_res.stream_enc != NULL &&
|
||||
pipes[i].stream->link == link) {
|
||||
udelay(100);
|
||||
|
||||
pipes[i].stream_res.stream_enc->funcs->dp_blank(
|
||||
|
@@ -423,10 +423,10 @@ bool dc_stream_add_writeback(struct dc *dc,
|
||||
|
||||
if (dwb->funcs->is_enabled(dwb)) {
|
||||
/* writeback pipe already enabled, only need to update */
|
||||
dc->hwss.update_writeback(dc, stream_status, wb_info);
|
||||
dc->hwss.update_writeback(dc, stream_status, wb_info, dc->current_state);
|
||||
} else {
|
||||
/* Enable writeback pipe from scratch*/
|
||||
dc->hwss.enable_writeback(dc, stream_status, wb_info);
|
||||
dc->hwss.enable_writeback(dc, stream_status, wb_info, dc->current_state);
|
||||
}
|
||||
}
|
||||
|
||||
|
@@ -77,6 +77,9 @@ static bool dce_abm_set_pipe(struct abm *abm, uint32_t controller_id)
|
||||
/* notifyDMCUMsg */
|
||||
REG_UPDATE(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 1);
|
||||
|
||||
REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,
|
||||
1, 80000);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
@@ -1356,7 +1356,8 @@ bool dcn20_update_bandwidth(
|
||||
static void dcn20_enable_writeback(
|
||||
struct dc *dc,
|
||||
const struct dc_stream_status *stream_status,
|
||||
struct dc_writeback_info *wb_info)
|
||||
struct dc_writeback_info *wb_info,
|
||||
struct dc_state *context)
|
||||
{
|
||||
struct dwbc *dwb;
|
||||
struct mcif_wb *mcif_wb;
|
||||
@@ -1373,7 +1374,7 @@ static void dcn20_enable_writeback(
|
||||
optc->funcs->set_dwb_source(optc, wb_info->dwb_pipe_inst);
|
||||
/* set MCIF_WB buffer and arbitration configuration */
|
||||
mcif_wb->funcs->config_mcif_buf(mcif_wb, &wb_info->mcif_buf_params, wb_info->dwb_params.dest_height);
|
||||
mcif_wb->funcs->config_mcif_arb(mcif_wb, &dc->current_state->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]);
|
||||
mcif_wb->funcs->config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]);
|
||||
/* Enable MCIF_WB */
|
||||
mcif_wb->funcs->enable_mcif(mcif_wb);
|
||||
/* Enable DWB */
|
||||
|
@@ -287,6 +287,10 @@ void optc2_get_optc_source(struct timing_generator *optc,
|
||||
*num_of_src_opp = 2;
|
||||
else
|
||||
*num_of_src_opp = 1;
|
||||
|
||||
/* Work around VBIOS not updating OPTC_NUM_OF_INPUT_SEGMENT */
|
||||
if (*src_opp_id_1 == 0xf)
|
||||
*num_of_src_opp = 1;
|
||||
}
|
||||
|
||||
void optc2_set_dwb_source(struct timing_generator *optc,
|
||||
|
@@ -1765,7 +1765,7 @@ int dcn20_populate_dml_pipes_from_context(
|
||||
pipe_cnt = i;
|
||||
continue;
|
||||
}
|
||||
if (!resource_are_streams_timing_synchronizable(
|
||||
if (dc->debug.disable_timing_sync || !resource_are_streams_timing_synchronizable(
|
||||
res_ctx->pipe_ctx[pipe_cnt].stream,
|
||||
res_ctx->pipe_ctx[i].stream)) {
|
||||
synchronized_vblank = false;
|
||||
@@ -2474,6 +2474,7 @@ bool dcn20_fast_validate_bw(
|
||||
&context->res_ctx, dc->res_pool,
|
||||
pipe, hsplit_pipe))
|
||||
goto validate_fail;
|
||||
dcn20_build_mapped_resource(dc, context, pipe->stream);
|
||||
} else
|
||||
dcn20_split_stream_for_mpc(
|
||||
&context->res_ctx, dc->res_pool,
|
||||
@@ -3040,7 +3041,7 @@ static void cap_soc_clocks(
|
||||
static void update_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_st *bb,
|
||||
struct pp_smu_nv_clock_table *max_clocks, unsigned int *uclk_states, unsigned int num_states)
|
||||
{
|
||||
struct _vcs_dpi_voltage_scaling_st calculated_states[MAX_CLOCK_LIMIT_STATES] = {0};
|
||||
struct _vcs_dpi_voltage_scaling_st calculated_states[MAX_CLOCK_LIMIT_STATES];
|
||||
int i;
|
||||
int num_calculated_states = 0;
|
||||
int min_dcfclk = 0;
|
||||
@@ -3048,6 +3049,8 @@ static void update_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_
|
||||
if (num_states == 0)
|
||||
return;
|
||||
|
||||
memset(calculated_states, 0, sizeof(calculated_states));
|
||||
|
||||
if (dc->bb_overrides.min_dcfclk_mhz > 0)
|
||||
min_dcfclk = dc->bb_overrides.min_dcfclk_mhz;
|
||||
else
|
||||
|
@@ -22,6 +22,7 @@
|
||||
* Authors: AMD
|
||||
*
|
||||
*/
|
||||
#include <linux/delay.h>
|
||||
#include "dm_services.h"
|
||||
#include "dcn20/dcn20_hubbub.h"
|
||||
#include "dcn21_hubbub.h"
|
||||
@@ -71,30 +72,39 @@ static uint32_t convert_and_clamp(
|
||||
void dcn21_dchvm_init(struct hubbub *hubbub)
|
||||
{
|
||||
struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
|
||||
uint32_t riommu_active;
|
||||
int i;
|
||||
|
||||
//Init DCHVM block
|
||||
REG_UPDATE(DCHVM_CTRL0, HOSTVM_INIT_REQ, 1);
|
||||
|
||||
//Poll until RIOMMU_ACTIVE = 1
|
||||
//TODO: Figure out interval us and retry count
|
||||
REG_WAIT(DCHVM_RIOMMU_STAT0, RIOMMU_ACTIVE, 1, 5, 100);
|
||||
for (i = 0; i < 100; i++) {
|
||||
REG_GET(DCHVM_RIOMMU_STAT0, RIOMMU_ACTIVE, &riommu_active);
|
||||
|
||||
//Reflect the power status of DCHUBBUB
|
||||
REG_UPDATE(DCHVM_RIOMMU_CTRL0, HOSTVM_POWERSTATUS, 1);
|
||||
if (riommu_active)
|
||||
break;
|
||||
else
|
||||
udelay(5);
|
||||
}
|
||||
|
||||
//Start rIOMMU prefetching
|
||||
REG_UPDATE(DCHVM_RIOMMU_CTRL0, HOSTVM_PREFETCH_REQ, 1);
|
||||
if (riommu_active) {
|
||||
//Reflect the power status of DCHUBBUB
|
||||
REG_UPDATE(DCHVM_RIOMMU_CTRL0, HOSTVM_POWERSTATUS, 1);
|
||||
|
||||
// Enable dynamic clock gating
|
||||
REG_UPDATE_4(DCHVM_CLK_CTRL,
|
||||
HVM_DISPCLK_R_GATE_DIS, 0,
|
||||
HVM_DISPCLK_G_GATE_DIS, 0,
|
||||
HVM_DCFCLK_R_GATE_DIS, 0,
|
||||
HVM_DCFCLK_G_GATE_DIS, 0);
|
||||
//Start rIOMMU prefetching
|
||||
REG_UPDATE(DCHVM_RIOMMU_CTRL0, HOSTVM_PREFETCH_REQ, 1);
|
||||
|
||||
//Poll until HOSTVM_PREFETCH_DONE = 1
|
||||
//TODO: Figure out interval us and retry count
|
||||
REG_WAIT(DCHVM_RIOMMU_STAT0, HOSTVM_PREFETCH_DONE, 1, 5, 100);
|
||||
// Enable dynamic clock gating
|
||||
REG_UPDATE_4(DCHVM_CLK_CTRL,
|
||||
HVM_DISPCLK_R_GATE_DIS, 0,
|
||||
HVM_DISPCLK_G_GATE_DIS, 0,
|
||||
HVM_DCFCLK_R_GATE_DIS, 0,
|
||||
HVM_DCFCLK_G_GATE_DIS, 0);
|
||||
|
||||
//Poll until HOSTVM_PREFETCH_DONE = 1
|
||||
REG_WAIT(DCHVM_RIOMMU_STAT0, HOSTVM_PREFETCH_DONE, 1, 5, 100);
|
||||
}
|
||||
}
|
||||
|
||||
static int hubbub21_init_dchub(struct hubbub *hubbub,
|
||||
|
@@ -321,10 +321,12 @@ struct hw_sequencer_funcs {
|
||||
struct dc_state *context);
|
||||
void (*update_writeback)(struct dc *dc,
|
||||
const struct dc_stream_status *stream_status,
|
||||
struct dc_writeback_info *wb_info);
|
||||
struct dc_writeback_info *wb_info,
|
||||
struct dc_state *context);
|
||||
void (*enable_writeback)(struct dc *dc,
|
||||
const struct dc_stream_status *stream_status,
|
||||
struct dc_writeback_info *wb_info);
|
||||
struct dc_writeback_info *wb_info,
|
||||
struct dc_state *context);
|
||||
void (*disable_writeback)(struct dc *dc,
|
||||
unsigned int dwb_pipe_inst);
|
||||
#endif
|
||||
|
@@ -31,6 +31,8 @@
|
||||
#define DP_BRANCH_DEVICE_ID_0022B9 0x0022B9
|
||||
#define DP_BRANCH_DEVICE_ID_00001A 0x00001A
|
||||
#define DP_BRANCH_DEVICE_ID_0080E1 0x0080e1
|
||||
#define DP_BRANCH_DEVICE_ID_90CC24 0x90CC24
|
||||
#define DP_BRANCH_DEVICE_ID_00E04C 0x00E04C
|
||||
|
||||
enum ddc_result {
|
||||
DDC_RESULT_UNKNOWN = 0,
|
||||
|
@@ -743,6 +743,10 @@ void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
|
||||
nominal_field_rate_in_uhz =
|
||||
mod_freesync_calc_nominal_field_rate(stream);
|
||||
|
||||
/* Rounded to the nearest Hz */
|
||||
nominal_field_rate_in_uhz = 1000000ULL *
|
||||
div_u64(nominal_field_rate_in_uhz + 500000, 1000000);
|
||||
|
||||
min_refresh_in_uhz = in_config->min_refresh_in_uhz;
|
||||
max_refresh_in_uhz = in_config->max_refresh_in_uhz;
|
||||
|
||||
@@ -996,14 +1000,13 @@ unsigned long long mod_freesync_calc_nominal_field_rate(
|
||||
const struct dc_stream_state *stream)
|
||||
{
|
||||
unsigned long long nominal_field_rate_in_uhz = 0;
|
||||
unsigned int total = stream->timing.h_total * stream->timing.v_total;
|
||||
|
||||
/* Calculate nominal field rate for stream */
|
||||
/* Calculate nominal field rate for stream, rounded up to nearest integer */
|
||||
nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz / 10;
|
||||
nominal_field_rate_in_uhz *= 1000ULL * 1000ULL * 1000ULL;
|
||||
nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz,
|
||||
stream->timing.h_total);
|
||||
nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz,
|
||||
stream->timing.v_total);
|
||||
|
||||
nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz, total);
|
||||
|
||||
return nominal_field_rate_in_uhz;
|
||||
}
|
||||
|
@@ -115,7 +115,7 @@ static const struct abm_parameters * const abm_settings[] = {
|
||||
/* NOTE: iRAM is 256B in size */
|
||||
struct iram_table_v_2 {
|
||||
/* flags */
|
||||
uint16_t flags; /* 0x00 U16 */
|
||||
uint16_t min_abm_backlight; /* 0x00 U16 */
|
||||
|
||||
/* parameters for ABM2.0 algorithm */
|
||||
uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x02 U0.8 */
|
||||
@@ -140,10 +140,10 @@ struct iram_table_v_2 {
|
||||
|
||||
/* For reading PSR State directly from IRAM */
|
||||
uint8_t psr_state; /* 0xf0 */
|
||||
uint8_t dmcu_mcp_interface_version; /* 0xf1 */
|
||||
uint8_t dmcu_abm_feature_version; /* 0xf2 */
|
||||
uint8_t dmcu_psr_feature_version; /* 0xf3 */
|
||||
uint16_t dmcu_version; /* 0xf4 */
|
||||
uint8_t dmcu_mcp_interface_version; /* 0xf1 */
|
||||
uint8_t dmcu_abm_feature_version; /* 0xf2 */
|
||||
uint8_t dmcu_psr_feature_version; /* 0xf3 */
|
||||
uint16_t dmcu_version; /* 0xf4 */
|
||||
uint8_t dmcu_state; /* 0xf6 */
|
||||
|
||||
uint16_t blRampReduction; /* 0xf7 */
|
||||
@@ -164,42 +164,43 @@ struct iram_table_v_2_2 {
|
||||
uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x16 U0.8 */
|
||||
uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x2a U2.6 */
|
||||
uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x3e U2.6 */
|
||||
uint8_t hybrid_factor[NUM_AGGR_LEVEL]; /* 0x52 U0.8 */
|
||||
uint8_t contrast_factor[NUM_AGGR_LEVEL]; /* 0x56 U0.8 */
|
||||
uint8_t deviation_gain[NUM_AGGR_LEVEL]; /* 0x5a U0.8 */
|
||||
uint8_t iir_curve[NUM_AMBI_LEVEL]; /* 0x5e U0.8 */
|
||||
uint8_t min_knee[NUM_AGGR_LEVEL]; /* 0x63 U0.8 */
|
||||
uint8_t max_knee[NUM_AGGR_LEVEL]; /* 0x67 U0.8 */
|
||||
uint8_t pad[21]; /* 0x6b U0.8 */
|
||||
uint8_t hybrid_factor[NUM_AGGR_LEVEL]; /* 0x52 U0.8 */
|
||||
uint8_t contrast_factor[NUM_AGGR_LEVEL]; /* 0x56 U0.8 */
|
||||
uint8_t deviation_gain[NUM_AGGR_LEVEL]; /* 0x5a U0.8 */
|
||||
uint8_t iir_curve[NUM_AMBI_LEVEL]; /* 0x5e U0.8 */
|
||||
uint8_t min_knee[NUM_AGGR_LEVEL]; /* 0x63 U0.8 */
|
||||
uint8_t max_knee[NUM_AGGR_LEVEL]; /* 0x67 U0.8 */
|
||||
uint16_t min_abm_backlight; /* 0x6b U16 */
|
||||
uint8_t pad[19]; /* 0x6d U0.8 */
|
||||
|
||||
/* parameters for crgb conversion */
|
||||
uint16_t crgb_thresh[NUM_POWER_FN_SEGS]; /* 0x80 U3.13 */
|
||||
uint16_t crgb_offset[NUM_POWER_FN_SEGS]; /* 0x90 U1.15 */
|
||||
uint16_t crgb_slope[NUM_POWER_FN_SEGS]; /* 0xa0 U4.12 */
|
||||
uint16_t crgb_thresh[NUM_POWER_FN_SEGS]; /* 0x80 U3.13 */
|
||||
uint16_t crgb_offset[NUM_POWER_FN_SEGS]; /* 0x90 U1.15 */
|
||||
uint16_t crgb_slope[NUM_POWER_FN_SEGS]; /* 0xa0 U4.12 */
|
||||
|
||||
/* parameters for custom curve */
|
||||
/* thresholds for brightness --> backlight */
|
||||
uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS]; /* 0xb0 U16.0 */
|
||||
uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS]; /* 0xb0 U16.0 */
|
||||
/* offsets for brightness --> backlight */
|
||||
uint16_t backlight_offsets[NUM_BL_CURVE_SEGS]; /* 0xd0 U16.0 */
|
||||
uint16_t backlight_offsets[NUM_BL_CURVE_SEGS]; /* 0xd0 U16.0 */
|
||||
|
||||
/* For reading PSR State directly from IRAM */
|
||||
uint8_t psr_state; /* 0xf0 */
|
||||
uint8_t dmcu_mcp_interface_version; /* 0xf1 */
|
||||
uint8_t dmcu_abm_feature_version; /* 0xf2 */
|
||||
uint8_t dmcu_psr_feature_version; /* 0xf3 */
|
||||
uint16_t dmcu_version; /* 0xf4 */
|
||||
uint8_t dmcu_state; /* 0xf6 */
|
||||
uint8_t psr_state; /* 0xf0 */
|
||||
uint8_t dmcu_mcp_interface_version; /* 0xf1 */
|
||||
uint8_t dmcu_abm_feature_version; /* 0xf2 */
|
||||
uint8_t dmcu_psr_feature_version; /* 0xf3 */
|
||||
uint16_t dmcu_version; /* 0xf4 */
|
||||
uint8_t dmcu_state; /* 0xf6 */
|
||||
|
||||
uint8_t dummy1; /* 0xf7 */
|
||||
uint8_t dummy2; /* 0xf8 */
|
||||
uint8_t dummy3; /* 0xf9 */
|
||||
uint8_t dummy4; /* 0xfa */
|
||||
uint8_t dummy5; /* 0xfb */
|
||||
uint8_t dummy6; /* 0xfc */
|
||||
uint8_t dummy7; /* 0xfd */
|
||||
uint8_t dummy8; /* 0xfe */
|
||||
uint8_t dummy9; /* 0xff */
|
||||
uint8_t dummy1; /* 0xf7 */
|
||||
uint8_t dummy2; /* 0xf8 */
|
||||
uint8_t dummy3; /* 0xf9 */
|
||||
uint8_t dummy4; /* 0xfa */
|
||||
uint8_t dummy5; /* 0xfb */
|
||||
uint8_t dummy6; /* 0xfc */
|
||||
uint8_t dummy7; /* 0xfd */
|
||||
uint8_t dummy8; /* 0xfe */
|
||||
uint8_t dummy9; /* 0xff */
|
||||
};
|
||||
#pragma pack(pop)
|
||||
|
||||
@@ -271,7 +272,8 @@ void fill_iram_v_2(struct iram_table_v_2 *ram_table, struct dmcu_iram_parameters
|
||||
{
|
||||
unsigned int set = params.set;
|
||||
|
||||
ram_table->flags = 0x0;
|
||||
ram_table->min_abm_backlight =
|
||||
cpu_to_be16(params.min_abm_backlight);
|
||||
ram_table->deviation_gain = 0xb3;
|
||||
|
||||
ram_table->blRampReduction =
|
||||
@@ -445,6 +447,9 @@ void fill_iram_v_2_2(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parame
|
||||
|
||||
ram_table->flags = 0x0;
|
||||
|
||||
ram_table->min_abm_backlight =
|
||||
cpu_to_be16(params.min_abm_backlight);
|
||||
|
||||
ram_table->deviation_gain[0] = 0xb3;
|
||||
ram_table->deviation_gain[1] = 0xa8;
|
||||
ram_table->deviation_gain[2] = 0x98;
|
||||
@@ -588,6 +593,10 @@ void fill_iram_v_2_3(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parame
|
||||
unsigned int set = params.set;
|
||||
|
||||
ram_table->flags = 0x0;
|
||||
|
||||
ram_table->min_abm_backlight =
|
||||
cpu_to_be16(params.min_abm_backlight);
|
||||
|
||||
for (i = 0; i < NUM_AGGR_LEVEL; i++) {
|
||||
ram_table->hybrid_factor[i] = abm_settings[set][i].brightness_gain;
|
||||
ram_table->contrast_factor[i] = abm_settings[set][i].contrast_factor;
|
||||
|
@@ -38,6 +38,7 @@ struct dmcu_iram_parameters {
|
||||
unsigned int backlight_lut_array_size;
|
||||
unsigned int backlight_ramping_reduction;
|
||||
unsigned int backlight_ramping_start;
|
||||
unsigned int min_abm_backlight;
|
||||
unsigned int set;
|
||||
};
|
||||
|
||||
|
@@ -1344,7 +1344,10 @@ static int smu_suspend(void *handle)
|
||||
int ret;
|
||||
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
|
||||
struct smu_context *smu = &adev->smu;
|
||||
bool baco_feature_is_enabled = smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT);
|
||||
bool baco_feature_is_enabled = false;
|
||||
|
||||
if(!(adev->flags & AMD_IS_APU))
|
||||
baco_feature_is_enabled = smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT);
|
||||
|
||||
ret = smu_system_features_control(smu, false);
|
||||
if (ret)
|
||||
|
@@ -29,7 +29,7 @@
|
||||
#include "vega20_baco.h"
|
||||
#include "vega20_smumgr.h"
|
||||
|
||||
|
||||
#include "amdgpu_ras.h"
|
||||
|
||||
static const struct soc15_baco_cmd_entry clean_baco_tbl[] =
|
||||
{
|
||||
@@ -74,6 +74,7 @@ int vega20_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state)
|
||||
int vega20_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state)
|
||||
{
|
||||
struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
|
||||
struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
|
||||
enum BACO_STATE cur_state;
|
||||
uint32_t data;
|
||||
|
||||
@@ -84,10 +85,11 @@ int vega20_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state)
|
||||
return 0;
|
||||
|
||||
if (state == BACO_STATE_IN) {
|
||||
data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
|
||||
data |= 0x80000000;
|
||||
WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
|
||||
|
||||
if (!ras || !ras->supported) {
|
||||
data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
|
||||
data |= 0x80000000;
|
||||
WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
|
||||
}
|
||||
|
||||
if(smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_EnterBaco, 0))
|
||||
return -EINVAL;
|
||||
|
@@ -183,11 +183,13 @@ static int renoir_print_clk_levels(struct smu_context *smu,
|
||||
int i, size = 0, ret = 0;
|
||||
uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0;
|
||||
DpmClocks_t *clk_table = smu->smu_table.clocks_table;
|
||||
SmuMetrics_t metrics = {0};
|
||||
SmuMetrics_t metrics;
|
||||
|
||||
if (!clk_table || clk_type >= SMU_CLK_COUNT)
|
||||
return -EINVAL;
|
||||
|
||||
memset(&metrics, 0, sizeof(metrics));
|
||||
|
||||
ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0,
|
||||
(void *)&metrics, false);
|
||||
if (ret)
|
||||
|
@@ -250,6 +250,7 @@ komeda_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
{
|
||||
komeda_crtc_prepare(to_kcrtc(crtc));
|
||||
drm_crtc_vblank_on(crtc);
|
||||
WARN_ON(drm_crtc_vblank_get(crtc));
|
||||
komeda_crtc_do_flush(crtc, old);
|
||||
}
|
||||
|
||||
@@ -319,6 +320,7 @@ komeda_crtc_atomic_disable(struct drm_crtc *crtc,
|
||||
}
|
||||
}
|
||||
|
||||
drm_crtc_vblank_put(crtc);
|
||||
drm_crtc_vblank_off(crtc);
|
||||
komeda_crtc_unprepare(kcrtc);
|
||||
}
|
||||
|
@@ -715,7 +715,9 @@ static int anx78xx_init_pdata(struct anx78xx *anx78xx)
|
||||
/* 1.0V digital core power regulator */
|
||||
pdata->dvdd10 = devm_regulator_get(dev, "dvdd10");
|
||||
if (IS_ERR(pdata->dvdd10)) {
|
||||
DRM_ERROR("DVDD10 regulator not found\n");
|
||||
if (PTR_ERR(pdata->dvdd10) != -EPROBE_DEFER)
|
||||
DRM_ERROR("DVDD10 regulator not found\n");
|
||||
|
||||
return PTR_ERR(pdata->dvdd10);
|
||||
}
|
||||
|
||||
@@ -1332,7 +1334,9 @@ static int anx78xx_i2c_probe(struct i2c_client *client,
|
||||
|
||||
err = anx78xx_init_pdata(anx78xx);
|
||||
if (err) {
|
||||
DRM_ERROR("Failed to initialize pdata: %d\n", err);
|
||||
if (err != -EPROBE_DEFER)
|
||||
DRM_ERROR("Failed to initialize pdata: %d\n", err);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user