PM / x86: Save/restore MISC_ENABLE register
Save/restore MISC_ENABLE register on suspend/resume. This fixes OOPS (invalid opcode) on resume from STR on Asus P4P800-VM, which wakes up with MWAIT disabled. Fixes https://bugzilla.kernel.org/show_bug.cgi?id=15385 Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Tested-by: Alan Stern <stern@rowland.harvard.edu> Acked-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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committed by
Rafael J. Wysocki

parent
386f40c86d
commit
85a0e75397
@@ -15,6 +15,8 @@ static inline int arch_prepare_suspend(void) { return 0; }
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struct saved_context {
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u16 es, fs, gs, ss;
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unsigned long cr0, cr2, cr3, cr4;
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u64 misc_enable;
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bool misc_enable_saved;
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struct desc_ptr gdt;
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struct desc_ptr idt;
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u16 ldt;
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