Merge tag 'pci-v4.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas: - add framework for supporting PCIe devices in Endpoint mode (Kishon Vijay Abraham I) - use non-postable PCI config space mappings when possible (Lorenzo Pieralisi) - clean up and unify mmap of PCI BARs (David Woodhouse) - export and unify Function Level Reset support (Christoph Hellwig) - avoid FLR for Intel 82579 NICs (Sasha Neftin) - add pci_request_irq() and pci_free_irq() helpers (Christoph Hellwig) - short-circuit config access failures for disconnected devices (Keith Busch) - remove D3 sleep delay when possible (Adrian Hunter) - freeze PME scan before suspending devices (Lukas Wunner) - stop disabling MSI/MSI-X in pci_device_shutdown() (Prarit Bhargava) - disable boot interrupt quirk for ASUS M2N-LR (Stefan Assmann) - add arch-specific alignment control to improve device passthrough by avoiding multiple BARs in a page (Yongji Xie) - add sysfs sriov_drivers_autoprobe to control VF driver binding (Bodong Wang) - allow slots below PCI-to-PCIe "reverse bridges" (Bjorn Helgaas) - fix crashes when unbinding host controllers that don't support removal (Brian Norris) - add driver for MicroSemi Switchtec management interface (Logan Gunthorpe) - add driver for Faraday Technology FTPCI100 host bridge (Linus Walleij) - add i.MX7D support (Andrey Smirnov) - use generic MSI support for Aardvark (Thomas Petazzoni) - make Rockchip driver modular (Brian Norris) - advertise 128-byte Read Completion Boundary support for Rockchip (Shawn Lin) - advertise PCI_EXP_LNKSTA_SLC for Rockchip root port (Shawn Lin) - convert atomic_t to refcount_t in HV driver (Elena Reshetova) - add CPU IRQ affinity in HV driver (K. Y. Srinivasan) - fix PCI bus removal in HV driver (Long Li) - add support for ThunderX2 DMA alias topology (Jayachandran C) - add ThunderX pass2.x 2nd node MCFG quirk (Tomasz Nowicki) - add ITE 8893 bridge DMA alias quirk (Jarod Wilson) - restrict Cavium ACS quirk only to CN81xx/CN83xx/CN88xx devices (Manish Jaggi) * tag 'pci-v4.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (146 commits) PCI: Don't allow unbinding host controllers that aren't prepared ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP MAINTAINERS: Add PCI Endpoint maintainer Documentation: PCI: Add userguide for PCI endpoint test function tools: PCI: Add sample test script to invoke pcitest tools: PCI: Add a userspace tool to test PCI endpoint Documentation: misc-devices: Add Documentation for pci-endpoint-test driver misc: Add host side PCI driver for PCI test function device PCI: Add device IDs for DRA74x and DRA72x dt-bindings: PCI: dra7xx: Add DT bindings to enable unaligned access PCI: dwc: dra7xx: Workaround for errata id i870 dt-bindings: PCI: dra7xx: Add DT bindings for PCI dra7xx EP mode PCI: dwc: dra7xx: Add EP mode support PCI: dwc: dra7xx: Facilitate wrapper and MSI interrupts to be enabled independently dt-bindings: PCI: Add DT bindings for PCI designware EP mode PCI: dwc: designware: Add EP mode support Documentation: PCI: Add binding documentation for pci-test endpoint function ixgbe: Use pcie_flr() instead of duplicating it IB/hfi1: Use pcie_flr() instead of duplicating it PCI: imx6: Fix spelling mistake: "contol" -> "control" ...
This commit is contained in:
Linus Torvalds
@@ -51,8 +51,9 @@ extern unsigned long ia64_max_iommu_merge_mask;
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#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
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#define HAVE_PCI_MMAP
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extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine);
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#define ARCH_GENERIC_PCI_MMAP_RESOURCE
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#define arch_can_pci_mmap_wc() 1
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#define HAVE_PCI_LEGACY
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extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
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struct vm_area_struct *vma,
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@@ -418,52 +418,6 @@ pcibios_align_resource (void *data, const struct resource *res,
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return res->start;
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}
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int
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pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine)
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{
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unsigned long size = vma->vm_end - vma->vm_start;
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pgprot_t prot;
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/*
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* I/O space cannot be accessed via normal processor loads and
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* stores on this platform.
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*/
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if (mmap_state == pci_mmap_io)
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/*
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* XXX we could relax this for I/O spaces for which ACPI
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* indicates that the space is 1-to-1 mapped. But at the
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* moment, we don't support multiple PCI address spaces and
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* the legacy I/O space is not 1-to-1 mapped, so this is moot.
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*/
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return -EINVAL;
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if (!valid_mmap_phys_addr_range(vma->vm_pgoff, size))
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return -EINVAL;
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prot = phys_mem_access_prot(NULL, vma->vm_pgoff, size,
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vma->vm_page_prot);
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/*
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* If the user requested WC, the kernel uses UC or WC for this region,
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* and the chipset supports WC, we can use WC. Otherwise, we have to
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* use the same attribute the kernel uses.
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*/
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if (write_combine &&
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((pgprot_val(prot) & _PAGE_MA_MASK) == _PAGE_MA_UC ||
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(pgprot_val(prot) & _PAGE_MA_MASK) == _PAGE_MA_WC) &&
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efi_range_is_wc(vma->vm_start, vma->vm_end - vma->vm_start))
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vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
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else
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vma->vm_page_prot = prot;
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if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
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vma->vm_end - vma->vm_start, vma->vm_page_prot))
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return -EAGAIN;
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return 0;
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}
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/**
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* ia64_pci_get_legacy_mem - generic legacy mem routine
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* @bus: bus to get legacy memory base address for
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