Merge tag 'omap-for-v3.8/cleanup-headers-iommu-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/headers
From Tony Lindgren: Move most of remaining omap iommu code to drivers/iommu. This is needed for the multiplatform kernels as the plat and mach headers cannot be included. These changes were agreed to be merged via the arm-soc tree by Joerg and Ohad as these will cause some merge conflicts with the other related clean-up branches. So omap-for-v3.8/cleanup-headers-iommu should be added as one of the depends branches for arm-soc. * tag 'omap-for-v3.8/cleanup-headers-iommu-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Move iommu/iovmm headers to platform_data ARM: OMAP2+: Make some definitions local ARM: OMAP2+: Move iommu2 to drivers/iommu/omap-iommu2.c ARM: OMAP2+: Move plat/iovmm.h to include/linux/omap-iommu.h ARM: OMAP2+: Move iopgtable header to drivers/iommu/ ARM: OMAP: Merge iommu2.h into iommu.h Conflicts due to surrounding changes in: arch/arm/mach-omap2/omap_hwmod_44xx_data.c drivers/media/platform/omap3isp/ispvideo.c Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
@@ -1,221 +0,0 @@
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/*
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* omap iommu: main structures
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*
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* Copyright (C) 2008-2009 Nokia Corporation
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*
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* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __MACH_IOMMU_H
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#define __MACH_IOMMU_H
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struct iotlb_entry {
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u32 da;
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u32 pa;
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u32 pgsz, prsvd, valid;
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union {
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u16 ap;
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struct {
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u32 endian, elsz, mixed;
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};
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};
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};
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struct omap_iommu {
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const char *name;
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struct module *owner;
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struct clk *clk;
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void __iomem *regbase;
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struct device *dev;
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void *isr_priv;
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struct iommu_domain *domain;
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unsigned int refcount;
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spinlock_t iommu_lock; /* global for this whole object */
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/*
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* We don't change iopgd for a situation like pgd for a task,
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* but share it globally for each iommu.
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*/
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u32 *iopgd;
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spinlock_t page_table_lock; /* protect iopgd */
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int nr_tlb_entries;
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struct list_head mmap;
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struct mutex mmap_lock; /* protect mmap */
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void *ctx; /* iommu context: registres saved area */
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u32 da_start;
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u32 da_end;
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};
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struct cr_regs {
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union {
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struct {
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u16 cam_l;
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u16 cam_h;
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};
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u32 cam;
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};
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union {
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struct {
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u16 ram_l;
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u16 ram_h;
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};
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u32 ram;
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};
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};
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struct iotlb_lock {
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short base;
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short vict;
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};
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/* architecture specific functions */
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struct iommu_functions {
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unsigned long version;
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int (*enable)(struct omap_iommu *obj);
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void (*disable)(struct omap_iommu *obj);
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void (*set_twl)(struct omap_iommu *obj, bool on);
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u32 (*fault_isr)(struct omap_iommu *obj, u32 *ra);
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void (*tlb_read_cr)(struct omap_iommu *obj, struct cr_regs *cr);
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void (*tlb_load_cr)(struct omap_iommu *obj, struct cr_regs *cr);
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struct cr_regs *(*alloc_cr)(struct omap_iommu *obj,
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struct iotlb_entry *e);
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int (*cr_valid)(struct cr_regs *cr);
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u32 (*cr_to_virt)(struct cr_regs *cr);
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void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e);
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ssize_t (*dump_cr)(struct omap_iommu *obj, struct cr_regs *cr,
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char *buf);
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u32 (*get_pte_attr)(struct iotlb_entry *e);
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void (*save_ctx)(struct omap_iommu *obj);
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void (*restore_ctx)(struct omap_iommu *obj);
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ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len);
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};
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/**
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* struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
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* @da_start: device address where the va space starts.
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* @da_end: device address where the va space ends.
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* @nr_tlb_entries: number of entries supported by the translation
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* look-aside buffer (TLB).
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*/
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struct omap_mmu_dev_attr {
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u32 da_start;
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u32 da_end;
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int nr_tlb_entries;
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};
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struct iommu_platform_data {
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const char *name;
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const char *clk_name;
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const int nr_tlb_entries;
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u32 da_start;
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u32 da_end;
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};
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/**
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* struct iommu_arch_data - omap iommu private data
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* @name: name of the iommu device
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* @iommu_dev: handle of the iommu device
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*
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* This is an omap iommu private data object, which binds an iommu user
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* to its iommu device. This object should be placed at the iommu user's
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* dev_archdata so generic IOMMU API can be used without having to
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* utilize omap-specific plumbing anymore.
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*/
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struct omap_iommu_arch_data {
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const char *name;
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struct omap_iommu *iommu_dev;
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};
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#ifdef CONFIG_IOMMU_API
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/**
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* dev_to_omap_iommu() - retrieves an omap iommu object from a user device
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* @dev: iommu client device
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*/
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static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
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{
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struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
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return arch_data->iommu_dev;
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}
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#endif
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/* IOMMU errors */
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#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0)
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#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1)
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#define OMAP_IOMMU_ERR_EMU_MISS (1 << 2)
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#define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3)
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#define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4)
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#if defined(CONFIG_ARCH_OMAP1)
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#error "iommu for this processor not implemented yet"
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#else
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#include <plat/iommu2.h>
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#endif
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/*
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* utilities for super page(16MB, 1MB, 64KB and 4KB)
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*/
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#define iopgsz_max(bytes) \
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(((bytes) >= SZ_16M) ? SZ_16M : \
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((bytes) >= SZ_1M) ? SZ_1M : \
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((bytes) >= SZ_64K) ? SZ_64K : \
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((bytes) >= SZ_4K) ? SZ_4K : 0)
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#define bytes_to_iopgsz(bytes) \
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(((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M : \
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((bytes) == SZ_1M) ? MMU_CAM_PGSZ_1M : \
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((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K : \
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((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1)
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#define iopgsz_to_bytes(iopgsz) \
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(((iopgsz) == MMU_CAM_PGSZ_16M) ? SZ_16M : \
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((iopgsz) == MMU_CAM_PGSZ_1M) ? SZ_1M : \
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((iopgsz) == MMU_CAM_PGSZ_64K) ? SZ_64K : \
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((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0)
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#define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) >= 0)
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/*
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* global functions
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*/
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extern u32 omap_iommu_arch_version(void);
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extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e);
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extern int
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omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e);
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extern int omap_iommu_set_isr(const char *name,
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int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs,
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void *priv),
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void *isr_priv);
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extern void omap_iommu_save_ctx(struct device *dev);
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extern void omap_iommu_restore_ctx(struct device *dev);
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extern int omap_install_iommu_arch(const struct iommu_functions *ops);
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extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
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extern int omap_foreach_iommu_device(void *data,
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int (*fn)(struct device *, void *));
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extern ssize_t
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omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);
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extern size_t
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omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);
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#endif /* __MACH_IOMMU_H */
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@@ -1,96 +0,0 @@
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/*
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* omap iommu: omap2 architecture specific definitions
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*
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* Copyright (C) 2008-2009 Nokia Corporation
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*
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* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __MACH_IOMMU2_H
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#define __MACH_IOMMU2_H
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#include <linux/io.h>
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/*
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* MMU Register offsets
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*/
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#define MMU_REVISION 0x00
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#define MMU_SYSCONFIG 0x10
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#define MMU_SYSSTATUS 0x14
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#define MMU_IRQSTATUS 0x18
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#define MMU_IRQENABLE 0x1c
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#define MMU_WALKING_ST 0x40
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#define MMU_CNTL 0x44
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#define MMU_FAULT_AD 0x48
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#define MMU_TTB 0x4c
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#define MMU_LOCK 0x50
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#define MMU_LD_TLB 0x54
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#define MMU_CAM 0x58
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#define MMU_RAM 0x5c
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#define MMU_GFLUSH 0x60
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#define MMU_FLUSH_ENTRY 0x64
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#define MMU_READ_CAM 0x68
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#define MMU_READ_RAM 0x6c
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#define MMU_EMU_FAULT_AD 0x70
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#define MMU_REG_SIZE 256
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/*
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* MMU Register bit definitions
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*/
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#define MMU_LOCK_BASE_SHIFT 10
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#define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT)
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#define MMU_LOCK_BASE(x) \
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((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)
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#define MMU_LOCK_VICT_SHIFT 4
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#define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT)
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#define MMU_LOCK_VICT(x) \
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((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)
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#define MMU_CAM_VATAG_SHIFT 12
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#define MMU_CAM_VATAG_MASK \
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((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
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#define MMU_CAM_P (1 << 3)
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#define MMU_CAM_V (1 << 2)
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#define MMU_CAM_PGSZ_MASK 3
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#define MMU_CAM_PGSZ_1M (0 << 0)
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#define MMU_CAM_PGSZ_64K (1 << 0)
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#define MMU_CAM_PGSZ_4K (2 << 0)
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#define MMU_CAM_PGSZ_16M (3 << 0)
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#define MMU_RAM_PADDR_SHIFT 12
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#define MMU_RAM_PADDR_MASK \
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((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
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#define MMU_RAM_ENDIAN_SHIFT 9
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#define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT)
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#define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT)
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#define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT)
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#define MMU_RAM_ELSZ_SHIFT 7
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#define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT)
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#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
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#define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT)
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#define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT)
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#define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT)
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#define MMU_RAM_MIXED_SHIFT 6
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#define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT)
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#define MMU_RAM_MIXED MMU_RAM_MIXED_MASK
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/*
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* register accessors
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*/
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static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)
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{
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return __raw_readl(obj->regbase + offs);
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}
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static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)
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{
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__raw_writel(val, obj->regbase + offs);
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}
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#endif /* __MACH_IOMMU2_H */
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@@ -1,120 +0,0 @@
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/*
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* omap iommu: pagetable definitions
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*
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* Copyright (C) 2008-2010 Nokia Corporation
|
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*
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||||
* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
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#ifndef __PLAT_OMAP_IOMMU_H
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#define __PLAT_OMAP_IOMMU_H
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/*
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* "L2 table" address mask and size definitions.
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*/
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#define IOPGD_SHIFT 20
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#define IOPGD_SIZE (1UL << IOPGD_SHIFT)
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#define IOPGD_MASK (~(IOPGD_SIZE - 1))
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/*
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* "section" address mask and size definitions.
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*/
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#define IOSECTION_SHIFT 20
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#define IOSECTION_SIZE (1UL << IOSECTION_SHIFT)
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#define IOSECTION_MASK (~(IOSECTION_SIZE - 1))
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/*
|
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* "supersection" address mask and size definitions.
|
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*/
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#define IOSUPER_SHIFT 24
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#define IOSUPER_SIZE (1UL << IOSUPER_SHIFT)
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#define IOSUPER_MASK (~(IOSUPER_SIZE - 1))
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#define PTRS_PER_IOPGD (1UL << (32 - IOPGD_SHIFT))
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#define IOPGD_TABLE_SIZE (PTRS_PER_IOPGD * sizeof(u32))
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/*
|
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* "small page" address mask and size definitions.
|
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*/
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#define IOPTE_SHIFT 12
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#define IOPTE_SIZE (1UL << IOPTE_SHIFT)
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#define IOPTE_MASK (~(IOPTE_SIZE - 1))
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|
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/*
|
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* "large page" address mask and size definitions.
|
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*/
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#define IOLARGE_SHIFT 16
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#define IOLARGE_SIZE (1UL << IOLARGE_SHIFT)
|
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#define IOLARGE_MASK (~(IOLARGE_SIZE - 1))
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#define PTRS_PER_IOPTE (1UL << (IOPGD_SHIFT - IOPTE_SHIFT))
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#define IOPTE_TABLE_SIZE (PTRS_PER_IOPTE * sizeof(u32))
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#define IOPAGE_MASK IOPTE_MASK
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/**
|
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* omap_iommu_translate() - va to pa translation
|
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* @d: omap iommu descriptor
|
||||
* @va: virtual address
|
||||
* @mask: omap iommu descriptor mask
|
||||
*
|
||||
* va to pa translation
|
||||
*/
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||||
static inline phys_addr_t omap_iommu_translate(u32 d, u32 va, u32 mask)
|
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{
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return (d & mask) | (va & (~mask));
|
||||
}
|
||||
|
||||
/*
|
||||
* some descriptor attributes.
|
||||
*/
|
||||
#define IOPGD_TABLE (1 << 0)
|
||||
#define IOPGD_SECTION (2 << 0)
|
||||
#define IOPGD_SUPER (1 << 18 | 2 << 0)
|
||||
|
||||
#define iopgd_is_table(x) (((x) & 3) == IOPGD_TABLE)
|
||||
#define iopgd_is_section(x) (((x) & (1 << 18 | 3)) == IOPGD_SECTION)
|
||||
#define iopgd_is_super(x) (((x) & (1 << 18 | 3)) == IOPGD_SUPER)
|
||||
|
||||
#define IOPTE_SMALL (2 << 0)
|
||||
#define IOPTE_LARGE (1 << 0)
|
||||
|
||||
#define iopte_is_small(x) (((x) & 2) == IOPTE_SMALL)
|
||||
#define iopte_is_large(x) (((x) & 3) == IOPTE_LARGE)
|
||||
|
||||
/* to find an entry in a page-table-directory */
|
||||
#define iopgd_index(da) (((da) >> IOPGD_SHIFT) & (PTRS_PER_IOPGD - 1))
|
||||
#define iopgd_offset(obj, da) ((obj)->iopgd + iopgd_index(da))
|
||||
|
||||
#define iopgd_page_paddr(iopgd) (*iopgd & ~((1 << 10) - 1))
|
||||
#define iopgd_page_vaddr(iopgd) ((u32 *)phys_to_virt(iopgd_page_paddr(iopgd)))
|
||||
|
||||
/* to find an entry in the second-level page table. */
|
||||
#define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1))
|
||||
#define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da))
|
||||
|
||||
static inline u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
|
||||
u32 flags)
|
||||
{
|
||||
memset(e, 0, sizeof(*e));
|
||||
|
||||
e->da = da;
|
||||
e->pa = pa;
|
||||
e->valid = 1;
|
||||
/* FIXME: add OMAP1 support */
|
||||
e->pgsz = flags & MMU_CAM_PGSZ_MASK;
|
||||
e->endian = flags & MMU_RAM_ENDIAN_MASK;
|
||||
e->elsz = flags & MMU_RAM_ELSZ_MASK;
|
||||
e->mixed = flags & MMU_RAM_MIXED_MASK;
|
||||
|
||||
return iopgsz_to_bytes(e->pgsz);
|
||||
}
|
||||
|
||||
#define to_iommu(dev) \
|
||||
(struct omap_iommu *)platform_get_drvdata(to_platform_device(dev))
|
||||
|
||||
#endif /* __PLAT_OMAP_IOMMU_H */
|
||||
@@ -1,89 +0,0 @@
|
||||
/*
|
||||
* omap iommu: simple virtual address space management
|
||||
*
|
||||
* Copyright (C) 2008-2009 Nokia Corporation
|
||||
*
|
||||
* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __IOMMU_MMAP_H
|
||||
#define __IOMMU_MMAP_H
|
||||
|
||||
#include <linux/iommu.h>
|
||||
|
||||
struct iovm_struct {
|
||||
struct omap_iommu *iommu; /* iommu object which this belongs to */
|
||||
u32 da_start; /* area definition */
|
||||
u32 da_end;
|
||||
u32 flags; /* IOVMF_: see below */
|
||||
struct list_head list; /* linked in ascending order */
|
||||
const struct sg_table *sgt; /* keep 'page' <-> 'da' mapping */
|
||||
void *va; /* mpu side mapped address */
|
||||
};
|
||||
|
||||
/*
|
||||
* IOVMF_FLAGS: attribute for iommu virtual memory area(iovma)
|
||||
*
|
||||
* lower 16 bit is used for h/w and upper 16 bit is for s/w.
|
||||
*/
|
||||
#define IOVMF_SW_SHIFT 16
|
||||
|
||||
/*
|
||||
* iovma: h/w flags derived from cam and ram attribute
|
||||
*/
|
||||
#define IOVMF_CAM_MASK (~((1 << 10) - 1))
|
||||
#define IOVMF_RAM_MASK (~IOVMF_CAM_MASK)
|
||||
|
||||
#define IOVMF_PGSZ_MASK (3 << 0)
|
||||
#define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M
|
||||
#define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K
|
||||
#define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K
|
||||
#define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M
|
||||
|
||||
#define IOVMF_ENDIAN_MASK (1 << 9)
|
||||
#define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG
|
||||
#define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE
|
||||
|
||||
#define IOVMF_ELSZ_MASK (3 << 7)
|
||||
#define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8
|
||||
#define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16
|
||||
#define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32
|
||||
#define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE
|
||||
|
||||
#define IOVMF_MIXED_MASK (1 << 6)
|
||||
#define IOVMF_MIXED MMU_RAM_MIXED
|
||||
|
||||
/*
|
||||
* iovma: s/w flags, used for mapping and umapping internally.
|
||||
*/
|
||||
#define IOVMF_MMIO (1 << IOVMF_SW_SHIFT)
|
||||
#define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT)
|
||||
#define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT)
|
||||
|
||||
/* "superpages" is supported just with physically linear pages */
|
||||
#define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT))
|
||||
#define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT))
|
||||
#define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT))
|
||||
|
||||
#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT))
|
||||
|
||||
|
||||
extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da);
|
||||
extern u32
|
||||
omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
|
||||
const struct sg_table *sgt, u32 flags);
|
||||
extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain,
|
||||
struct device *dev, u32 da);
|
||||
extern u32
|
||||
omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev,
|
||||
u32 da, size_t bytes, u32 flags);
|
||||
extern void
|
||||
omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
|
||||
const u32 da);
|
||||
extern void *omap_da_to_va(struct device *dev, u32 da);
|
||||
|
||||
#endif /* __IOMMU_MMAP_H */
|
||||
Reference in New Issue
Block a user