sdhci: support JMicron JMB38x chips
The JMicron JMB38x chip doesn't support transfers that aren't 32-bit aligned (both size and start address). It also doesn't like switching between PIO and DMA mode, so it needs to be reset after each request. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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@@ -2148,6 +2148,7 @@
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#define PCI_DEVICE_ID_JMICRON_JMB365 0x2365
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#define PCI_DEVICE_ID_JMICRON_JMB366 0x2366
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#define PCI_DEVICE_ID_JMICRON_JMB368 0x2368
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#define PCI_DEVICE_ID_JMICRON_JMB38X_SD 0x2381
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#define PCI_VENDOR_ID_KORENIX 0x1982
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#define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600
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