IB/qib: Add DCA support
This patch adds DCA cache warming for systems that support DCA. The code uses cpu affinity notification to react to an affinity change from a user mode program like irqbalance and (re-)program the chip accordingly. This notification avoids reading the current cpu on every interrupt. Reviewed-by: Dean Luick <dean.luick@intel.com> Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com> [ Add Kconfig dependency on SMP && GENERIC_HARDIRQS to avoid failure to build due to undefined struct irq_affinity_notify. - Roland ] Signed-off-by: Roland Dreier <roland@purestorage.com>
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Roland Dreier

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@@ -428,9 +428,19 @@ struct qib_verbs_txreq {
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#define ACTIVITY_TIMER 5
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#define MAX_NAME_SIZE 64
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#ifdef CONFIG_INFINIBAND_QIB_DCA
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struct qib_irq_notify;
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#endif
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struct qib_msix_entry {
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struct msix_entry msix;
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void *arg;
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#ifdef CONFIG_INFINIBAND_QIB_DCA
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int dca;
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int rcv;
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struct qib_irq_notify *notifier;
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#endif
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char name[MAX_NAME_SIZE];
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cpumask_var_t mask;
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};
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@@ -828,6 +838,9 @@ struct qib_devdata {
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struct qib_ctxtdata *);
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void (*f_writescratch)(struct qib_devdata *, u32);
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int (*f_tempsense_rd)(struct qib_devdata *, int regnum);
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#ifdef CONFIG_INFINIBAND_QIB_DCA
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int (*f_notify_dca)(struct qib_devdata *, unsigned long event);
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#endif
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char *boardname; /* human readable board info */
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