Merge commit 'v2.6.38' into x86/mm
Conflicts: arch/x86/mm/numa_64.c Merge reason: Resolve the conflict, update the branch to .38. Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
@@ -88,6 +88,7 @@ extern int acpi_disabled;
|
||||
extern int acpi_pci_disabled;
|
||||
extern int acpi_skip_timer_override;
|
||||
extern int acpi_use_timer_override;
|
||||
extern int acpi_fix_pin2_polarity;
|
||||
|
||||
extern u8 acpi_sci_flags;
|
||||
extern int acpi_sci_override_gsi;
|
||||
|
@@ -233,6 +233,7 @@ extern void sync_Arb_IDs(void);
|
||||
extern void init_bsp_APIC(void);
|
||||
extern void setup_local_APIC(void);
|
||||
extern void end_local_APIC_setup(void);
|
||||
extern void bsp_end_local_APIC_setup(void);
|
||||
extern void init_apic_mappings(void);
|
||||
void register_lapic_address(unsigned long address);
|
||||
extern void setup_boot_APIC_clock(void);
|
||||
|
6
arch/x86/include/asm/ce4100.h
Normal file
6
arch/x86/include/asm/ce4100.h
Normal file
@@ -0,0 +1,6 @@
|
||||
#ifndef _ASM_CE4100_H_
|
||||
#define _ASM_CE4100_H_
|
||||
|
||||
int ce4100_pci_init(void);
|
||||
|
||||
#endif
|
@@ -32,6 +32,6 @@ extern void arch_unregister_cpu(int);
|
||||
|
||||
DECLARE_PER_CPU(int, cpu_state);
|
||||
|
||||
int __cpuinit mwait_usable(const struct cpuinfo_x86 *);
|
||||
int mwait_usable(const struct cpuinfo_x86 *);
|
||||
|
||||
#endif /* _ASM_X86_CPU_H */
|
||||
|
@@ -36,6 +36,11 @@
|
||||
#define MSR_IA32_PERFCTR1 0x000000c2
|
||||
#define MSR_FSB_FREQ 0x000000cd
|
||||
|
||||
#define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
|
||||
#define NHM_C3_AUTO_DEMOTE (1UL << 25)
|
||||
#define NHM_C1_AUTO_DEMOTE (1UL << 26)
|
||||
#define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25)
|
||||
|
||||
#define MSR_MTRRcap 0x000000fe
|
||||
#define MSR_IA32_BBL_CR_CTL 0x00000119
|
||||
|
||||
|
@@ -22,6 +22,7 @@
|
||||
|
||||
#define ARCH_P4_CNTRVAL_BITS (40)
|
||||
#define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1)
|
||||
#define ARCH_P4_UNFLAGGED_BIT ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1))
|
||||
|
||||
#define P4_ESCR_EVENT_MASK 0x7e000000U
|
||||
#define P4_ESCR_EVENT_SHIFT 25
|
||||
|
@@ -34,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void)
|
||||
*/
|
||||
CMOS_WRITE(0, 0xf);
|
||||
|
||||
*((volatile long *)phys_to_virt(apic->trampoline_phys_low)) = 0;
|
||||
*((volatile u32 *)phys_to_virt(apic->trampoline_phys_low)) = 0;
|
||||
}
|
||||
|
||||
static inline void __init smpboot_setup_io_apic(void)
|
||||
|
@@ -176,7 +176,7 @@ struct bau_msg_payload {
|
||||
struct bau_msg_header {
|
||||
unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
|
||||
/* bits 5:0 */
|
||||
unsigned int base_dest_nodeid:15; /* nasid (pnode<<1) of */
|
||||
unsigned int base_dest_nodeid:15; /* nasid of the */
|
||||
/* bits 20:6 */ /* first bit in uvhub map */
|
||||
unsigned int command:8; /* message type */
|
||||
/* bits 28:21 */
|
||||
|
Reference in New Issue
Block a user