Merge 4.13-rc7 into staging-next
We want the staging and iio fixes in here to handle the merge issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
@@ -402,34 +402,32 @@ static int stm32_counter_read_raw(struct iio_dev *indio_dev,
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int *val, int *val2, long mask)
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{
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struct stm32_timer_trigger *priv = iio_priv(indio_dev);
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u32 dat;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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{
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u32 cnt;
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regmap_read(priv->regmap, TIM_CNT, &cnt);
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*val = cnt;
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regmap_read(priv->regmap, TIM_CNT, &dat);
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*val = dat;
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return IIO_VAL_INT;
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}
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case IIO_CHAN_INFO_SCALE:
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{
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u32 smcr;
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regmap_read(priv->regmap, TIM_SMCR, &smcr);
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smcr &= TIM_SMCR_SMS;
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case IIO_CHAN_INFO_ENABLE:
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regmap_read(priv->regmap, TIM_CR1, &dat);
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*val = (dat & TIM_CR1_CEN) ? 1 : 0;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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regmap_read(priv->regmap, TIM_SMCR, &dat);
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dat &= TIM_SMCR_SMS;
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*val = 1;
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*val2 = 0;
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/* in quadrature case scale = 0.25 */
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if (smcr == 3)
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if (dat == 3)
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*val2 = 2;
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return IIO_VAL_FRACTIONAL_LOG2;
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}
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}
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return -EINVAL;
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}
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@@ -439,15 +437,31 @@ static int stm32_counter_write_raw(struct iio_dev *indio_dev,
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int val, int val2, long mask)
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{
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struct stm32_timer_trigger *priv = iio_priv(indio_dev);
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u32 dat;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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regmap_write(priv->regmap, TIM_CNT, val);
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return regmap_write(priv->regmap, TIM_CNT, val);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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/* fixed scale */
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return -EINVAL;
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case IIO_CHAN_INFO_ENABLE:
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if (val) {
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regmap_read(priv->regmap, TIM_CR1, &dat);
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if (!(dat & TIM_CR1_CEN))
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clk_enable(priv->clk);
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regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
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TIM_CR1_CEN);
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} else {
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regmap_read(priv->regmap, TIM_CR1, &dat);
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regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
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0);
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if (dat & TIM_CR1_CEN)
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clk_disable(priv->clk);
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}
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return 0;
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}
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return -EINVAL;
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@@ -507,7 +521,7 @@ static int stm32_get_trigger_mode(struct iio_dev *indio_dev,
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regmap_read(priv->regmap, TIM_SMCR, &smcr);
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return smcr == TIM_SMCR_SMS ? 0 : -EINVAL;
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return (smcr & TIM_SMCR_SMS) == TIM_SMCR_SMS ? 0 : -EINVAL;
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}
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static const struct iio_enum stm32_trigger_mode_enum = {
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@@ -543,9 +557,19 @@ static int stm32_set_enable_mode(struct iio_dev *indio_dev,
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{
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struct stm32_timer_trigger *priv = iio_priv(indio_dev);
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int sms = stm32_enable_mode2sms(mode);
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u32 val;
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if (sms < 0)
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return sms;
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/*
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* Triggered mode sets CEN bit automatically by hardware. So, first
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* enable counter clock, so it can use it. Keeps it in sync with CEN.
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*/
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if (sms == 6) {
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regmap_read(priv->regmap, TIM_CR1, &val);
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if (!(val & TIM_CR1_CEN))
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clk_enable(priv->clk);
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}
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regmap_update_bits(priv->regmap, TIM_SMCR, TIM_SMCR_SMS, sms);
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@@ -607,11 +631,14 @@ static int stm32_get_quadrature_mode(struct iio_dev *indio_dev,
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{
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struct stm32_timer_trigger *priv = iio_priv(indio_dev);
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u32 smcr;
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int mode;
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regmap_read(priv->regmap, TIM_SMCR, &smcr);
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smcr &= TIM_SMCR_SMS;
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mode = (smcr & TIM_SMCR_SMS) - 1;
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if ((mode < 0) || (mode > ARRAY_SIZE(stm32_quadrature_modes)))
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return -EINVAL;
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return smcr - 1;
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return mode;
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}
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static const struct iio_enum stm32_quadrature_mode_enum = {
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@@ -628,13 +655,20 @@ static const char *const stm32_count_direction_states[] = {
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static int stm32_set_count_direction(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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unsigned int mode)
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unsigned int dir)
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{
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struct stm32_timer_trigger *priv = iio_priv(indio_dev);
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u32 val;
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int mode;
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regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_DIR, mode);
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/* In encoder mode, direction is RO (given by TI1/TI2 signals) */
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regmap_read(priv->regmap, TIM_SMCR, &val);
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mode = (val & TIM_SMCR_SMS) - 1;
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if ((mode >= 0) || (mode < ARRAY_SIZE(stm32_quadrature_modes)))
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return -EBUSY;
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return 0;
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return regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_DIR,
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dir ? TIM_CR1_DIR : 0);
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}
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static int stm32_get_count_direction(struct iio_dev *indio_dev,
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@@ -645,7 +679,7 @@ static int stm32_get_count_direction(struct iio_dev *indio_dev,
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regmap_read(priv->regmap, TIM_CR1, &cr1);
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return (cr1 & TIM_CR1_DIR);
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return ((cr1 & TIM_CR1_DIR) ? 1 : 0);
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}
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static const struct iio_enum stm32_count_direction_enum = {
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@@ -708,7 +742,9 @@ static const struct iio_chan_spec_ext_info stm32_trigger_count_info[] = {
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static const struct iio_chan_spec stm32_trigger_channel = {
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.type = IIO_COUNT,
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.channel = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_ENABLE) |
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BIT(IIO_CHAN_INFO_SCALE),
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.ext_info = stm32_trigger_count_info,
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.indexed = 1
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};
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